Negative Capacitance Research Articles

Engineering negative differential resistance in negative capacitance Quad-FinFET

In this work, a systematically analysis of the Negative Capacitance (NC) Quad-FinFET structure is carried out where we determine the optimal FE layer thickness that enables hysteresis-free transfer characteristics. However, negative differential resistance (NDR) is introduced along with the increased FE-layer thickness, which is not desirable for application in analogcircuits. Through the implementation of an asymmetric drain length extension and a high-k Si3N4 spacer, negative differential resistance (NDR) can be mitigated. In addition, the relatively poor analog performance generally seen in conventional FinFET structures are overcome in the drain engineered NC Quad-FinFET structure with gate spacer resulting in significant improvement in performance parameters such as transconductance, output conductance and intrinsic gain. The integration of NC Quad-FinFET as a digital inverter is carried out where the circuit propagation delay is decreased by 27.65% with drain length extension and inclusion of Si3N4 spacer. Thus, through these device optimization techniques, the NC Quad-FinFET structure shows significant improvement in both analog and digital device performance parameters.

Negative Capacitance in Nanocomposite Based on High-Density Polyethylene (HDPE) with Multiwalled Carbon Nanotubes (CNTs).

Negative capacitance (NC), already observed in conducting polymer-based nanocomposites, was recently reported and evidenced at low frequencies (<10 kHz) in non-conducting polymer-based nanocomposites containing conductive particles. In this contribution, we demonstrate that it is possible to produce economic high-density polyethylene (HDPE) nanocomposites exhibiting an NC effect at low frequencies via a convenient and environmentally friendly extrusion-like process by only adjusting the duration of melt-mixing. Nanocomposite materials are produced by confining a limited quantity, i.e., 4.6 wt.%, of multiwalled carbon nanotubes (CNTs) within semi-crystalline HDPE to reach the percolation threshold. With increasing melt processing time, crystallites of HDPE developing at the surface of CNTs become bigger and perturbate the connections between CNTs leading to a dramatic change in the electrical behavior of the systems. More specifically, the link between NC and current oscillations is stressed while the dependence of NC with the size of polymer crystallites is evidenced. NC tends to appear when space charge effects take place in HDPE/MWCNT interfaces, in structures with convenient crystallite sizes corresponding to 10 min of melt-mixing.

Phase field study on the flexoelectric response of dielectric–ferroelectric multilayers

We report a theoretical modeling of the flexoelectric response of dielectric–ferroelectric (DE–FE) multilayers based on phase field simulations in the framework of the Landau–Ginzburg–Devonshire (LGD) theory. The correlation between negative capacitance and flexoelectric response is revealed, and the single-domain and multi-domain models are compared. It shows that the dielectric layers drive the ferroelectric layer into a negative capacitance regime, and the flexoelectric response of the multilayer is maximal when the negative capacitance of the ferroelectric layer has a minimal absolute value. Moreover, the flexoelectric response peak will be shifted to a lower temperature by increasing the thickness of dielectric layer, indicating a possibility of achieving a stronger flexoelectric response at room temperature compared with that of pure ferroelectric. However, while the single-domain model shows that the flexoelectric response peak is simply shifted to a lower temperature with near constant peak value and width, the multi-domain model reveals a significant suppressing of the flexoelectric peak by the dielectric layer. This is attributed to the formation of the vortex domain state, which eases the depolarization effect and leads to large absolute value of negative capacitance of the ferroelectric layer. Our work provides new insights into flexoelectricity in ferroelectric heterostructures.

Comparative Analysis of Noise Behavior of Highly Doped Double Pocket Double-Gate and Single-Gate Negative Capacitance FET

Comparative Analysis of Noise Behavior of Highly Doped Double Pocket Double-Gate and Single-Gate Negative Capacitance FET

A novel inverted T-shaped negative capacitance TFET for label-free biosensing application

The promising candidate for designing a highly sensitive biosensor is the negative capacitance tunneling field effect transistor (NCTFET). In this paper, to enhance the sensitivity and performance of the biosensor, we combined inverted T-shaped structure with NCTFET. We introduce negative capacitance effects by stacking ferroelectric materials on the gate dielectric layer. This paper presents a detailed comparative analysis of the proposed inverted T-shaped-NCTFET and TFET based biosensors for different dielectric constants and charge densities of the nano-cavity between the channel and source region locations of biosensor. Sensitivity has been measured in terms of drain current, on-state current, current switching ratio, electric field, and transconductance sensitivity. To establish a benchmark, the sensitivity of the proposed biosensor is also compared with the published literature in order to determine its effectiveness. It is conferred from the results that our biosensor can be a better alternative for the detection of the various neutral and charged biomolecules. All the device simulations are performed in a TCAD environment using a well-calibrated structure.

Analytical modeling of negative capacitance transistor based ultra low power Schmitt trigger

Through an analytical framework, the work showcases the potential benefits of Metal-Ferroelectric-Metal-Insulator-Semiconductor (MFMIS) negative capacitance (NC) transistor (T) to enhance the hysteresis width (ΔVH) and reduce the minimum supply voltage (Vdd,min) of ultra low power (ULP) subthreshold Schmitt trigger (ST) at shorter gate lengths. Analyzing different ST configurations i.e. 2T (both NCFET), 4T-hybrid (realized through combination of NCFETs and MOSFETs), and 6T (all NCFETs or MOSFETs), leads to the inferences that (i) an inherent negative differential resistance of NCFET can be utilized for hysteresis in 2T-ST circuit, (ii) 4T-hybrid ST is not beneficial for enhancing ΔVH due to a current mismatch between MOSFET and NCFET, and (iii) an optimized 2T-ST and 6T-ST designed with high-permittivity (κ) sidewall spacer (Si3N4) and ferroelectric layer (6 nm) can function at Vdd,min of ∼ 55 mV, and ∼ 39 mV, respectively. Results indicate towards potential benefits of realizing ULP subthreshold ST through MFMIS NCFETs without any circuit overhead.

Design and Performance Analysis of Negative Capacitance Effect in the Charge Plasma-Based Junction-Less Vertical TFET Structure

In this paper, a negative capacitance (NC) effect in series with normal oxide capacitance is first time introduced to design negative capacitance charge plasma-based junction less vertical TFET structure (NC-CP-JL-VTFET). The introduced negative capacitance enhances the overall gate capacitance and hence gate capacitive coupling and thus renders high current capabilities with reduced sub-threshold slope and threshold voltage. With the use of negative capacitance along with oxide capacitance, it has been seen that the same drain current is achieved at lower gate voltage as compared to without use of negative capacitance and since the voltage scaling is done considerably, the dynamic power dissipation in circuit application can be reduced significantly. To generate the negative capacitance during the device operation; ferroelectric material [Formula: see text](VDF-TrFE) poly(vinylidene fluoride-trifluoro ethylene) is used in stack with SiO2 gate oxide. Various performance parameters of the designed structure such as electron–hole concentration in the tunneling junction, electric field, surface potential, electron–hole quasi-Fermi variation, and drain current variation are investigated and compared with the results of without considering the ferroelectric material in the gate oxide. The variation of the ferroelectric thickness on the device performance is also investigated. The investigation exhibits significant improvement in the drain current and in the other parameters as well. These improvements are seen because of higher capacitive coupling and these effects are further responsible for more energy band bending which in turn govern high electron tunneling. Due to the existence of negative capacitance, the peak value of the electric field gets doubled while the surface potential increases 44% from the normal structure.

On the Existence of Negative Capacitance: Examining Ferroelectric-Dielectric Stack Experiments Using the NLS and LK Models

The Landau–Khalatnikov (LK) model of ferroelectric switching includes an inherent region of negative capacitance (NC) in its lossless charge versus voltage description and allows the possibility of stabilization of the ferroelectric in this region to achieve quasi-static NC (QSNC). On the other hand, the nucleation-limited switching (NLS) model, which is another model used to describe ferroelectric switching, precludes QSNC and offers an alternative explanation for the appearance of an NC region in recent voltage-pulse experiments performed on ferroelectric-dielectric (FE-DE) stacks. As such, we investigate such experiments that probe the existence of an NC region using both the LK and NLS models. While the LK model can reproduce all experimental results seen in prior literature, we find that the NLS model is incapable of properly reproducing results under a multitude of investigation metrics. Hence, we conclude that the use of the NLS model to exclude the existence of QSNC is problematic.

Piezoelectric-shunt-based approach for multi-mode adaptive tuned mass dampers

This paper deals with the design and development of a multi-frequency adaptive tuned mass damper based on a cantilever beam equipped with shunted piezoelectric elements. It is demonstrated that the device is able to independently shift a number of eigenfrequencies equal to the number of piezoelectric elements and that the use of negative capacitances is able to strongly improve the adaptation capability of the device. Mathematical formulations are provided for linking the values of the capacitances used for shunting the piezoelectric elements and the resulting shifts of the eigenfrequencies, and vice versa. Furthermore, being the negative capacitances based on operational amplifiers, the stability of the electro-mechanical system is investigated, giving rules about the tuning of these negative capacitances. The resulting adaptive tuned mass damper can be fruitfully employed for lowering vibrations of a primary system whose eigenfrequencies undergo different frequency shifts, improving the robustness to possible mistuning of non-adaptive classical tuned mass dampers. All the theoretical outcomes are validated through an experimental campaign with a cantilever beam equipped with two piezoelectric patches.

Nonlinear dynamic analysis and vibration suppression on the composite laminated plates with general boundary conditions in supersonic airflow

This paper performs the nonlinear dynamic analysis and vibration reduction of the panel structures subjected to supersonic airflow. The negative capacitance piezoelectric shunt damping circuit (PSDC) which contains bonded piezoelectric element and external negative capacitance is adopted. Based on the modified Ritz approach and energy approach, the formulations of the nonlinear panel structure with attached piezoelectric element are derived. A unified mathematical model for the nonlinear dynamic analysis of composite panels subjected to general edge boundaries in supersonic airflow is formulated. Furthermore, the Newmark approach and Newton iteration approach are utilized to calculate time domain responses of panel structures under aerodynamic pressure. Several numerical cases are further performed to verify the present formulations. Finally, impacts of several factors on the flutter characteristics of panel structures are investigated and the comparisons concerning the vibration responses of panels having and without PSDC are performed to verify vibration reduction properties of the present method. The numerical results show that the vibration and flutter of panels in supersonic airflow can be sufficiently suppressed by the present simple vibration reduction strategy.

A New Method to Synthesise the Sinusoidal Oscillator Based on Series Negative Resistance-Capacitance and its Implementation Using a Single Commercial IC, LT1228

An alternative method for synthesising the sinusoidal oscillator based on series negative resistance-capacitance is presented in this paper. The proposed topology is constructed with the series negative resistance-capacitance circuit connected in parallel with a grounded resistor and capacitor. To validate the proposed method, a new grounded series negative resistance-capacitance simulator is also proposed as a subcircuit for synthesising the sinusoidal oscillator. The series negative resistance-capacitance simulator is based on a commercially available integrated circuit (IC), LT1228. The equivalent negative resistance and equivalent negative capacitance can be adjusted electronically using an external DC bias current. The sinusoidal oscillator that is synthesised using the proposed method consists of a single LT1228, two capacitors, and three resistors. The frequency and the condition of the oscillation are orthogonally adjusted. Also, the condition of oscillation is electronically controlled. The amplitude of the sinusoidal waveform is adjustable. In addition, the output voltage node of the proposed oscillator has a low impedance, which allows it to connect to other circuits without using an additional buffer. Both PSPICE simulation and experiment are used to validate the proposed circuits.

Optimization of Subthreshold Swing and Hysteresis in Hf0.5Zr0.5O2-Based MoS2 Negative Capacitance Field-Effect Transistors by Modulating Capacitance Matching.

Negative capacitance field effect transistors made of Hf0.5Zr0.5O2 (HZO) are one of the most promising candidates for low-power-density devices because of the extremely steep subthreshold swing and high open-state currents resulting from the addition of ferroelectric materials in the gate dielectric layer. In this paper, HZO thin films were prepared by magnetron sputtering combined with rapid thermal annealing. Their ferroelectric properties were adjusted by changing the annealing temperature and the thickness of HZO. Two-dimensional MoS2 back-gate negative capacitance field-effect transistors (NCFETs) based on HZO were prepared as well. Different annealing temperatures, thicknesses of HZO thin films, and Al2O3 thicknesses were studied to achieve optimal capacitance matching, aiming to reduce both the subthreshold swing of the transistor and the hysteresis of the NCFET. The NCFET exhibits a minimum subthreshold swing as low as 27.9 mV/decade, negligible hysteresis (∼20 mV), and the ION/IOFF of up to 1.58 × 107. Moreover, a negative drain-induced barrier lowering effect and a negative differential resistance effect have been observed. This steep-slope transistor is compatible with standard CMOS manufacturing processes and attractive for 2D logic and sensor applications as well as future energy-efficient nanoelectronic devices with scaled power supplies.

Machine learning-based output prediction of negative capacitance tunnel-FET

ABSTRACT Machine learning-based prediction of the output characteristics of a negative capacitance (NC) double gate (DG) Tunnel FET (TFET) (NC DG TFET) has been demonstrated in this paper. On current (ION), OFF current (IOFF) and sub-threshold slope (SS) have been predicted for different values of the body thickness (TSi), oxide thickness (TOX) and channel length (LCh) and the work function (WF). Random Forest Regression (RFR) model is used in the ML framework to explore the device characteristics. A total of 5444 simulated data has been generated by using the SILVACO ATLAS tool. After pre-processing the data, RFR-ML has been applied to obtain maximum accuracy. Root means square error (RMSE) (~0.34), R2 score (~0.965) and accuracy (~98.51%) parameter have been used as the figures of merit (FOM) to judge the efficiency of the proposed model with respect to the state-of-the-art literature. Besides, with higher accuracy, the model is capable of predicting the data within a few seconds compared to the few hundred hours using TCAD tools. This fast and accurate design strategy will surely be efficacious for the present VLSI industries.

Transient Negative Capacitance Induced by Charged Oxygen Vacancy Drift in HfO2‐Based Films

Transient negative capacitance (TNC) is believed to be the key for understanding and harnessing quasistatic negative capacitance in HfO2‐based films which offers a promising solution for low‐power‐dissipation electronics, but the physical picture is still under debate. Herein, a model based on charged oxygen vacancy (VO) drift is proposed to interpret the TNC effect. The results show that TNC possibly originates from the mismatch between the charged VO drift and the compensation charge supply from external source. The model captures the main features of experimental observations, including the enhancement of both TNC voltage window and duration time with increasing series resistance. Moreover, negative slopes appear in the charge–voltage curves, without invoking the Landau–Khalatnikov scenario. It is revealed that TNC is only observable within a rather narrow charged VO concentration window near 5 × 1019 cm−3. The model manifests itself by the fact that most of the HfO2‐related films in the TNC studies are treated under nitrogen atmosphere and therefore, are oxygen deficient.

A negative capacitance FET based energy efficient 6T SRAM computing-in-memory (CiM) cell design for deep neural networks

An Energy-Efficient Computing-in-Memory (CiM) cell design utilizing a Negative Capacitance (NC) FET has been proposed to support computing architectures for Deep Neural Networks (DNNs). The NCFET device characteristics for CiM architectures have been studied to determine an optimal device performance window by changing the thickness of ferroelectric layer (Tfe). The performance metrics such as read margin (RM), write margin (WM), read energy and write energy of NCFET 6 T SRAM cell are analyzed with varying Tfe at two different supply voltages 0.3 V and 0.5 V respectively. NCFET based SRAM cell design achieves higher RM and WM at Tfe of 3 nm and lower energy consumption at 1 nm Tfe as compared with the baseline SRAM cell design at both VDD = 0.3 V and VDD = 0.5 V respectively. 6 T NCFET based CiM cell design for performing basic input-weight product operation (IWP) has been demonstrated and performance comparison is done with baseline CMOS design at VDD = 0.3 V and VDD = 0.5 V. In comparison with the baseline CMOS CiM cell design, NCFET based SRAM CiM design achieves ∼2.59x and 1.62x lower energy consumption at VDD = 0.3 V and VDD = 0.5 V respectively with an optimal Tfe window of 1–3 nm.

Similarity of Heterogeneous Kinetics to Delay of Double-Layer Capacitance Using Chronoamperometry

Chronoamperometric curves for the oxidation of a ferrocenyl derivative via a potential step, calculated using the Cottrell equation, showed less diffusion-controlled currents on a platinum wire electrode. This lower deviation cannot be explained via Butler–Volmer heterogeneous kinetics, but was ascribed to the negatively capacitive current associated with a redox reaction. The deviation in fully oxidized electrical potential corresponds to the non-zero concentration at the electrode surface, which cannot be predicted using the Nernst equation. This equation expresses the relationship between the electrical potential and activity at the electrode surface rather than the concentration. The diffusion equation determines the relationship between the current and surface concentration rather than activity. Negative capacitance or a non-zero concentration may arise from structure formation on the electrode owing to dipole–dipole interactions, which are similar to the generation of double-layer capacitance, including frequency dispersion. Following this concept, we derive expressions for a lowered diffusion-controlled current and time-dependent surface concentration. The negatively capacitive current shows the time dependence of t−0.9, which is similar to the decay of double-layer capacitive currents. The surface concentration decays with t−0.4-dependence.

Dinaphtho[2,3-b:2′,3′-f]thieno[3,2-b]thiophene photoresistor: Generation of photocarriers and charge trapping

Thin films of organic semiconductors have been used as active layer in several electronic devices. The molecular organization of the active layer can be a critical parameter to optimize the performance of these devices. In this work, a thin film photoresistor of Dinaphtho[2,3-b:2′,3′-f]thieno[3,2-b]thiophene (DNTT) was fabricated using physical vapor deposition (PVD) technique with the most appropriate molecular organization to obtain better performance. The DNTT photoresistor current exhibited a significant increase under ultraviolet (UV) light (λ = 390 nm, Pd = 1.73 W/m2), achieving an IUV/IDark ratio of 1 × 105 at V = −1.5 V. The photoresistor DNTT achieved good values for the most important photodetector's figures of merit (FOMs), such as responsivity of 722.3 mA/W, detectivity of 1.0 × 1013 Jones and external quantum efficiency of 23000%. The measurements of real (Z′) and imaginary (Z″) impedance in the dark indicated that the electrical relaxation process is slow and of the Debye type. Nyquist plots revealed the appearance of negative capacitance (NC) at low frequencies when the photoresistor is under illumination, indicating that the photogenerated carriers can be trapped. The alternating current (AC) conductivity (σAC) measurements under lighting suggest that charge transfer occurs by hopping and those charge carriers can tunnel through the space charge region (SCR) with built-in potential generated by charges trapped. Therefore, the results showed that although the DNTT photoresistor has a good photoconductive response, its performance can be improved by reducing of traps.

Negative Capacitance Phenomenon in GaAs-Based MIS Devices Under Ionizing Radiation

This study focuses on the abnormal peaks observed in voltage-dependent capacitance graphs and negative capacitance behaviors of the GaAs-based MOS devices for the unirradiated sample and after exposing the device to 5 and 10 kGy ionizing (gamma) radiation doses. Experimental results showed that the amplitude of the abnormal peaks, observed at about 1.75 V, increases with the irradiation dose. The peak point was also shifted toward the positive biases after irradiation. Furthermore, the conductance values increased rapidly and reached their maximum level, while the capacitance values reached their minimum level in the high voltage biases. This situation is directly related to the inductive behavior of the MOS devices. However, it has been determined that the MOS device's inductive behavior is more effective after irradiation. These behaviors can be observed because of the ionization process, the MOS device's series resistance, surface states, and due to some displacement damages caused by ionizing radiation. Therefore, the series resistance and the radiation-induced surface states were obtained to clarify the impact of radiation on the device. It was seen that the radiation-induced surface states changed around 3x1012 for the maximum cumulative dose (10 kGy), and the series resistance values changed less than 2 Ω (it was obtained 8.74 Ω for 0 kGy and 6.82 Ω for 10 kGy). As a result, the degradation in the GaAs-based MOS device was determined to be insignificant for 10 kGy doses. Therefore, this MOS device can be safely used as an electronic component in radiation environments such as nuclear plants and satellite systems.

Probing the Low-Frequency Response of Impedance Spectroscopy of Halide Perovskite Single Crystals Using Machine Learning.

Electrochemical impedance spectroscopy (EIS) has emerged as a versatile technique for characterization and analysis of metal halide perovskite solar cells (PSCs). The crucial information about ion migration and carrier accumulation in PSCs can be extracted from the low-frequency regime of the EIS spectrum. However, lengthy measurement time at low frequencies along with material degradation due to prolonged exposure to light and bias motivates the use of machine learning (ML) in predicting the low-frequency response. Here, we have developed an ML model to predict the low-frequency response of the halide perovskite single crystals. We first synthesized high-quality MAPbBr3 single crystals and subsequently recorded the EIS spectra at different applied bias and illumination intensities to prepare the dataset comprising 8741 datapoints. The developed supervised ML model can predict the real and imaginary parts of the low-frequency EIS response with an R2 score of 0.981 and a root mean squared error (RMSE) of 0.0196 for the testing set. From the ground truth experimental data, it can be observed that negative capacitance prevails at a higher applied bias. Our developed model can closely predict the real and imaginary parts at a low frequency (50 Hz-300 mHz). Thus, our method makes recording of EIS more accessible and opens a new way in using the ML techniques for EIS.

0D-2D heterostructure for making very large quantum registers using ‘itinerant’ Bose-Einstein condensate of excitons

Presence of coherent resonant tunneling in quantum dot (zero-dimensional) - quantum well (two-dimensional) heterostructure is necessary to explain the collective oscillations of average electrical polarization of excitonic dipoles over a macroscopically large area. This was measured using photo excited capacitance as a function of applied voltage bias. Resonant tunneling in this heterostructure definitely requires momentum space narrowing of charge carriers inside the quantum well and that of associated indirect excitons, which indicates bias dependent itinerant Bose-Einstein condensation of excitons. Observation of periodic variations in negative quantum capacitance points to in-plane coulomb correlations mediated by long range spatial ordering of indirect, dipolar excitons. Enhanced contrast of quantum interference beats of excitonic polarization waves even under white light and observed Rabi oscillations over a macroscopically large area also support the presence of density driven excitonic condensation having long range order. Periodic presence (absence) of splitting of excitonic peaks in photocapacitance spectra even demonstrate collective coupling (decoupling) between energy levels of the quantum well and quantum dots with applied biases, which can potentially be used for quantum gate operations. All these observations point to experimental control of macroscopically large, quantum state of a two-component Bose-Einstein condensate of excitons in this quantum dot - quantum well heterostructure. Therefore, in principle, millions of two-level excitonic qubits can be intertwined to fabricate large quantum registers using such hybrid heterostructure by controlling the local electric fields and also by varying photoexcitation intensities of overlapping light spots.