Analytical modeling of negative capacitance transistor based ultra low power Schmitt trigger

Abstract

Through an analytical framework, the work showcases the potential benefits of Metal-Ferroelectric-Metal-Insulator-Semiconductor (MFMIS) negative capacitance (NC) transistor (T) to enhance the hysteresis width (ΔVH) and reduce the minimum supply voltage (Vdd,min) of ultra low power (ULP) subthreshold Schmitt trigger (ST) at shorter gate lengths. Analyzing different ST configurations i.e. 2T (both NCFET), 4T-hybrid (realized through combination of NCFETs and MOSFETs), and 6T (all NCFETs or MOSFETs), leads to the inferences that (i) an inherent negative differential resistance of NCFET can be utilized for hysteresis in 2T-ST circuit, (ii) 4T-hybrid ST is not beneficial for enhancing ΔVH due to a current mismatch between MOSFET and NCFET, and (iii) an optimized 2T-ST and 6T-ST designed with high-permittivity (κ) sidewall spacer (Si3N4) and ferroelectric layer (6 nm) can function at Vdd,min of ∼ 55 mV, and ∼ 39 mV, respectively. Results indicate towards potential benefits of realizing ULP subthreshold ST through MFMIS NCFETs without any circuit overhead.