Monolithic Receiver Research Articles

Investigation of optical interconnect receivers in standard micron and submicron MOS technology

Novel monolithic optical receivers in 0.8-mm standard MOS technology with non-return-to-zero data rates in excess of 531 Mbit/s at 850 nm are introduced. At 638 nm the data rates are above 622 Mbit/s. The innovative integrated double and pin photodiodes allowing this high speed without any modification in a CMOS process are described, and results for their quantum efficiency and for their transient response are presented. Furthermore, the improvement of the sensitivity of the photo- diodes and of the optoelectronic integrated circuits (OEICs) by an anti- reflection coating is discussed. The circuit topology of several OEICs is described. A transimpedance input stage with an active MOS feedback resistor is implemented. Analytical calculations for the bandwidth and for the overall transimpedance of several amplifiers as well as measured results are presented. Finally, an OEIC in a 1.0-mm CMOS technology with a polysilicon resistor instead of a MOS feedback resistor with a data rate of 1 Gbit/s for 638 nm is shown. The sensitivity of this OEIC is improved by at least 9 dBm over that of published OEICs. © 2003 Society

Novel DC-offset cancellation techniques for even-harmonic direct conversion receivers

We present two novel dc-offset cancellation techniques for antiparallel diode pair even-harmonic mixers in a direct conversion receiver. Using fundamental equations, we describe the contribution of diode mismatch to dc offset and present an intrinsic mechanism of dc-offset cancellation. Similarly, we describe an extrinsic method of cancellation utilizing the second harmonic of the local oscillator. The cancellation techniques are successfully incorporated in fully monolithic C-band direct conversion receivers and mixers. Measurements confirm the equations and verify complete cancellation using the proposed methods. This works provides a solid foundation for the design and development of fully monolithic and high-performance direct conversion receivers.

Ultrafast monolithic receiver OEIC composed of multimode waveguide p-i-n photodiode and HEMT distributed amplifier

A multimode waveguide p-i-n photodiode (WGPD) and a distributed baseband amplifier consisting of high-electron mobility transistors (HEMTs) were monolithically integrated on InP substrate using a stacked layer structure for both components. The multimode WGPD has a 3-dB bandwidth of 49 GHz. The distributed baseband amplifier has a 3-dB bandwidth of 47 GHz, though its 0.5-/spl mu/m gate-length HEMTs have modest cutoff frequencies f/sub T//f/sub max/ of 47/100 GHz. The receiver optoelectronic integrated circuit has a bandwidth of 46.5 GHz. It was packaged into a fiber-pig-tailed module, and the WGPD in the module has a high responsivity of 0.62 A/W for 1.55-/spl mu/m wavelength. The module achieves a sensitivity of -22.7 dBm at 40 Gb/s and exhibits a clear eye-opening at 50 Gb/s.

Ultrafast monolithic receiver OEIC moduleoperating at over 40 Gbit/s

A high-speed monolithic receiver, consisting of a waveguide pin photodiode and an HEMT distributed amplifier, was packaged in a fibre-pigtailed module. It achieved a sensitivity of –22.7 dBm at 40 Gbit/s and a clear eye-opening at 50 Gbit/s. Such a performance is a first for a monolithic photoreceiver module.

46.5-GHz-bandwidth monolithic receiver OEIC consisting of a waveguide p-i-n photodiode and a HEMT distributed amplifier

A large bandwidth monolithically integrated photoreceiver for 1.5-/spl mu/m wavelength operation was fabricated using a stacked structure of waveguide p-i-n photodiode layers and InAlAs-InGaAs high-electron mobility transistor (HEMT) layers grown using a single-step metal-organic vapor-phase epitaxy. The monolithic receiver optoelectronic integrated circuit (OEIC) consists of a waveguide p-i-n photodiode with a high responsivity of 0.5 A/W and a HEMT distributed amplifier. It has a bandwidth of 46.5 GHz, which is the largest yet reported for a long-wavelength receiver OEIC, and exhibits a clear eye opening at 40 Gb/s. This excellent performance is very attractive for use in high-speed optical transmission systems and millimeter-wave fiber-radio systems.

InP-HBT ICs FOR 40 Gb/s OPTICAL LINKS

InP-based HBT technology has proven to be a strong candidate for ultra high speed electronic as well as optoelectronic integrated circuits. The cut-offs frequencies of the available devices exceed 100 GHz. To challenge the technology, a variety of circuits, suitable for a demonstrator for the 40 Gb/s fiber optical transmission system have been designed, fabricated, and tested. All the circuits show potential for 40 Gb/s applications. The electrical parts have been implemented in MSI/LSI AlInAs/InGaAs-HBT technology, while the monolithic optoelectronic receivers were realized in SSI- InP/InGaAs HBT technology. The verification of performance of the circuits have been mainly limited by available measurement equipment. All the electronic parts were operational with 3 volt supply voltage. All the circuits were fully functional after the first processing round. No redesign was necessary.

Low-noise performance of monolithically integrated 12-Gb/s p-i-n/HEMT photoreceiver for long-wavelength transmission systems

A high-speed monolithically integrated photoreceiver using a pin photodiode and low-noise high-electron mobility transistor (HEMT)-based electrical amplifier is reported. The photoreceiver uses a three-stage transimpedance amplifier with a bandwidth of 8.3 GHz. An on-wafer average input-referred noise current spectral density of 8.82 pA/Hz <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1</sup> 2/ was measured for the photoreceivers. Operation of the photoreceivers at bit rates up to 12 Gb/s was experimentally verified, and bit-error-rate (BER) measurements were performed. The photoreceivers demonstrated a sensitivity of -17.7 dBm at 10 Gb/s and -15.8 dBm at 12 Gb/s for a BER of 10/sup -9/ and nonreturn-to-zero (NRZ), 2/sup 31/-1 pattern length pseudorandom bit sequence (PRBS) data at a wavelength of 1.55 μm. To the authors' knowledge, these are the first reported measured sensitivities for HEMT-based monolithic receivers using a long 2/sup 31/-1 pattern length at bit rates of 10 and 12 Gb/s, and represent the best directly measured sensitivities for monolithic HEMT-based photoreceivers at these bit rates.

Performance of eight-channel OEIC p-i-n/HBT receiver array in 8×2.5 Gb/s WDM transmission system

The performance of an eight-channel, 2.5 Gb/s OEIC photoreceiver array in an eight-wavelength long-distance WDM testbed is described. The sensitivity penalties due to crosstalk and transmission are measured, and the source of crosstalk is investigated. Channel sensitivities range from -25.4 to -26.2 dBm after transmission through 720 km of standard fiber, with transmission penalties ranging from 0.3 dB to 1.0 dB. When the power in each of seven interfering channels is 5 dB above sensitivity, the maximum crosstalk penalty suffered by an individual channel does not exceed 1 dB. These experiments are the first comprehensive characterization of monolithic receiver arrays for crosstalk performance under multichannel operation in a realistic system environment.

Performance of 8-channel OEIC receiver array in 8 x 2.5 Gb/s WDM transmission experiment

The performance of an 8-channel, 2.5-Gb/s OEIC photoreceiver array in an 8-wavelength long-distance WDM testbed is described. The sensitivity penalties due to crosstalk and transmission are measured, and the source of crosstalk is investigated. Channel sensitivities range from -25.4 to -26.2 dBm after transmission through 720 km of standard fiber, with transmission penalties ranging from 0.3-1.0 dB. When the power in each of seven interfering channels is 5 dB above sensitivity, the maximum cross talk penalty suffered by an individual channel does not exceed 1 dB. These experiments are the first comprehensive characterization of monolithic receiver arrays for crosstalk performance under multichannel operation in a realistic system environment.

A VLSI-compatible high-speed silicon photodetector for optical data link applications

A novel silicon photodetector suitable for high-speed, low-voltage operation at 780- to 850-nm wavelengths is reported. It consists of an interdigitated p-i-n detector fabricated on a silicon-on-insulator (SOI) substrate by using a standard bipolar process. Biased at 3.5 V, this device attains a -3-dB bandwidth in excess of 1 GHz at /spl lambda/=840 nm. The dc responsivity measured at /spl lambda/=840 nm on nonoptimized structures ranges from 0.05 to 0.09 A/W, depending on the finger shadowing factor. A new approach for improving the responsivity is proposed and quantitatively analyzed. The fabricated devices exhibit extremely low dark currents, small capacitance, large dynamic range, and no evidence of low-frequency gain. The overall performance and process compatibility of these photodetectors make them viable candidates for the fabrication of silicon monolithic receivers for fiber-optic data links.

Monolithic millimeter wave optical receivers

A single stage monolithic millimeter wave optical receiver circuit was designed and fabricated using a metal-semiconductor-metal (MSM) photodetector and a pSeudomorphic Modulation Doped Field Effect Transistors (SMODFET) on a GaAs substrate for possible applications in chip-to-chip and free space communications. The MSM photodetector and the SMODFET epitaxial material were grown by molecular beam epitaxy (MBE). Device isolation was achieved using an epitaxially grown buffer between the MSM detector layers and SMODFET. The photodetector was designed for maximum absorption at optical wavelength of 770 nm light and the SMODFET impedance matching network was optimized for 44 GHz. The monolithic millimeter wave optical receiver circuit achieved 3 dB gain over a photodetector at 39 GHz, which was the limit of the measurement system. TOUCHSTONE model of the circuit indicated 6.6 dB gain over the photodetector and 5.7 dB total gain including the insertion loss of the photodetector at 44 GHz.

High-speed monolithic receiver OEIC consisting of a waveguide p-i-n photodiode and HEMT's

A novel side-illuminated receiver OEIC, consisting of a waveguide p-i-n photodiode and an InAlAs-InGaAs-HEMT transimpedance amplifier, was fabricated by a dry-etching based process. The OEIC has a 3-dB bandwidth of 8.3 GHz and a transimpedance of 100 /spl Omega/, which enables it to receive a 10-Gb/s NRZ signal. These results represent a major advance in achieving ultrahigh-speed side-illuminated OEICs for long-wavelength optical interconnection and transmission systems.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Development of an integrated high speed silicon PIN photodiode sensor

A silicon integrated PIN photodiode sensor, combined with a bipolar IC on same substrate (that is, a PIN photo integrated circuit sensor: PIN-PICS), was developed by employing a high resistive P/sup --/ epitaxial layer on a P/sup +/ substrate for creating a high speed and high optical responsivity PIN photodiode. We fabricated this device based on two special techniques: (1) the PIN photodiode is formed on a P/sup --//P/sup +/ substrate structure and isolated from bipolar components by the combination of a P/sup -/-well and a trench isolation, and (2) bipolar components are formed by the doubly diffused buried layer of the P/sup -/-well and the N/sup +/ collector wall. All of these components, such as npn and pnp transistors, were arranged within the lightly doped P/sup -/-well regions. From several kinds of trial samples, the following results were obtained. The PIN photodiode with 0.145 mm/sup 2/ active area indicated 680 MHz for cutoff frequency at 10 V bias with 830 mn radiation. In the case of 20 V bias, this value exceeded 1.5 GHz. This PIN-PICS was applied to a 10 Mbit/s burst mode compatible optical monolithic receiver and a transimpedance amplifier, and it has shown the expected results.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

High-frequency, high-efficiency MSM photodetectors

Metal-semiconductor-metal (MSM) photodiodes with submicron spaced interdigitated Schottky barrier fingers have been developed for applications in monolithic integrated optical receiver circuits capable of detecting a millimeter-wave modulation signal. Each photodetector layer, is designed for optimal absorption about a narrow linewidth centered on a specific wavelength between 700 and 800 nm. The MBE grown layers consist of an Al/sub x/Ga/sub 1-x/As cap layer, to prevent any surface recombination of carriers and to minimize top surface reflections; a thin GaAs absorption layer (375 nm), to achieve a high-frequency response (>39 GHz) by minimizing the collection times of optically generated carriers; and a buried Bragg reflector stack which reflects unabsorbed light back into the GaAs absorption layer. Using this layer design, we are able to fabricate detectors that have millimeter-wave bandwidths without sacrificing quantum efficiency. The measured internal quantum efficiency of an MSM photodiode, fabricated on such a layer structure, was 82% at 5 V and close to 94% at 10 V. >

Noise and small-signal performance of three differentmonolithic InP-based 10 Gbit/sphotoreceiver OEICs

Three circuit concepts (high impedance, common gate, and transimpedance) for a 10 Gbit/s monolithic receiver OEIC consisting of an InGaAs/InP pin photodiode and InAlAs/InGaAs/InP HEMTs are compared in terms of noise and small-signal performance using on-wafer measurements. A total equivalent input noise current of 13.5 pA/√Hz within the bandwidth of the transimpedance circuit is the lowest value ever reported for a monolithic InP-based 10 Gbit/s receiver OEIC.

Eight-channel p-i-n/HBT monolithic receiver array at 2.5 Gb/s per channel for WDM applications

We report a monolithic chip incorporating an eight channel p-i-n/HBT photoreceiver array designed for multichannel WDM applications. The p-i-n photodetectors are edge illuminated and centered at a 250 μm pitch for mating with either ribbon fiber connectors or waveguide demultiplexers. Each channel operates at 2.5 Gb/s with an electrical crosstalk of -20 dB between adjacent channels. The average sensitivity of each receiver in the array was measured to be (-20/spl plusmn/1) dBm for a bit error rate of 10/sup -9/ at a wavelength of 1.5 μm.

A monolithic GaAs receiver for optical interconnect systems

A monolithic GaAs optical receiver which includes a photodetector and preamplifier was designed and fabricated using a common 1.0-/spl mu/m GaAs MESFET technology. The optical receiver operates at the data rate of 1 Gb/s. The transimpedance value can be continuously tuned from 1 to 10 k/spl Omega/. The metal-semiconductor-metal photodiode shows a 35% efficiency. Several design factors are considered to achieve high-bandwidth and low-noise operation. An array of the integrated receivers can be compactly implemented in a single chip for high-speed interconnection networks and photonic signal processing. >

A wide-band 760-GHz planar integrated Schottky receiver

A wideband planar integrated heterodyne receiver has been developed for use at submillimeter-wave to far-infrared frequencies. The receiver consists of a log-periodic antenna integrated with a planar 0.8- mu m GaAs Schottky diode. The monolithic receiver is placed on a silicon lens and has a measured room temperature double-side-band conversion loss and noise temperature of 14.9+or-1.0 dB and 8900+or-500 K, respectively, at 761 GHz. These results represent the best performance to date for room temperature integrated receivers at this frequency.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Design considerations for wide-band p-i-n/HBT monolithic transimpedance optical receivers

A comprehensive circuit and device model has been developed for the design of wide-band transimpedance optical receivers using heterojunction bipolar transistors (HBT's). Based on this model, we determine the device and circuit design that gives the highest combination of bandwidth, sensitivity, and stability. For optoelectronic integration, it is convenient to use the collector-base junction of the HBT device structure to fabricate the p-i-n detector. A resulting transistor transit-time effect is shown to cause shunt peaking in the closed-loop response or, at worst, instability. It is shown that the photodiode stray ca- pacitance is not a major source of sensitivity degradation in flip-chip transimpedance receivers. Optimum device structures are determined for InP- and GaAs-based HBT receivers with fine-line as well as relaxed geometries.

Transit-time broad-banding of very high bandwidth monolithic p-i-n/HBT optical receivers

The authors show that phase shifts due to electron transit-times in the collector regions of heterojunction bipolar monolithic optical receivers lead to a widebanding of the frequency response or, at worst, circuit instability. Simple quantitative expressions are derived in order to analyze this effect. The dependence of widebanding on the open-loop transistor bias conditions is discussed. >