Metal Oxide Semiconductor Structures Research Articles

The Characterization and Passivation of Fixed Oxide Charges and Interface States in the $\hbox{Al}_{2}\hbox{O}_{3}/ \hbox{InGaAs}$ MOS System

In this paper, we present a review of experimental results examining charged defect components in the Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> /In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.53</sub> Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.47</sub> As metal-oxide-semiconductor (MOS) system. For the analysis of fixed oxide charge and interface state density, an approach is described where the flatband voltage for n- and p-type Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> /In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.53</sub> Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.47</sub> As MOS structures is used to separate and quantify the contributions of fixed oxide charge and interface state density. Based on an Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> thickness series (10-20 nm) for the n- and p-type In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.53</sub> Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.47</sub> As layers, the analysis reveals a positive fixed charge density ( ~ 9 ×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">18</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-3</sup> ) distributed throughout the Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> and a negative sheet charge density (- 8 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">12</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-2</sup> ) located near the Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> /In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.53</sub> Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.47</sub> As interface. The interface state density integrated across the energy gap is ~1 ×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">13</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-2</sup> and is a donor-type (+/0) defect. The density of the fixed oxide charge components is significantly reduced by forming gas (5 % H <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> / 95% N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ambient at 350 °C for 30 minutes) annealing. The interface state distribution obtained from multi-frequency capacitance-voltage and conductance-voltage measurements on either MOS structures or MOSFETs indicates a peak density located around the In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.53</sub> Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.47</sub> As midgap energy, with a sharp increase in the interface state density toward the valance band and evidence of interface states aligned with the In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.53</sub> Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.47</sub> As conduction band. The integrated interface state density obtained from multi-frequency capacitance-voltage and conductance-voltage analysis is in good agreement with the approach of comparing the flatband voltages in n- and p -type Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> /In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.53</sub> Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.47</sub> As MOS structures. Finally, this paper reviews recent work based on an optimization of the In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.53</sub> Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.47</sub> As surface preparation using (NH <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sub> ) <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> S, combined with minimizing the transfer time to the atomic layer deposition reactor for Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> , which indicates interface state reduction and genuine surface inversion for both n- and p -type Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> /In <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.53</sub> Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.47</sub> As MOS structures.

State Transition of a Defect Causing Random-Telegraph-Noise Fluctuation in Stress-Induced Leakage Current of Thin SiO2 Films in a Metal–Oxide–Silicon Structure

Dynamic fluctuation in stress-induced leakage current – called “variable stress-induced leakage current” – in a gate oxide of a metal–oxide–semiconductor structure was investigated. Variable stress-induced leakage current is attributed to random telegraph noise, which is associated with the state-transition of a single defect. To analyze the mechanism of the state-transition, dependence of state-transition probabilities on gate current and on temperature were investigated. These dependences indicate that the state-transition mechanism is a defect-structure transition by charge collision.

Electrical and optical properties of TiO2 thin films prepared by plasma‐enhanced atomic layer deposition

We report on the electrical and optical characterisation of the high‐permittivity (high‐κ) TiO2 thin films grown by plasma enhanced atomic layer deposition on Si (100) and glass substrates, respectively. TiO2 films were incorporated in metal‐oxide semiconductor (MOS) capacitor structures with an Al metal gate electrode. The as‐deposited films were amorphous; however upon annealing in the temperature range 500–900 °C, crystalline TiO2 in the anatase phase was formed. This was further confirmed by performing Raman measurements where the characteristic features corresponding to the anatase phase were observed. Transmittance and absorption spectra of the as‐deposited and annealed films were performed by UV–Vis measurements showing more than 70% of transmittance. The formation of stoichiometric TiO2 was revealed by X‐ray photoelectron spectroscopy (XPS) and Rutherford backscattering spectroscopy (RBS) analysis performed on annealed samples (500–900 °C). The dielectric constants were calculated from capacitance–voltage (C–V) curves of the MOS structure on the as‐deposited film and annealed films revealing a significant improvement of the dielectric constants from 10 to 75 at AC frequencies of 100 kHz for the 700 °C annealed TiO2 thin films. The increase in the dielectric constant for annealed films could be attributed to the transformation of film structure from amorphous to polycrystalline (anatase). However, the transformation of amorphous to crystalline phase, leads to an increase in the leakage current which was also found best fitted with Schottky emission mechanism at moderated electric fields.

Influence of Al/TiN/SiO2 structure on MOS capacitor, Schottky diode, and fin field effect transistors devices

Titanium nitride (TiN) films were tested for their suitability as upper electrodes in metal–oxide–semiconductor (MOS) capacitors and Schottky diodes and as metal gate electrodes in fin field effect transistor devices. TiOxNy formation on TiN surfaces was confirmed by x-ray photoelectron spectroscopy and appears to be associated with exposure of the metal electrodes to ambient air. In order to avoid the formation of TiOxNy and TiO2, a layer of aluminum (Al) was deposited in situ after the TiN deposition. TiN work function was calculated for the devices to study how dipole variation at the interface TiN/SiO2 influences TiN work function. TiOxNy and TiO2 formation at the film surface was found to affect the dipole variations at the TiN/SiO2 interface increasing the dipole influence on MOS structure. Furthermore, the estimated values TiN work function are suitable for complementary metal–oxide–semiconductor (CMOS) technology. Finally, this work had shown that Al/TiN structure can be used in CMOS technology, especially on n-type metal–oxide–semiconductor field effect transistor devices.

Analytical Model for Drift Region Voltage Drop in 4H-SiC Vertical Double Implanted Metal Oxide Semiconductor Field Effect Transistor: Effect of Anisotropy

Silicon carbide (4H-SiC as well as 6H-SiC) is known to be an anisotropic material. Among others, the transport parameters in the c-direction such as low field mobility and saturation velocity, are moderately different from those in the a- and b-directions in the case of 4H-SiC, while this difference becomes remarkable in the case of 6H-SiC. The aim of this study is to investigate the effect of this anisotropy on an analytical model for “drift region voltage drop” in a 4H-SiC vertical double implanted metal oxide semiconductor (VDIMOS) structure.

Study of molar ratio on the characteristics of metal–organic decomposed LaxCe1−xOz film as a metal reactive oxide on Si substrate

A metal–organic decomposition technique was employed in this study for the preparation of a solution precursor using different molar ratios of lanthanum (La) to cerium (Ce), which was spin-coated on an n-type Si substrate. Post-deposition annealing was subsequently performed at 1000°C for 15min in argon on the samples to transform the precursor into lanthanum cerium oxide (LaxCe1−xOz) film. This work correlated the influence of decreasing content of La3+ in the LaxCe1−xOz film with formation of oxygen vacancies. Generation of higher amounts of oxygen vacancies in LaxCe1−xOz has evoked an interest in the study of LaxCe1−xOz as a metal reactive oxide on Si substrate for oxygen gas sensing. These oxygen vacancies would serve as active sites for capturing oxygen ions, which were formed as a result of chemisorption of oxygen atoms originating from oxygen gas. The response of oxygen gas sensing for the fabricated Al/LaxCe1−xOz/Si metal–oxide–semiconductor structures was characterized and discussed.

Modulation of the effective work function of TiN metal gate for PMOS application

It is important to find a way to modulate the work function of TiN metal gate towards the valence band edge of Si, which can meet the lower threshold voltage requirement of p-type metal—oxide—semiconductor (MOS) transistor. In this work, effects of TiN thickness, post-deposition annealing (PDA), oxygen incorporation and N concentration variation on the work function of TiN metal gate in MOS structures are systematically investigated. It can be found that the work function positively shifts at the initial stage as the thickness of the TiN layer increases and stabilizes at such a thickness. PDA at N2 ambience with a trace of O2 can also cause a positive shift in the work function of TiN metal gate. The same tendency can be observed when oxygen is incorporated into TiN. Finally, increasing the N concentration in TiN can also positively shift the work function. All these measures are effective in modulating the TiN metal gate so that it is more suitable for PMOS application.

Hard x-ray photoelectron spectroscopy and electrical characterization study of the surface potential in metal/Al2O3/GaAs(100) metal-oxide-semiconductor structures

Hard x-ray photoelectron spectroscopy (HAXPES) has been used to study metal-oxide-semiconductor (MOS) structures fabricated with both high (Ni) and low (Al) work-function metals on 8-nm thick Al${}_{2}$O${}_{3}$ dielectric layers, deposited on sulfur passivated $n$- and $p$-doped GaAs substrates. A binding energy difference of 0.6 eV was measured between the GaAs core levels of the $n$- and $p$-doped substrates in the absence of gate metals, indicating different Fermi level positions in the band gap. Subsequent photoemission measurements made on the MOS structures with the different work-function metals displayed very limited change in the GaAs core level binding energies, indicating that the movement of the Fermi level at the Al${}_{2}$O${}_{3}$/GaAs interface is restricted. Using a combination of HAXPES measurements and theoretical calculations, the Fermi level positions in the band gap have been determined to be in the range of 0.4--0.75 eV and 0.8--1.11 eV above the valence band maximum for $p$- and $n$-type GaAs, respectively. Analysis of capacitance voltage (C-V) measurements on identically prepared samples yield very similar Fermi level positions at zero applied gate bias. The C-V analysis also indicates a higher interface defect density ($D$${}_{it}$) in the upper half of the GaAs bandgap.

Growth and electrical properties of spin coated ultrathin ZrO2 films on silicon

Ultrathin (&amp;lt;50 nm) zirconium oxide (ZrO2) films are being intensively studied as high-k dielectrics for future metal-oxide-semiconductor (MOS) technology. In this paper, ultrathin ZrO2 films are deposited on silicon substrates by spin on deposition technique and annealed at 700 °C for different duration. The phase formation and morphological study have been performed by x-ray diffraction and scanning electron microscopy, respectively. Electrical properties of the films are investigated. The threshold voltages of the MOS structure were found to vary from −1.5 V to −2.5 V as the annealing time increases. The dielectric constants of the films are found to be 7.2–7.67 at 1 KHz. Leakage current of the films is found to increase with the annealing time. The dielectric breakdown field of the film is found to be 6.29–8.15 MV/cm.

Investigation of Characteristics of Al2O3/n-In x Ga1−x As (x = 0.53, 0.7, and 1) Metal–Oxide–Semiconductor Structures

The electrical properties of Al2O3/n-InGaAs metal–oxide–semiconductor capacitors (MOSCAPs) with In content of 0.53, 0.7, and 1 (InAs) have been investigated. Results show small capacitance–voltage (C–V) frequency dispersion in accumulation (1.70% to 1.85% per decade) for these MOSCAPs, mostly being assigned to border traps in Al2O3. With higher In content, shorter minority-carrier response time and smaller C–V hysteresis are observed. The reduction of C–V hysteresis might be related to the reduction of Ga-bearing oxides in Al2O3/InGaAs interfaces as indicated by x-ray photoelectron spectroscopy.

Failure mechanism of copper through-silicon vias under biased thermal stress

We report the failure of copper through-silicon via (TSV) under biased thermal stress. The time-dependent dielectric breakdown (TDDB) of the oxide liner in the TSV was measured to detect the migration of copper from TSV to silicon. The breakdown of the oxide liner occurred by thermal cracking followed by fast drift of copper ions through the crack. For the TSV structure, there were an initial decrease in the leakage current and then the breakdown of oxide, which is different from the 3-stage TDDB behavior observed in the planar metal-oxide-semiconductor (MOS) structure. Micro-cracks in the oxide liner at the top corner of TSV were observed after TDDB measurement, and the thermal cracking of the oxide was caused by the expansion of copper TSV at test condition. Finite element analysis showed the tensile stress of 670MPa concentrated at the top corner of the TSV. The mechanism of TDDB in both TSV and planar MOS structures were also described comparatively.

Current transport mechanism of antimony-doped TiO2 nanoparticles based on MOS device

The present work reports the fabrication and electrical characterizations of Sb-doped TiO2/n-Si metal–oxide-semiconductor (MOS) device. To determine the effect of antimony dopant on the physical properties of TiO2, pure and Sb-doped thin films were characterized by X-ray diffraction (XRD), field emission scanning electron microscope (FESEM) and ultraviolet–visible (UV–vis) spectroscopy. Current–voltage (I–V) and capacitance–voltage (C–V) measurements were done to determine electrical properties of the MOS structure. This structure showed a good rectifying behavior with a typical ideality factor of 2.09, which was considered high due to the current mechanism and large defect density at the interface. The possible conduction mechanism of the MOS structure was determined by analyzing the I–V characteristics. The obtained results show that this MOS structure is an excellent candidate for semiconductor device applications.

New method for determining flat-band voltage in high mobility semiconductors

The method that is commonly used for determining the flat-band voltage (VFB) and the flat-band capacitance (CFB) of metal oxide semiconductor (MOS) capacitors depends on many parameters and can only be used in the case of low interface trap density (Dit) when the capacitance–voltage measurements are carried out at high frequencies. This paper demonstrates a new and simple method for determining VFB and CFB. The method is based on the point of inflection in the capacitance–voltage curve. This method does not require the knowledge of material or experimental parameters and can be used on high Dit and high border trap density MOS structures at all frequencies.

Capacitance–voltage characterization of surface-treated Al2O3/GaN metal–oxide–semiconductor structures

Display Omitted We show the effect of surface treatment between the Al2O3 and the recess-etched GaN.We have investigated the effect of TMAH surface treatment.The C-V characteristics were improved with the surface treatment.We result low effective oxide charge and interface trap density.We result less charge trapping in the gate dielectric. The effect of surface treatment on the interfacial properties between the Al2O3 gate dielectric and the recess-etched GaN surface of the AlGaN/GaN-based MOSFET has been characterized by capacitance-voltage (C-V) measurements. The recessed GaN surface was treated in the tetramethylammonium hydroxide (TMAH) solution at 85?C for 10min to smoothen the surface and remove the plasma damage. The surface treatment decreases the interface trap density by removing surface traps related to the native surface oxide such as GaxOy, which results in much improved C-V characteristics.

Threshold Switching and Conductance Quantization in Al/HfO2/Si(p) Structures

Volatile threshold switching and non-volatile memory switching modes of resistive switching are reported in Al/HfO2/Si(p) metal–oxide–semiconductor structures with different values of current compliance limit during electroforming. When the current is limited to below 100 µA, a reproducible threshold switching loop is reported under injection from the p-type silicon substrate. The conduction in the low resistance state is linear above a voltage threshold called holding voltage and the conductance is a non-integer multiple of the quantum of conductance. Depending on the size of the conducting filament created during the electroforming process, one or several quasi-one dimensional quantum subbands are found to contribute to the current. Abrupt transitions between different discrete conductance values are reported during increasing and decreasing voltage sweeps. These results provide strong experimental evidence suggesting that the conduction filament behaves as a quantum wire (QW). No structural instability of the filament has to be invoked to explain either the highly structured conduction properties or the set and reset switching transitions. It is claimed that the whole phenomenology can be understood by electron injection from the valence band into a narrow conducting path which behaves as a QW.

Quasi-static capacitance–voltage characteristics of pentacene-based metal–oxide–semiconductor structures

Quasi-static capacitance–voltage (QSCV) measurements are performed on modified metal–oxide–semiconductor capacitors in order to investigate the capacitance characteristics of the active channel region of organic thin-film transistors (OTFTs). Devices are fabricated on highly doped Si wafer with SiO2 as the gate dielectric and pentacene as the organic semiconductor. Hysteresis is observed in the QSCV characteristics, which is explained with the charge trapping in the organic semiconductor. In addition, we show that surface charges generated by Au penetration into pentacene can cause plateaus in the QSCV curves. A behavioral PSpice model is also presented which allows QSCV simulations of OTFTs to be performed.

Simulation of the influence of interface states on capacitance characteristics of insulator/AlGaN/GaN heterojunctions

We have studied numerically the capacitance properties of insulator/AlGaN/GaN MIS heterostructures and the influence of interface traps on the capacitance curves shape. By using the basic semiconductor equations we simulated the capacitance–voltage (C–V) curves of these structures for high-frequency signals. We obtained two steps in the C–V curves. The curves with the interface traps are shifted in voltage at both steps depending on whether the trap is of an acceptor or a donor type. The new knowledge found is that the shift caused by the change of the population of interface states is overlapped in almost the whole semiconductor energy gap by a charge change in a two-dimensional electron gas (2DEG). Finally, the presence of deep levels causes widening of the capacitance plateau instead of stretching of the C–V curves. So, the assessment of interface states density for MIS heterostructures is not expected to be so straightforward like in Si metal oxide semiconductor structures.

Optical propagation and refraction in silicon complementary metal–oxide–semiconductor structures at 750 nm: toward on-chip optical links and microphotonic systems

This paper analyzes the optical propagation and refraction phenomena in various complementary metal–oxide–semiconductor (CMOS) structures at 750 nm wavelength. Operation at these wavelengths offers the potential realizations of small microphotonic systems and micro-opto-electro-mechanical systems (MOEMS) in CMOS integrated circuitry, since Si-based optical sources, waveguides, and silicon (Si) detectors can all be integrated on a single chip. It could also increase the optical coupling efficiencies to external optical fibers. With the help of Monte Carlo and RSoft BeamPROP simulations, we demonstrate achievements with regard to optimizing vertical emission, focusing, refraction, splitting and wave guiding in 0.35 to 1.2 μm CMOS technology at 750 nm wavelength. The material properties, refractive indices, and thicknesses of various CMOS over-layers were incorporated in the simulations and analyses. The analyses show that both Si nitride and Si oxi-nitride offer good viability for developing such waveguides. Effective single-mode wave-guiding with calculated loss characteristics of 0.65 dB⋅cm −1 , with modal dispersion characteristics of less than 0.2 ps⋅cm −1 and with a bandwidth-length product of higher than 100 GHz-cm seems possible. A first iteration realization of an optical link is demonstrated, utilizing specially designed avalanche-based Si-LEDs and a specially designed first iteration CMOS waveguide. Potential applications of avalanche-based Si LEDs into microphotonic systems and MOEMS are furthermore proposed and highlighted.

La2O3/In0.53Ga0.47As metal–oxide-semiconductor capacitor with low interface state density using TiN/W gate electrode

Effect of W and TiN/W gate metal on the interface quality of La2O3/InGaAs metal–oxide-semiconductor (MOS) interface is investigated. Hard X-ray photoelectron spectroscopy revealed that gate metal greatly affects the oxidation states at La2O3/InGaAs interface after post-metallization annealing (PMA). Results demonstrate that TiN/W gate metal can effectively control the reaction at La2O3/InGaAs interface and also suppress the formation of As, Ga, and In oxides. As a result, superior capacitance–voltage (C–V) characteristics with low interface state density (Dit) of 4.6×1011cm−2/eV (∼0.1eV from midgap) and leakage current below 10−5A/cm2 was obtained for TiN/W/La2O3 (10nm)/InGaAs MOS capacitors. The MOS structure integrity was preserved for annealing temperature up to 620°C.

GaN quantum-dots integrated in the gate dielectric of metal-oxide-semiconductor structures for charge-storage applications

Gallium nitride quantum dots (QDs) were investigated as discrete charge storage nodes embedded in the gate dielectric of metal-oxide-semiconductor (MOS) capacitors. The GaN QDs were formed on top of 3.5 nm-thick SiO2/n-Si(001) substrates by radiofrequency plasma-assisted molecular beam deposition. The MOS structures were studied by transmission electron microscopy. Deposition dose was determined as a critical process parameter to obtain two dimensional arrays of discrete QDs. The memory window width, programming speed, and charge retention time were evaluated for GaN QD devices with different deposition doses. All devices showed enhanced electron trapping leading to significant memory windows. Charge retention measurements, at room temperature, revealed that the sample with the lowest concentration of QDs exhibits a low charge loss with a significant extrapolated programming window after 10 yrs. The present study not only demonstrates GaN QD embedded SiO2 structures fabricated by a fully complementary metal oxide semiconductor compatible method but also points out that these structures are promising for the realization of nanofloating gate non-volatile memory devices.