Magnetic Tunnel Junction Devices Research Articles

Write error rate analysis of field-free spin-orbit torque switching in conically magnetized free layer nanomagnet

Enhancing the performance of magnetic random access memories (MRAMs) is crucial, considering speed, energy efficiency, and endurance. Spin-orbit torque-based MRAMs offer ultrafast operation and enhanced reliability. Still, the energy efficiency and external magnetic field requirement for deterministic switching of nanomagnets with perpendicular magnetic anisotropy (PMA) are a significant hurdle. To address these issues, one of the proposed solutions employs a conically magnetized free layer magnetic tunnel junction device featuring second-order PMA. This approach can minimize the required switching current density by leveraging the interplay between first- and second-order PMA energies. Additionally, coupling with exchange bias from the antiferromagnet can eliminate the need for an external field entirely. Our analysis investigates the impact of current density (magnitude and rise/fall time), first- and second-order PMA fields, exchange bias, and field-like torque on the device's switching performance. By optimizing the perpendicular magnetic anisotropies, we report improvement in the write error rate from 10−4 to 10−7. Our findings hold promise for magnetic memory applications.

Process-in-Memory realized by nonvolatile Task-Scheduling and Resource-Sharing XNOR-Net hardware Accelerator architectures

Due to the success of artificial intelligence systems in solving complex problems, these systems have been investigated in many applications. There is an increasing demand for these systems in many new applications. The XNOR-Net, a binary neural network, is a promising candidate for implementing these systems in devices with limited power and hardware resources. Efficient hardware implementation of XNOR-Nets is critical and has been widely investigated in recent research. In this paper, a resource-sharing gate and architecture and a task-scheduling gate and architecture have been proposed. To reduce power consumption, the proposed nonvolatile logic-in-memory gates are designed based on the magnetic tunnel junction (MTJ) and carbon nanotube field-effect transistor (CNTFET) devices. Using the proposed resource-sharing gate for hardware implementation of XNOR-Net minimizes the number of flip-flops, power consumption, PDP, and area by at least 75%, 75%, 60%, and 42%, respectively, as compared to its state-of-the-art counterparts. Also, using the proposed task-scheduling design to implement the XNOR-Net on 2, 4, and 8 datasets, the power consumption is reduced by at least 24%, 54%, and 65%, respectively, compared to its state-of-the-art counterparts.

First-principle study of CrO2-BNNT-CrO2 based MTJ device using EHTB model and its application in a MRAM circuit

In this work we investigated the performance of Single-Walled Boron Nitride Nanotube (SWBNNT) sandwiched between CrO2 based Magnetic Tunnel Junction (MTJ) structures with atomistic simulations. MTJ based device-level simulation was performed using the Extended Huckel based Tight Binding (EHTB) model. The SWBNNT as a dielectric layer and CrO2 as Ferromagnetic (FM) layers based Magnetic Tunnel Junction (MTJ) heterostructure was computed. The proposed MTJ device operates at the nano-Ampere (nA) range depicting its potential application in a low-powered nanoelectronics device. It also shows a promising Tunnel Magnetoresistance (TMR) effect. The practical circuit-level implementation of the proposed MTJ device in Magnetic Random-Access Memory (MRAM) was validated using LTspice. Hence, the calculated static power consumption and writing energy per bit was minimal for S1 and S2 based MRAM circuit. The perfect switching operation was depicted by the proposed MTJ device based MRAM.

Compact leak-integrate-fire neuron with auto-reset functionality based on a single spin–orbit torque magnetic tunnel junction device

Leaky-integrate-fire (LIF) neurons are core components to construct a spiking neural network. The emulation of LIF neurons has been implemented in spintronic devices, but typically suffers from challenges, such as relatively complex design and the requirement of additional operations for resetting. In this Letter, we propose a compact LIF neuron device realized within a single spin–orbit torque (SOT) magnetic tunnel junction device. Distinct from standard memory devices, the input SOT current for the integrating process is applied in a manner such that the magnetization cannot cross the hard plane. Consequently, the device can automatically reset to its original state by the combined effects of anisotropy and damping, which play a vital role during the leaky process as well. We verify the proposal in three types of SOT devices by micromagnetic simulations, and the power consumption is estimated as 0.1 pJ/spike. The auto-reset process is further captured by our single-shot dynamic experiments. With the state-of-the-art SOT technology, our work provides a concise and plausible scheme to mimic LIF neurons, which is of practical interest for neuromorphic computing.

Electrical Detection and Nucleation of a Magnetic Skyrmion in a Magnetic Tunnel Junction Observed via Operando Magnetic Microscopy.

Magnetic skyrmions are topological spin textures which are envisioned as nanometer scale information carriers in magnetic memory and logic devices. The recent demonstrations of room temperature skyrmions and their current induced manipulation in ultrathin films were first steps toward the realization of such devices. However, important challenges remain regarding the electrical detection and the low-power nucleation of skyrmions, which are required for the read and write operations. Here, we demonstrate, using operando magnetic microscopy experiments, the electrical detection of a single magnetic skyrmion in a magnetic tunnel junction (MTJ) and its nucleation and annihilation by gate voltage via voltage control of magnetic anisotropy. The nucleated skyrmion can be manipulated by both gate voltages and external magnetic fields, leading to tunable intermediate resistance states. Our results unambiguously demonstrate the readout and voltage controlled write operations in a single MTJ device, which is a major milestone for low power skyrmion based technologies.

Spin‐Transfer‐Torque Magnetic Tunnel Junction Nonlinear In‐Sensor Computing Synapse for Improving the Performance of the Feedforward Neural Network

In‐sensor computing architecture has a great advantage especially in massive data sampling, transfer, and processing compared with the separated intelligent sensor systems. However, most of the in‐sensor computing device is proposed based on the traditional neural network model, where the synapse performs linear multiplication of input and weight. This approach fails to make the most use of the nonlinearity of in‐sensor computing devices. Therefore, in this article, first a modified feedforward neural network model with the nonlinear in‐sensor computing synapse (NSCS) located at the input layer is presented, and the backpropagation (BP) algorithm is modified to train the network. Then, the nonlinear characteristics of the NSCS composed of the spin‐transfer‐torque magnetic tunnel junction (STT–MTJ) devices and simple complementary metal‐oxide‐semiconductor (CMOS) circuit are analyzed. Based on the nonlinear response of STT–MTJ NSCS, the small‐scale network with NSCS synapse is experimented on the Modified National Institute of Standards and Technology dataset and compared with the traditional network of the same network size. In the simulation result, it is shown that better performance can be achieved with the STT–MTJ NSCS, including a 2–15 times improvement in convergence speed and a 2.5%–5.1% increase in accuracy.

L10 FePd-based perpendicular magnetic tunnel junctions with 65% tunnel magnetoresistance and ultralow switching current density

L10 FePd is increasingly recognized as a potential candidate for magnetic tunnel junctions (MTJs), yet there remains room for enhancing device performance. In this work, we fabricated fully-integrated L10 FePd-based perpendicular MTJ devices and achieved a significant increase in tunnel magnetoresistance, reaching ∼65%, compared to the previous record of 25%. Notably, we observed bi-directional switching with a low switching current density of about 1.4 × 105 A/cm2, which outperforms the typical spin-transfer torque (STT) MTJ by about one order of magnitude. We propose two possible mechanisms to elucidate the switching process and associated device performance: (1) The voltage-controlled exchange coupling-driven switching of the bottom CoFeB layer; (2) The STT-driven switching of the exchange-coupled L10 FePd–CoFeB composite. While additional research is necessary, these findings may further advance the integration of L10 FePd into spintronic devices, potentially enabling low-energy memory and logic technologies.

Temperature-resilient random number generation with stochastic actuated magnetic tunnel junction devices

Temperature-resilient random number generation with stochastic actuated magnetic tunnel junction devices

Novel CPU cache architecture based on two-dimensional MTJ device with ferromagnetic Fe3GeTe2

With the development of Artificial Intelligence (AI) in recent years, the fields of computer, biology, medicine, and aerospace have demanded higher requirements for the processing and storage of information. In this paper, a novel Magnetic Tunnel Junction (MTJ) based Spin-Orbital Torque Magnetic Random Access Memory (SOT-MRAM) composed of Fe3GeTe2 (FGT) is employed as a storage medium in the computer architecture. On the basis of the analysis of the fundamentals, model configuration, characteristics and performance advantages of the FGT based SOT device, a hybrid storage (L1, L2, Last Level Cache) is constructed, with FGT-SOT-MRAM, conventional SOT-MRAM and STT-MRAM replacing the original static random access memory (SRAM) in the novel triple-level CPU cache architecture. This can override the increasing leakage problem of SRAM, while opening up the application of two-dimensional van der Waals ferromagnets in computer systems at the L1 cache level. Meanwhile, an innovative cache optimization scheme is put forward for magnetic memory to better match the performance of FGT-SOT-MRAM to CPU. The simulation results demonstrate that the FGT-based MRAM can achieve up to 38.03% IPC optimization and 53.41% power optimization in the CPU cache system in contrast to the conventional ones.

Realization of Artificial Neurons and Synapses Based on STDP Designed by an MTJ Device.

As the third-generation neural network, the spiking neural network (SNN) has become one of the most promising neuromorphic computing paradigms to mimic brain neural networks over the past decade. The SNN shows many advantages in performing classification and recognition tasks in the artificial intelligence field. In the SNN, the communication between the pre-synapse neuron (PRE) and the post-synapse neuron (POST) is conducted by the synapse. The corresponding synaptic weights are dependent on both the spiking patterns of the PRE and the POST, which are updated by spike-timing-dependent plasticity (STDP) rules. The emergence and growing maturity of spintronic devices present a new approach for constructing the SNN. In the paper, a novel SNN is proposed, in which both the synapse and the neuron are mimicked with the spin transfer torque magnetic tunnel junction (STT-MTJ) device. The synaptic weight is presented by the conductance of the MTJ device. The mapping of the probabilistic spiking nature of the neuron to the stochastic switching behavior of the MTJ with thermal noise is presented based on the stochastic Landau-Lifshitz-Gilbert (LLG) equation. In this way, a simplified SNN is mimicked with the MTJ device. The function of the mimicked SNN is verified by a handwritten digit recognition task based on the MINIST database.

Performance analysis of fluorinated silicene based magnetic tunnel junction

Two-dimensional material based Spintronic devices are considered to be the promising next generation nano-electronic devices due to their low power, high speed and enhanced data storage capabilities. In this work, firstly we have investigated the effect of fluorination on the electronic/structural properties of zigzag/armchair silicene. Next, we have modelled a magnetic tunnel junction (MTJ) device consisting of CrO2 electrodes and fluorine passivated armchair silicene nanoribbon as scattering region. The spin dependent transport properties are calculated via first principles calculations combined with non-equilibrium Green's function formalism. The modeled MTJ device shows very large magnetoresistance as compared to the state of art reported devices and high spin injection efficiency. The spin-dependent transmission spectrum and density of states were calculated to elucidate the obtained transport characteristics.

Spin Injection Through Ferromagnetic/Organic Semiconductor Interfacial Defect States in Hybrid Magnetic Tunnel Junctions

In this paper, we have worked on defect assisted spin transport at ferromagnetic(FM)/Organic semiconductor(OSC) interfaces leading to modified TMR response in hybrid magnetic tunnel junction (MTJ) devices. The simulation considers Non-Equilibrium Green’s function assuming spin precession at FM/OSC interface defect states. Both carrier injection (band to band) and phonon assisted tunneling through organic spacer optical gap led to modified spin transfer torque (STT) across the magnetic tunnel junction (MTJ) devices. Higher compensation of spin-damping due to out-of-plane STT led to higher TMR response for the MTJ devices.

Orthogonal Spin Current Injected Magnetic Tunnel Junction for Convolutional Neural Networks

We propose that a spin Hall effect (SHE) driven magnetic tunnel junction (MTJ) device can be engineered to provide a continuous change in the resistance across it when injected with orthogonal spin currents. Using this concept, we develop a hybrid device-circuit simulation platform to design a network that realizes multiple functionalities of a convolutional neural network (CNN). At the atomistic level, we use the Keldysh nonequilibrium Green’s function (NEGF) technique that is coupled self-consistently with the stochastic Landau-Lifshitz-Gilbert–Slonczewski (LLGS) equations, which in turn is coupled with the HSPICE circuit simulator. We demonstrate the simultaneous functionality of the proposed network to evaluate the rectified linear unit (ReLU) and max-pooling functionalities. We present a detailed power and error analysis of the designed network against the thermal stability factor of the free ferromagnets (FMs). Our results show that there exists a nontrivial power-error trade-off in the proposed network, which enables an energy-efficient network design based on unstable free FMs with reliable outputs. The static power for the proposed ReLU circuit is 0.56 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $</tex-math> </inline-formula> W and whereas the energy cost of a nine-input ReLU -max-pooling network with an unstable free FM ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sf\Delta$</tex-math> </inline-formula> <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$=$</tex-math> </inline-formula> 15) is 3.4 pJ in the worst case scenario. We also rationalize the magnetization stability of the proposed device by analyzing the vanishing torque gradient points.

Area-Efficient Auto-Write-Terminate Circuit for NV Latch and Logic-In-Memory Applications

Spin transfer torque (STT) based magnetic tunnel junction (MTJ) device is a commercially appealing option for non-volatile latches and flip-flops. In this paper, an STT-MTJ based non-volatile latch with auto-writeterminate (AWT) feature is proposed. The proposed latch has a simple structure, better stability, and higher speed, and is easy to integrate with CMOS logic styles. Also, no additional write driver circuit is needed, resulting in a smaller footprint while writing into the MTJs. Therefore, the proposed latch consumes less power than earlier latches while using fewer transistors for a write operation and logic implementation. The proposed AWT circuit continuously monitors the write operation and prevents redundant MTJ writing and removes excessive write current flow, thereby saving write energy. The AWT circuitry can save the total write energy by ~83% when compared to the conventional write circuit. Also, the proposed circuitry for self-write termination uses 75% fewer transistors compared to previously proposed circuits.

Stochastic domain wall-magnetic tunnel junction artificial neurons for noise-resilient spiking neural networks

The spatiotemporal nature of neuronal behavior in spiking neural networks (SNNs) makes SNNs promising for edge applications that require high energy efficiency. To realize SNNs in hardware, spintronic neuron implementations can bring advantages of scalability and energy efficiency. Domain wall (DW)-based magnetic tunnel junction (MTJ) devices are well suited for probabilistic neural networks given their intrinsic integrate-and-fire behavior with tunable stochasticity. Here, we present a scaled DW-MTJ neuron with voltage-dependent firing probability. The measured behavior was used to simulate a SNN that attains accuracy during learning compared to an equivalent, but more complicated, multi-weight DW-MTJ device. The validation accuracy during training was also shown to be comparable to an ideal leaky integrate and fire device. However, during inference, the binary DW-MTJ neuron outperformed the other devices after Gaussian noise was introduced to the Fashion-MNIST classification task. This work shows that DW-MTJ devices can be used to construct noise-resilient networks suitable for neuromorphic computing on the edge.

A high‐capacity and nonvolatile spintronic associative memory hardware accelerator

AbstractSignificant progress has been made in manufacturing emerging technologies in recent years. This progress implemented in‐memory‐computing and neural networks, one of today's hottest research topics. Over time, the need to process complex tasks has increased. This need causes the emergence of intelligent processors. A nonvolatile associative memory based on spintronic synapses utilising magnetic tunnel junction (MTJ) and carbon nanotube field‐effect transistors (CNTFET)‐based neurons is proposed. The proposed design uses the MTJ device because of its fascinating features, such as reliable reconfiguration and nonvolatility. At the same time, CNTFET has overcome conventional complementary metal‐oxide‐semiconductor shortcomings like the short channel effect, drain‐induced barrier lowering, and poor hole mobility. The proposed design is simulated in the presence of process variations. The proposed design aims to increase the number of weights generated in the synapse for higher memory capacity and accuracy. The effect of different tunnel magnetoresistance (TMR) values (100%, 200%, and 300%) on the performance and accuracy of the proposed design has also been investigated. This investigation shows that the proposed design performs well even with a low TMR value, which is very important and remarkable from the fabrication point of view.

A Nonvolatile Compute-in-Memory Macro Using Voltage-Controlled MRAM and In Situ Magnetic-to-Digital Converter

Compute-in-Memory (CIM) accelerator has become a popular solution to achieve high energy efficiency for deep learning applications in edge devices. Recent works have demonstrated CIM macros using non-volatile memories (STT-MRAM, RRAM) to take advantages of their non-volatility and high density. However, effective computation dynamic range is far lower than their SRAM-CIM counterparts due to low device ON/OFF ratio. In this work, we combine a non-volatile memory based on a voltage-controlled magnetic tunneling junction (VC-MTJ) device, called voltage-controlled MRAM or VC-MRAM, and accurate switched-capacitor based CIM using a novel <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">in-situ</i> Magnetic-to-Digital Converter (MDC). The VC-MTJ device has demonstrated 10× lower write energy and switching time compared to STT-MRAM device and has comparable density, read energy and read latency. The <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">in-situ</i> MDCs embedded inside each VC-MRAM row convert magnetically stored weight information to CMOS logic levels and enable switched-capacitor based multiply–accumulate (MAC) operation with accuracy comparable to state-of-the-art SRAM-CIM. This paper describes the schematic and layout level design of a VC-MRAM CIM macro in 28nm. This is the first non-volatile CIM design to enable analog MAC computation with 256 parallel rows turned ON simultaneously without degradation in dynamic range (< 1 LSB). Detailed circuit simulations including experimentally validated VC-MTJ compact models show 1.5× higher energy efficiency and 2× higher density compared to state-of-the-art SRAM-based CIM.

Electromagnetic Radiation Effects on MgO-Based Magnetic Tunnel Junctions: A Review.

Magnetic tunnel junctions (MTJs) have been widely utilized in sensitive sensors, magnetic memory, and logic gates due to their tunneling magnetoresistance. Moreover, these MTJ devices have promising potential for renewable energy generation and storage. Compared with Si-based devices, MTJs are more tolerant to electromagnetic radiation. In this review, we summarize the functionalities of MgO-based MTJ devices under different electromagnetic irradiation environments, with a focus on gamma-ray radiation. We explore the effects of these radiation exposures on the MgO tunnel barriers, magnetic layers, and interfaces to understand the origin of their tolerance. This review enhances our knowledge of the radiation tolerance of MgO-based MTJs, improves the design of these MgO-based MTJ devices with better tolerances, and provides information to minimize the risks of irradiation under various irradiation environments. This review starts with an introduction to MTJs and irradiation backgrounds, followed by the fundamental properties of MTJ materials, such as the MgO barrier and magnetic layers. Then, we review and discuss the MTJ materials and devices' radiation tolerances under different irradiation environments, including high-energy cosmic radiation, gamma-ray radiation, and lower-energy electromagnetic radiation (X-ray, UV-vis, infrared, microwave, and radiofrequency electromagnetic radiation). In conclusion, we summarize the radiation effects based on the published literature, which might benefit material design and protection.

TEMT: A Transient Electronic–Magnetic–Thermal-Coupled Simulation Framework for STT-MTJs

Being a promising candidate for future non-volatile memory and neuromorphic computing, Spin-Transfer-Torque Magnetic Tunnel Junction (STT-MTJ) devices are gaining substantial momentum in industrial adoption in recent years, calling for EDA support for higher modeling capabilities. However, the complex interplay of multiple physical mechanisms featured in MTJ devices impose substantial challenges to their numerical modeling. In this work, we propose a fully coupled, transient electronic-magnetic-thermal (TEMT) modelling approach for STT-MTJ devices. Aiming to be first-principle and physically holistic, TEMT combines the atomistic non-equilibrium Green’s function (NEGF) model for tunneling currents, the Landau-Lifshitz-Gilbert-Slonczewski (LLGS) equation for magnetic dynamics and the heat conduction equation (HCE) for thermal dynamics in a self-consistent manner. To alleviate computational burden, we also devise an analytical approximation approach to reduce the number of NEGF solutions in the TEMT framework, which leads to over 15X speed-up with a very mild accuracy loss. An in-depth investigation of STT-MTJ devices using the TEMT framework is conducted to demonstrate its benefits and performance.

Electric field tunable multi-state tunnel magnetoresistances in 2D van der Waals magnetic heterojunctions

Magnetic tunnel junction (MTJ) based on van der Waals (vdW) magnetic layers has been found to present excellent tunneling magnetoresistance (TMR) property, which has great potential applications in field sensing, nonvolatile magnetic random access memories, and spin logics. Although MTJs composed of multilayer vdW magnetic homojunction have been extensively investigated, the ones composed of vdW magnetic heterojunction are still to be explored. Here, we use first-principles approaches to reveal that the magnetic heterojunction MTJs have much more distinguishable TMR values than the homojunction ones. In the MTJ composed of bilayer CrI3/bilayer Cr2Ge2Te6 heterojunction, we find there are eight stable magnetic states, leading to six distinguishable electronic resistances. As a result, five sizable TMRs larger than 300% can be obtained (the maximum TMR is up to 620 000%). Six distinguishable memories are obtained, which is two times larger than that of a four-layered homojunction MTJ. The underlying relationships among magnetic state, spin-polarized band structures, and transmission spectra are further revealed to explain the multiple TMR values. We also find that the magnetic states, and thus TMRs, can be efficiently modulated by an external electric field. This study opens an avenue to the design of high-performance MTJ devices based on vdW heterojunctions.