Low-power Memory Research Articles

Nonvolatile Memory Device Based on the Ferroelectric Metal/Ferroelectric Semiconductor Junction.

The ferroelectric tunnel junction (FTJ) is a competitive candidate for post-Moore nonvolatile memories due to its low power consumption and nonvolatility, with its performance being strongly dependent on the conditions for contact between the ferroelectric material and the metal electrode. The development of two-dimensional materials in recent years has offered new opportunities such as functional metal layers, which is challenging for traditional FTJ systems. Here, we introduce the newly discovered ferroelectric metal WTe2 as the electrode to construct WTe2/α-In2Se3/Au ferroelectric semiconductor junctions. The interplay between the ferroelectricity in the van der Waals electrode and tunnel junction leads to the emergence of novel device characteristics, including concomitant multiresistance levels, a low switching voltage (<2 V), and a high on/off ratio (>105). Using ferroelectric metal as the electrode for the ferroelectric tunnel/semiconductor junction offers an alternative approach to low-power and high-density ferroelectric memory devices.

Enhancing the Resistive Switching Properties of Nd2Ti2O7 Thin Films through Ca-Doping and Thermal Treatments

This study successfully synthesized Nd2(1-x)Ca2xTi2O7 (x = 0、0.05、0.09、0.13、0.17) thin films via sol-gel method, and systematically investigated the effects of different film thickness, thermal treatment, and doping concentration on the resistive switching characteristics. The results demonstrate that all devices exhibit bipolar resistive switching (BRS) behavior. Compared to undoped NTO thin film devices, doped devices exhibit significant improvements, particularly at a doping concentration of 13%, where the switching cycles increase from 524 to 1022, and the Ron/Roff ratio increases to approximately 102. Furthermore, after post-metal annealing (PMA) treatment, the switching cycles further increase to 1839, with Vset/VReset of −1.48V/0.66V, Ron/Roff >102, and data retention capability reaching 104seconds at both 25°C and 85°C. These improvements in electrical properties are attributed to the effective enhancement of oxygen vacancy concentration within the thin film due to Ca2+ doping, as well as the diffusion effects of Al and In ions after PMA treatment. In summary, this study demonstrates the potential application of Al/Nd2(1-x)Ca2xTi2O7/ITO devices in low-power non-volatile memory applications.

Effect of Lanthanum-Aluminum Co-Doping on Structure of Hafnium Oxide Ferroelectric Crystals.

Hafnium oxide (HfO2)-based devices have been extensively evaluated for high-speed and low-power memory applications. Here, the influence of aluminum (Al) and lanthanum (La) co-doping HfO2 thin films on the ferroelectric characteristics of hafnium-based devices is investigated. Among devices with different La/Al ratios, the Al and La co-doped hafnium oxide (HfAlAO) device with 4.2% Al and 2.17% La exhibited the excellent remanent polarization and thermostability. Meanwhile, first principal analyses verified that hafnium-based thin films with 4.2% Al and 2.17% La promoted the formation of the o-phase against the paraelectric phase, providing theoretical support for supporting experimental results. Furthermore, a vertical ferroelectric HfO2 memory based on 3D macaroni architecture is reported. The devices show excellent ferroelectric characteristics of 22 µCcm-2 under 4.5 MVcm-1 and minimal coercive field of ≈1.6V. In addition, the devices exhibit great memory performance, including the response speed of device can achieve 20ns and endurance characteristic can achieve 1010 cycles.

Memristor & its application in biological field

Abstract Demand for highly integrated, low-power nonvolatile memories to get beyond the drawbacks of traditional memory systems has led to, Memristive/resistive switching devices which are excellent choices for non-volatile memory technology. Memristor is the 4th fundamental unit proposed by Professor Chua to give a relation between charge and magnetic flux. If a memristor’s constitutive relation is a straight line with a slope of M that passes through the origin in the ɸ –q plane, it is considered linear. The memristor’s physical realizations and potential uses remain a fascinating area for investigation.Semiconductor nanoparticles specially ZnO, ZnS QD exhibit Memristive characteristics. Employing this Memristive behaviour of biofunctionalized nanoscale particles and “voltage gap” as a novel sensing metric, several investigators attempted to assess the precise amount of microbiological contamination. Here in this work, Memristive property of some semiconductor nanoparticles like ZnO, ZnS as well as metal nanoparticle like PbS, Ag particles are studied and tried to focus on application of Memristive devices in near future in biological fields. The switching properties of bio-voltage memristors can now be used to achieve bio-voltage matching.

Low-Power Radiation-Hardened Static Random Access Memory with Enhanced Read Stability for Space Applications

In space environments, radiation particles affect the stored values of SRAM cells, and these effects, such as single-event upsets (SEUs) and single-event multiple-node upsets (SEMNUs), pose a threat to the reliability of systems used in the space industry. To mitigate the impacts of SEUs and SEMNUs, this paper proposes the Read Stability Improved and Low Power (RSLP16T) SRAM cell. It was confirmed that in SEU-induced simulations, all nodes of the RSLP16T could be restored with a charge amount of less than 100 fC. Additionally, it was verified that a similar level of restoration was possible for SEMNUs occurring in pair of storage nodes. The proposed cell achieves a high level of read stability due to a high pull-down cell ratio (current ratio, CR) at the storage nodes and the fact that only a pair of nodes is in contact with the bit lines during read operations. Because all node paths use a stacking structure for internal transistor configuration and a relatively higher number of cells are composed of PMOS, it consumes the least hold power. While these improvements come at the cost of slightly increased delay time and area, performance evaluation revealed that the equivalent quality metric (EQM) was the highest, indicating that the benefits outweigh the drawbacks. The proposed integrated circuit is implemented in the 90 nm CMOS process and operated on 1 V supply voltage.

Electrochromism of Redox-Active Ionic Liquids and the Kinetics of the Colorations

Electrochromic (EC) devices have been gaining attention for display, electronic paper, and smart windows because of the low-power consumption, low-voltage drive, and memory effect of the colored state holding sharp contrast. They could be useful for the intended usage, which organic light emitting diode and liquid crystal display do not cover.The minimum components of EC devices are (i) redox-active EC material for a transparent electrode of interest, (ii) supporting electrolyte, (iii) medium (solvent), and (iv) charge-compensating (charge-balancing) redox material for another electrode. The medium (solvent) is required for electrolytes, which provide electric conductivity to the device. However, it is difficult to solve the problems of solvent evaporation and leakage of the electrolyte solution from the device. Recently, ionic liquids (ILs) are the focus of extensive investigations for electrochemical devices due to their non-volatility, moderate viscosity, and chemical stability. ILs can play roles of both solvent and supporting electrolytes. We have been focused on ILs as a designable liquid material with the above useful properties and developed electrochromic redox-active ionic liquids (RAILs).In RAILs, either or both constituent ions are redox-active. RAILs are a new class of ILs, which are non-volatile, electro-conductive, and viscous liquid materials. In addition, RAILs consist of concentrated redox-active ions, resulting in large redox density. In the case of RAILs with electrochromic ions, which are electrochromic RAILs (EC-RAILs), the concentrated electrochromic species give a large light absorption resulting in a very thin device thickness. The non-volatility and chemical stability provide the long-term durability of the EC devices. EC-RAILs play the roles of (i)-(iv) required in EC devices. In this study, we developed EC-RAILs, the coloration process by the voltage control, and their application to the EC devices without using solvents and supporting electrolytes. Because of the concentrated redox species and absence of the supporting electrolyte, the resistance of the EC cells could be dominant for the coloration kinetics.In this study, we have analyzed the electrode kinetics of the EC device composed of pure EC-RAILs.

Effect of annealing conditions on resistive switching in hafnium oxide-based MIM devices for low-power RRAM

Abstract This work presents resistive switching (RS) behaviour in HfO2-based low-power resistive random-access memory (RRAM) devices. A metal-insulator-metal (MIM) structure (Au/HfO2/Pt) was fabricated by sandwiching a thin insulating layer of HfO2 between Pt and Au electrodes. HfO2 films deposited by RF sputtering at room temperature were rapid thermally annealed in N2 ambient at 400 °C and 500 °C. Grazing angle x-ray diffraction (GIXRD), Field emission gun-scanning electron microscopy (FEG-SEM), atomic force microscopy (AFM), and x-ray photoelectron spectroscopy (XPS) were employed to analyse the phase, crystal structure, morphology, surface roughness and chemical composition of the HfO2 films. The bipolar RS could be observed in both as-deposited and annealed HfO2 film-based devices from I–V characteristics measured using a source meter. We have investigated the effect of annealing temperature and annealing ambient on the phase formation of HfO2 as well as the RS characteristics and compared with as-deposited film-based device. Annealed HfO2 film-based devices exhibited improved electrical characteristics, including stable and repeatable RS at significantly lower switching voltages (&lt;1 V) which indicates low power consumption in these devices. The relatively lower processing temperature of the HfO2 films and that too in the films deposited by physical vapor deposition (PVD) technique-RF magnetron sputtering makes this study significantly useful for resistive switching based non-volatile memories.

Two Birds With One Stone: Differential Privacy by Low-Power SRAM Memory

Two Birds With One Stone: Differential Privacy by Low-Power SRAM Memory

Low power process tolerant nano cache memory for military applications

ABSTRACT Rapid growth in high-performance battery-powered computing applications, Internet of Things (IoT) and artificial intelligence (AI), has raised the need for low-power integrated circuits. Particularly in military applications, wireless sensor nodes are used to detect border intrusion, weapon attacks, biometric wearables, internet of battlefield things (IoBT), etc. The computing and security devices utilised by the soldiers are powered by batteries. To increase the life and performance of these devices, the integrated circuits (IC) used within these devices need careful design. Particularly, an appropriate memory needs more attention because the design of memory has a substantial impact on IC performance as it occupies most of the chip space. In this article, a novel 8T transistor low-power cache memory cell is proposed and simulations for nominal chirality and dual chirality are done using HSPICE-compatible CNFET (carbon nanotube field effect transistor) technology. The power consumption is minimized in dual chirality case than nominal chirality. But still the power saving percentage of the proposed cache memory cell remains good compared to conventional memory structures. Thus the proposed cache memory cell provides low power, delay and energy apart from being process tolerant, thus proving that it is compatible for warfare and military applications.

Schottky barrier memory based on heterojunction bandgap engineering for high-density and low-power retention

Dynamic random-access memory (DRAM) has been scaled down to meet high-density, high-speed, and low-power memory requirements. However, conventional DRAM has limitations in achieving memory reliability, especially sufficient capacitance to distinguish memory states. While there have been attempts to enhance capacitor technology, these solutions increase manufacturing cost and complexity. Additionally, Silicon-based capacitorless memories have been reported, but they still suffer from serious difficulties regarding reliability and power consumption. Here, we propose a novel Schottky barrier memory (SBRAM), which is free of the complex capacitor structure and features a heterojunction based on bandgap engineering. SBRAM can be configured as vertical cross-point arrays, which enables high-density integration with a 4F2 footprint. In particular, the Schottky junction significantly reduces the reverse leakage current, preventing sneak current paths that cause leakage currents and readout errors during array operation. Moreover, the heterojunction physically divides the storage region into two regions, resulting in three distinct resistive states and inducing a gradual current slope to ensure sufficient holding margin. These states are determined by the holding voltage (Vhold) applied to the programmed device. When the Vhold is 1.1 V, the programmed state can be maintained with an exceptionally low current of 35.7 fA without a refresh operation.

Unveiling the tradeoff between device scale and surface nonidealities for an optimized quality factor at room temperature in 2D MoS2 nanomechanical resonators

A high quality (Q) factor is essential for enhancing the performance of resonant nanoelectromechanical systems (NEMS). NEMS resonators based on two-dimensional (2D) materials such as molybdenum disulfide (MoS2) have high frequency tunability, large dynamic range, and high sensitivity, yet room-temperature Q factors are typically less than 1000. Here, we systematically investigate the effects of device size and surface nonidealities on Q factor by measuring 52 dry-transferred fully clamped circular MoS2 NEMS resonators with diameters ranging from 1 μm to 8 μm, and optimize the Q factor by combining these effects with the strain-modulated dissipation model. We find that Q factor first increases and then decreases with diameter, with an optimized room-temperature Q factor up to 3315 ± 115 for a 2-μm-diameter device. Through extensive characterization and analysis using Raman spectroscopy, atomic force microscopy, and scanning electron microscopy, we demonstrate that surface nonidealities such as wrinkles, residues, and bubbles are especially significant for decreasing Q factor, especially for larger suspended membranes, while resonators with flat and smooth surfaces typically have larger Q factors. To further optimize Q factors, we measure and model Q factor dependence on the gate voltage, showing that smaller DC and radio-frequency (RF) driving voltages always lead to a higher Q factor, consistent with the strain-modulated dissipation model. This optimization of the Q factor delineates a straightforward and promising pathway for designing high-Q 2D NEMS resonators for ultrasensitive transducers, efficient RF communications, and low-power memory and computing.

ADVANCING MEMORY DENSITY: A NOVEL DESIGN FOR MULTIPLE-BIT-PER-CELL PHASE CHANGE MEMORY

Multiple-bit-per-cell phase-change memory (MPCM) has emerged as a promising solution to address the escalating demands for high-density, low-power, and fast-access memory in modern computing and data storage systems. This paper presents a novel device design aimed at enabling multiple bits per cell in phase-change memory, thereby significantly enhancing memory density while maintaining performance and reliability. Leveraging innovative material compositions and advanced fabrication techniques, the proposed design demonstrates the potential to push the boundaries of memory capacity, efficiency, and scalability. Through comprehensive simulation analysis and performance evaluations, we showcase the feasibility and advantages of the new device design, highlighting its potential to revolutionize memory architectures and meet the evolving needs of next-generation computing systems.

Thermally Oxidized Memristor and 1T1R Integration for Selector Function and Low-Power Memory.

Resistive switching memories have garnered significant attention due to their high-density integration and rapid in-memory computing beyond von Neumann's architecture. However, significant challenges are posed in practical applications with respect to their manufacturing process complexity, a leakage current of high resistance state (HRS), and the sneak-path current problem that limits their scalability. Here, a mild-temperature thermal oxidation technique for the fabrication of low-power and ultra-steep memristor based on Ag/TiOx/SnOx/SnSe2/Au architecture is developed. Benefiting from a self-assembled oxidation layer and the formation/rupture of oxygen vacancy conductive filaments, the device exhibits an exceptional threshold switching behavior with high switch ratio exceeding 106, low threshold voltage of ≈1V, long-term retention of >104s, an ultra-small subthreshold swing of 2.5mVdecade-1 and high air-stability surpassing 4 months. By decreasing temperature, the device undergoes a transition from unipolar volatile to bipolar nonvolatile characteristics, elucidating the role of oxygen vacancies migration on the resistive switching process. Further, the 1T1R structure is established between a memristor and a 2H-MoTe2 transistor by the van der Waals (vdW) stacking approach, achieving the functionality of selector and multi-value memory with lower power consumption. This work provides a mild-thermal oxidation technology for the low-cost production of high-performance memristors toward future in-memory computing applications.

Comparison of Current Induced Domain Wall Motion Driven by Spin Transfer Torque and by Spin Orbit Torque in Ferrimagnetic GdFeCo Wires

Current-induced domain wall motion (CIDWM) in magnetic wires can be driven by spin transfer torque (STT) originating from transferring angular momentums of spin-polarized conducting electrons to the magnetic DW and can be driven by spin orbit torque (SOT) originating from the spin Hall effect (SHE) in a heavy metal layer and Dzyaloshinsky Moriya (DMI) generated at an interface between a heavy metal layer and a magnetic layer. In this work, we carried out a comparative study of CIDWM driven by STT and by SOT in ferrimagnetic GdFeCo wires with magnetic perpendicular anisotropy based on structures of SiN (10 nm)/GdFeCo (8 nm)/SiN (10 nm) and Pt (5 nm)/GdFeCo (8 nm)/SiN (10 nm). We found that CIDWM driven by SOT exhibited a much lower critical current density (JC), and much higher DW mobility (µDW). Our work might be useful for the realization and the development of low-power and high-speed memory devices.

Demonstration of In-Memory Biosignal Analysis: Novel High-Density and Low-Power 3D Flash Memory Array for Arrhythmia Detection.

Smart healthcare systems integrated with advanced deep neural networks enable real-time health monitoring, early disease detection, and personalized treatment. In this work, a novel 3D AND-type flash memory array with a rounded double channel for computing-in-memory (CIM) architecture to overcome the limitations of conventional smart healthcare systems: the necessity of high area and energy efficiency while maintaining high classification accuracy is proposed. The fabricated array, characterized by low-power operations and high scalability with double independent channels per floor, exhibits enhanced cell density and energy efficiency while effectively emulating the features of biological synapses. The CIM architecture leveraging the fabricated array achieves high classification accuracy (93.5%) for electrocardiogram signals, ensuring timely detection of potentially life-threatening arrhythmias. Incorporated with a simplified spike-timing-dependent plasticity learning rule, the CIM architecture is suitable for robust, area- and energy-efficient in-memory arrhythmia detection systems. This work effectively addresses the challenges of conventional smart healthcare systems, paving the way for a more refined healthcare paradigm.

Low power content addressable memory designing and implementation using voltage swing self adjustable match line technique

One of the essential components of computer systems is memory. A primary hindrance in this regard is the memory speed. Content Addressable Memory (CAM) speeds up transformations and table lookups in network routers and data processing systems for hardware search engines. Parallel seeks using the CAM (Content Addressable Memory) model are often used to enhance memory performance. This paper uses the voltage swing self-adjustable match line (VSSA-ML) technique to describe low-power content addressable memory design and implementation. This project decreases Match Line (ML) power loss by reducing load capacitance and ML voltage swing. A simple ML voltage detector is proposed instead of the complex, fully different detector that allows ML voltage swings near zero. This paper presents 6 T 8×8 CAM arrays using VSSA-ML Technique using Tanner tools 45-nm technology. On the other hand, this design enhances robustness in processing variations by self-adjusting voltage swings. Implementation analysis states that the described mode 6 T 8×8 CAM design utilized fewer MOSFETs than the 8 T 8×8 CAM array.

Performance investigation of ferroelectric L-shaped tunnel FET with suppressed corner tunneling for low power applications

In this work, a ferroelectric L-shaped tunnel FET (FE-LSTFET) is introduced to offer improvement in various DC and analog/high-frequency parameters. In this design, the incorporated FE layer enhances the vertical electric field at the source-channel interface, which improves the tunneling rate of charge carriers during the ON-state. The effect of negative capacitance (NC) and L-shaped N+ pocket causes dominance of vertical tunneling over corner tunneling (mainly at low gate voltages), which in turn reduces the transition voltage and current from 0.85 to 0.25 V and 1.2 × 10-8 to 5.67 × 10-11 A/µm respectively, thereby improving parameters such as ION, IOFF, and SSavg. Further, optimization of the thickness and doping concentration helps to keep the N+ pocket in fully depleted mode and consequently, ION/IOFF is increased from 0.3 × 1012 to 1.2 × 1014 and SSavg is reduced from 52 to 30 mV/decade. Subsequently, NC parameters such as remanent polarization (Pr) and coercive electric field (Ec) are optimized to increase the memory window, which further improves the read margin of FE-LSTFET as a memory device. Furthermore, TCAD-based simulation results show that optimizing the FE thickness improves ION and IOFF in the order of ∼ 1 and ∼ 2, respectively compared to those of C-LSTFET. With an optimum drain-overlap length, IOFF is shown to reduce from 6.6 × 10-17 to 5.43 × 10-19 A/µm due to a reduction in the SRH generation rate of the charge carriers. Despite the degradation in Cgg due to drain-overlap by the stack of FE and SiO2 layers, a significant increase in e-BTBT helps in achieving a transconductance of 2.48 × 10-4 S/µm, thus leading to a large cut-off frequency of 34.12 GHz. Next, analysis of the FE-LSTFET-based inverter shows significant improvements in several parameters including propagation delay and full swing. Moreover, FE-LSTFET shows more reluctance to self-heating effects than C-LSTFET as ION/IOFF is increased by an order of ∼ 3 at 500 K. Lastly, the performance of FE-LSTFET is benchmarked with existing TFET designs indicating that FE-LSTFET is suitable as a high-speed and low-power memory device.

Mutual control of electric and magnetic orders near room temperature in Al doped Y-type hexaferrite single crystals

Realizing robust magnetoelectric (ME) coupling effect near room temperature is still a long-standing challenge for the application of multiferroic materials in next-generation low-power spintronic and memory devices. Here we report a systematic study on the magnetic, dielectric, and ME coupling properties of Y-type hexaferrite Ba0.5Sr1.5Co2Fe12–xAlxO22 (x = 0.0, 0.5, 1.0) single crystals. The Al doping can induce the shifting of the alternating longitudinal conical (ALC)-proper screw (PS) magnetic phase transition temperature from 200 K for x = 0–365 K for x = 1.0. The most interesting feature is that the Ba0.5Sr1.5Co2Fe11AlO22 single crystal displays a direct and converse ME coupling coefficient with αH ∼3,100 ps/m and αE ∼3,900 ps/m at 250 K, respectively, due to the Al-doped enhanced stability of ALC phase. Moreover, the exchange bias also verifies the strong coupling of electric and magnetic orders. These results provide a valuable insight on the modulation of ALC structure and the mechanism of ME effect in Y-type hexaferrites.

Shape-influenced non-reciprocal transport of magnetic skyrmions in nanoscale channel

Abstract Skyrmions, with their vortex-like structures and inherent topological protection, play a pivotal role in developing innovative low-power memory and logic devices. The efficient generation and control of skyrmions in geometrically confined systems are of paramount importance for the advancement of skyrmion-based spintronic devices. In this study, we focus on investigating the non-reciprocal transport behavior of skyrmions and their interactions with boundaries of various shapes. The shape of the notch structure in the nanotrack significantly impacts the dynamic behavior of magnetic skyrmions. Through micromagnetic simulation, we explore the non-reciprocal transport properties of skyrmions in nanowires with different notch structure.

Electro-Optically Tunable Passivated Double-Cation Perovskite-Based ReRAM for Low-Power Memory Applications

Electro-Optically Tunable Passivated Double-Cation Perovskite-Based ReRAM for Low-Power Memory Applications