Low Flicker Noise Research Articles

A 0.65 V 4 dB NF 2.4 GHz Sub-Passive RF Down-Converter With Trans-Frequency Current-Reusing Scheme Achieving Low Flicker Noise and High Linearity

A 0.65 V 4 dB NF 2.4 GHz Sub-Passive RF Down-Converter With Trans-Frequency Current-Reusing Scheme Achieving Low Flicker Noise and High Linearity

Electrical characteristics assessment and noise analysis of pocket-doped multi source T-shaped gate tunnel FET

A detailed analysis of a novel multi-source T-shaped gate Tunnel FET (MS-TTFET) is presented in this study in order to address the main issues with conventional TFETs. Due to its exceptionally low off-state current (IOFF) and remarkable sub-threshold properties, the tunnel field effect transistor has received a great deal of interest for low standby power applications. The MSR's integration into the SOI platform increases the device's on current, which increases the effective tunnelling area in the middle of the source-channel junctions. An isolator oxide has been added to prevent the source and drain regions from being directly coupled. A SiGe pocket has been suggested at the source and channel junction; silicon-germanium, a low bandgap material which enhances the tunnelling of charge carriers. A T-shaped gate can increase the effectiveness of the tunnel junction in order to limit the lower value of the leakage current. The multi-source regions of the T-shaped gate tunnel field effect transistor can boost the on-state current (ION) by improving tunnel junction areas. The device's ION/IOFF ratio, which is 1013 for our suggested construction, is the standard measure of merit for any device. It is possible to achieve an increased ON current of the order of 10−5 A/μm with a negligible subthreshold swing (SS) of 42 mV/decade. Moreover, the effect of low frequency flicker noise on the device behavior has been investigated.

A low‐power voltage‐controlled oscillator with phase noise suppressing techniques

AbstractA 0.5‐V low‐power VCO by using TSMC 0.18‐μm CMOS process has been proposed. For achieving low phase noise and low power consumption, several techniques have been utilized. The forward body biasing technique can lower the supply voltage and power consumption. The noise filtering, feedback capacitors, and switched biasing technique can reduce the phase noise and power consumption. The PMOS transistors, which has lower flicker noise than the NMOS transistors, are used for further lowering the phase noise. The body‐controlled cross‐coupled pair is proposed for choosing the oscillation frequencies without using additional varactors, which lower the oscillation signal loss and phase noise. The measured results show the phase noise at 1 MHz offset frequency from the carrier signal is −118.6 dBc/Hz with 1/f3 corner frequency of 230 kHz while the control voltage is 0 V. The frequency tuning range is from 2.4 to 2.46 GHz under power consumption from 0.5 to 0.8 mW. The figure of merit at 1 MHz offset frequency from the carrier signal is −189 dBc/Hz.

28-nm CMOS 공정을 이용한 Ka-Band 수신기 설계

This study presents a Ka-band direct-conversion receiver using a 28-nm CMOS (Complimentary Metal Oxide Semiconductor) process for radar applications. The designed receiver includes a LNA (Low-Noise Amplifier), Mixer, and Baseband amplifier. The LNA adopts a two-stage cascode amplifier structure. Then, the mixer is a single-balanced passive mixer with low flicker noise. At the end, the baseband amplifier is a transimpedance amplifier with fat FET (Field-Effect-transistor) for low flicker noise and current-mode operation of the mixer. The LO (Local Oscillator) signal for driving the mixer is supplied externally. The performance of the receiver is tested using on-wafer probing and an air test is performed by integrating a microstrip antenna. The total conversion gain, noise figure, and 3 dB bandwidth are 28 dB, 6.1 dB, and 6 GHz, respectively. The chip size is 0.320 mm2.

Optics-Free Chip-Scale Intraoperative Imaging Using NIR-Excited Upconverting Nanoparticles.

We present an optics-free CMOS image sensor that incorporates a novel time-gated dual-photodiode pixel design to allow filter- and lens-less image acquisition of near-infrared-excited (NIR-excited) upconverting nanoparticles. Recent biomedical advances have highlighted the benefits of NIR excitation, but NIR interaction with silicon has remained a challenge, even with high-performance optical blocking filters. Using a secondary diode and a dual-photodiode design, this sensor is able to remove the 100s of mV of NIR background on pixels and bring it down to single-digit mV level, nearing its noise floor of 2.2 mV rms, not achievable with any optical filter. Non-linear effects of background cancellation using the diode pair has been mitigated using an initial one-time pixel-level curve fitting and calibration in a post-processing setting. This imager comprises a highly linear 11 fF metal-oxide-metal (MOM) capacitor and includes integrated angle-selective gratings to reject oblique light and enhance sharpness. Each pixel also includes two distinct correlated double sampling schemes, to remove low frequency flicker noise and systematic offset in the datapath. We demonstrate the performance of this imager using pulsed NIR-excited upconverting nanoparticles on standard United-States-Air-Force (USAF) resolution targets and achieve an SNR of 15 dB, while keeping NIR background below 6 mV. This 36-by-80-pixel array measures only 2.3 mm by 4.8 mm and can be thinned down to 25 µm, allowing it to become surgically compatible with intraoperative instruments and equipment, while remaining optics-free.

A Pseudo-Pseudo-Differential ADC Achieving 105dB SNDR in 10kHz Bandwidth Using Ring Amplifier Based Integrators

This brief presents a high-resolution ADC which makes use of the pseudo-pseudo-differential noise filtering technique in an oversampling ADC architecture with ring amplifier based integrators. The pseudo-pseudo-differential noise filtering technique utilizes single-ended circuits while maintaining the even-order rejection found in fully-differential structures which alleviates, in the active analog blocks, the need for differential matching and circuit overhead such as common-mode feedback. Additionally, pseudo-pseudo-differential provides a cancellation of low frequency flicker noise without the need for traditional techniques such as auto-zero, correlated-double-sampling, or chopping and mitigates double-sampling thermal noise penalties by processing input signal twice. In this prototype, the flicker corner is maintained below 50Hz with measured ADC performance achieving a peak SNDR of 105.0dB and a dynamic range of 106.5dB while consuming 1.17mW from a 1.8V supply.

(Invited) Recent Advances in Ion Sensitive Graphene Field Effect Transistors

I will summarize recent advances [1-3] in large-area graphene based ion sensitive field effect transistors (ISFETs), including the achievement of record potentiometric ion concentration resolution. Sensor resolution, the smallest measurable change in analyte concentration, is a critical parameter in the assessment of sensor performance. Notably, the absence of a bandgap in graphene is frequently perceived as prohibiting competitive graphene FET performance. A graphene FET cannot be driven into saturation, limiting intrinsic gain and high-frequency performance. The graphene FET cannot be turned off, severely limiting the on/off current ratio for switching applications. In contrast, in the case of graphene ISFETs, the graphene FET functions as an analog pre-amplifier directly integrated with a sensing layer, enabling record sensor resolution to be achieved.Large-area graphene ISFETs combine high mobility charge transport, low flicker noise, facile integration with a variety of ion sensitive layers. The advent of wafer-scale graphene processing methods facilitates reproducible production of graphene ISFETs. Field effect mobilities in graphene ISFETs can reach μ = 5000 cm2 V-1 s-1, contributing to high gain gm = ∂Id /∂Vg ∝ μVDS. In particular, high mobility allows for the reduction of bias voltage VDS , which improves potentiometric uniformity across the sensor channel. We further find that low-frequency (1/f) noise, which ultimately determines sensor resolution, decreases approximately inversely with graphene FET channel area, in accord with 1/f scaling in Si MOSFETs. In other words, large transistors are quiet transistors. Scaling graphene FETs up to a 5 mm x 5 mm channel area, we observe a normalized 1/f noise parameter K = f <Δv 2>/v0 2 = 5×10-13, the lowest reported to date for a graphene FET at room temperature. Facile integration of graphene FETs with ion sensitive layers, such as metal oxides and ionophore polymer membranes, enables sensitization to a wide range of ions including H+, K+, Na+, NH4 +, Cl-, NO3 -, HPO4 2- and SO4 2-. Combining the Nernstian limited sensitivity with low 1/f noise enables record ion concentration resolution as low as r ~ 0.003 log M.Beyond sensor resolution, specificity is another important sensor parameter. Ionophores suffer cross-sensitivity to ionic species other than their target ion. The combined stability and resolution of graphene ISEFTs allows simultaneous, real-time measurement of multiple ionic analytes through the use of an array of graphene ISFETs, with each graphene ISFET element sensitized to a particular ion. Measurement of the cross-sensitivity within the array allows the application of Nikolskii-Eisenmann analysis to quantitatively account for cross-sensitivity, and achieve selective response with the graphene ISFET array that would otherwise not be possible with graphene ISFETs operated in isolation. I will conclude with a discussion of challenges and prospects for the future development of graphene FET based sensors. REFERENCES [1] Tran et al., Nanotechnology 32, 045502 (2020).[2] Fakih et al., Nature Communications 11, 3226, (2020).[3] Fakih et al., Sensors and Actuators B 291 89 (2019).

A 24 GHz Direct Conversion Receiver for FMCW Ranging Radar Based on Low Flicker Noise Mixer

In this paper, a 24 GHz direct conversion receiver (DCR) for frequency-modulated continuous-wave (FMCW) ranging radar based on low flicker noise mixer in 90 nm silicon-on-insulator (SOI) CMOS technology is presented. A low-noise and low-power low-noise-amplifier (LNA) adopting simultaneous noise and input matching (SNIM) method is designed. Neutralized technology and boost inductor are introduced to improve performance. The measurement results of standalone LNA show that the peak gain is 17.2 dB at 23.8 GHz and the −3 dB bandwidth is around 2.2 GHz from 22.8 GHz to 25 GHz. The LNA achieves an average 3 dB NF within the 24 GHz band. A current-bleeding mixer is used to lower noise and the factors influencing flicker noise have been discussed. Proper element values and local oscillator (LO) power have been chosen to make the mixer low-noise. Measurement results illustrate that the receiver exhibits 20.3 dB peak gain, 7 dB SSB noise figure (NF) and −22 dBm IP1dB. Flicker noise of the mixer and the receiver are measured respectively and the noise knee-point of receiver is observed 60 kHz. The receiver consumes only 16 mW with chip area of 0.65 mm2 including pads. The results demonstrate that the proposed receiver can be a promising candidate for FMCW ranging radar.

Low-Frequency Noise in CMOS Switched-gm Mixers: A Quasi-Analytical Model

Flicker noise contributed by active mixers usually compromises the overall sensitivity level of direct-conversion receivers (DCRs). In this article, a qualitative quasi-analytical model has been developed to in-depth explain the flicker noise mechanism existing in the switched-gm active mixer in which an improved current source switch is presented for high mixer common-mode rejection ratio (MCMRR). The built model simply explains how frequency translations take place within the mixer. Compact equations are derived to estimate the flicker noise contribution of individual stages at the output. Simulations validate the accuracy of the predictions, and the dependence of flicker noise on local oscillator (LO) slope ratio, period, and other circuit parameters. The high-frequency limitation of the mixer is further estimated by investigating into the tail parasitic capacitance charging and discharging behavior. Furthermore, a switched-gm pMOS mixer prototype with low flicker noise is implemented in a 0.18-μm CMOS process. It operates at an RF input frequency of 1 GHz and provides a maximal conversion gain of 12.9 dB and an NF of 11.4 dB while a flicker noise corner of 220 kHz and an IIP3 of 3.6 dBm are measured, respectively. The mixer core only consumes 3.3 mW from a 1.8 V supply.

Low offset frequency 1/f flicker noise in spin-torque vortex oscillators

Low-frequency noise close to the carrier remains little explored in spin-torque nano-oscillators. However, it is crucial to investigate as it limits the oscillator's frequency stability. This work addresses the low offset frequency flicker noise of a spin-torque vortex oscillator in the regime of large-amplitude steady oscillations. We first phenomenologically expand the nonlinear auto-oscillator theory, aiming to reveal the properties of this noise. We then present a thorough experimental study of the oscillator's $1/f$ flicker noise and discuss the results based on the theoretical predictions. Thereby, we connect the oscillator's nonlinear dynamics with the concept of flicker noise and furthermore refer to the influence of a standard $1/f$ noise description based on the Hooge formula, taking into account the nonconstant magnetic oscillation volume, which contributes to the magnetoresistance.

Cascaded systems analysis of a-Se/a-Si and a-InGaZnO TFT passive and active pixel sensors for tomosynthesis

Medical imaging systems like full field digital mammography (FFDM) and digital breast tomosynthesis (DBT) commonly use amorphous selenium (a-Se) based passive pixel sensor (PPS) direct conversion x-ray detectors. On one hand, direct conversion detectors inherently offer better resolution characteristics in terms of a higher modulation transfer function (MTF), in comparison to the indirect CsI:Tl PPS x-ray imager. On the other hand, especially at lower doses, this superior performance of the direct imager is seldom retained in its detective quantum efficiency (DQE) curves.It is well known that a-Se PPS x-ray imagers suffer from high additive electronic noise originating from the from the amorphous silicon (a-Si) thin film transistor (TFT) array that is being used in the current back-plane technology. This degrades the noise power spectrum (NPS) and subsequently the overall DQE. To address this deficiency, we propose to replace the PPS back-plane by active pixel sensor (APS) back-plane technology, which has the potential to reduce the back-plane electronic noise by amplifying the input signal, especially at low doses. The proposed APS is based on amorphous In–Ga–Zn–O (a-IGZO) TFT technology, which can offer high mobility (5–20 cm2 V−1 s−1), low leakage current (<10−13 A) and low flicker noise (Hooge’s parameter αH ~ 1.5 10−3), leading to better imager noise performance.To test our hypothesis, we used linear cascaded systems analysis to model the imaging performance (MTF, NPS and DQE) of the PPS and APS a-Se direct imagers. This model was first validated using experimentally measured data obtained for a 85 µm pixel pitch a-Se/a-Si TFT PPS imager. Using this model, we analyzed the noise performance of the direct a-Se and indirect CsI:Tl x-ray a-IGZO APS imagers at different dose and electronic noise levels. Obtained results clearly showed that lowering back-plane electronic noise can significantly improve the performance of the a-Se/a-IGZO TFT APS imager. Our simulated results showed that a higher DQE at lower radiation doses (maximum DQE of 0.6 can be achieved at an exposure level of 1 µGy) can be achieved with the a-Se detector, thereby making this combination a promising candidate for low dose applications like DBT.

Electrical Stability and Flicker Noise of Thin-Film Heterojunction FETs on Poly-Si Substrates

Electrical stability and flicker (1/f) noise of thin-film heterojunction field-effect transistors (HJFETs) comprised of hydrogenated amorphous Si (a-Si:H) gate and hydrogenated crystalline Si (c-Si:H) source and drain regions on small-grain poly-Si substrates are investigated and benchmarked against conventional thin-film transistors (TFTs). Despite the low growth temperature of a-Si:H and c-Si:H (~200°C), HJFETs are found to have higher stability and lower flicker noise than conventional TFTs. These results may be attributed partly to the device structure and partly to the high-quality gate heterojunction of the HJFETs.

A Sub-0.1°/h Bias-Instability Split-Mode MEMS Gyroscope With CMOS Readout Circuit

This paper describes a split-mode tuning fork MEMS gyroscope with CMOS readout circuit. The gyroscope achieves 0.008°/ $\surd \text{h}$ angle random walk (ARW) and 0.08°/h bias instability (BI). The noise and phase requirements of the MEMS sensing element and the readout circuit are analyzed, from which the system-level design guidelines are proposed. The MEMS sensing element is optimized to enhance its mechanical sensitivity with reduced quadrature coupling and thermoelastic damping. Front ends with 5.9-fA/ $\surd $ Hz input-referred current noise floor and less than 0.5° phase delay are achieved to reduce the gyroscope’s ARW and thermal drift. A low flicker noise automatic amplitude control circuit and digitized phase-sensitive demodulation are adopted to improve the gyroscope’s BI. After temperature compensation, the temperature coefficients (TCOs) of the scale factor and the zero-rate output are 27 ppm/°C and 1.7°/h/°C from −40 °C to +60 °C, respectively. The overall power consumption is 8.5 mW under a 3.3-V supply.

Remarkably low flicker noise in solution-processed organic single crystal transistors

Low-frequency noise generated by a fluctuation of current is a key issue for integrating electronic elements into a high-density circuit. Investigation of the noise in organic field-effect transistors is now sharing the spotlight with development of printed integrated circuits. The recent improvement of field-effect mobility (up to 15 cm2 V−1 s−1) has allowed for organic integrated circuits with a relatively high-speed operation (~50 kHz). Therefore, an in-depth understanding of the noise feature will be indispensable to further improve the circuit stability and durability. Here we performed noise measurements in solution-processed organic single crystal transistors, and discovered that a low trap density-of-states due to the absence of structural disorder in combination with coherent band-like transport gives rise to an unprecedentedly low flicker noise. The excellent noise property in organic single crystals will allow their potential to be fully exploited for high-speed communication and sensing applications.

Theoretical investigation of an ultra-low phase noise microwave oscillator based on an IF crystal resonator-amplifier and a microwave photonic frequency transposer

Resonator Q-factor and amplifier flicker noise are the most important parameters that determine the phase noise of microwave oscillators. The Q-factor of intermediate frequency (IF) crystal resonators at IF frequencies can be larger than that of microwave resonators at microwave frequencies. In addition, flicker noise of IF amplifiers can be less than that of microwave amplifiers. One of the well-known usual ways to implement low phase noise microwave oscillators is to use ultra-low phase noise IF crystal oscillators and frequency multipliers. In this paper a new method to implement such oscillators based on IF crystal resonators and amplifiers, called a transposed-frequency microwave oscillator, is proposed. In the proposed structure, a microwave photonic frequency transposer is used to downconvert RF to IF followed by a high-Q IF crystal filter and low flicker noise IF amplifier and then upconverting IF to RF frequency. This novel method in comparison to the well-known multiplier-based microwave oscillators presents significant advantages. In this paper, the proposed new structure is introduced, and a theoretical model is developed to study its performance. Oscillation frequency and amplitude, equivalent Q-factor, phase noise, etc., are theoretically studied and compared with the performances of the well-known microwave oscillators based on frequency multipliers and optoelectronic oscillators. It is shown that the phase noise of the proposed microwave oscillator can be less than −130 dBc/Hz at 100 Hz from a 10 GHz carrier with a noise floor less than −165 dBc/Hz.

Thin-Film Heterojunction FETs on Poly-Si Substrates for High-Stability Driving and Low-Power Amplification

Thin-film heterojunction field-effect transistor (HJFET) devices with hydrogenated amorphous Si gate and hydrogenated poly-Si source and drain regions are demonstrated on small-grain poly-Si substrates. The transistor fabrication process (excluding poly-Si preparation) temperature is below ~200 °C. The HJFET devices enable lower operation voltages, steeper subthreshold characteristics, lower flicker noise, and higher stability than conventional poly-Si devices. A low-power HJFET amplifier suitable for capacitive reading of biological signals is also demonstrated.

Oxide thickness dependent compact model of channel noise for E-mode AlGaN/GaN MOS-HEMT

In this paper, a compact channel noise model for gate recessed enhancement mode GaN based MOS-HEMT which is valid for all regions of operation is proposed. The compact noise model consists of high frequency thermal noise and low frequency flicker noise. The drain current, which is one of the most important parameters for compact noise model is developed by incorporating interface and oxide traps, mobility degradation due to vertical electric field, velocity saturation effect and self-heating effect. The flicker noise model is derived by considering mobility and carrier fluctuation due to traps present in both oxide and interface layer. The thermal noise and flicker noise models are validated by comparing the results with TCAD simulation and experimental results from literature respectively. Effect of thermal and flicker noise power spectral density (PSD) variation with different oxide thickness has also been analyzed.

Low-Flicker-Noise and High-Gain Mixer Using a Dynamic Current-Bleeding Technique

This letter presents a low-flicker-noise and high-gain folded-type mixer using current-reuse and dynamic current-bleeding (DCB) techniques. The current-reuse structure allows the use of the current-bleeding (CB) technique in the folded-type mixer. A local oscillator signal at the IF port dynamically switches the CB circuit, which results in a low flicker noise and high gain. Because the DCB circuit is composed of a common-mode negative-feedback structure, it stabilizes the linearity and noise figure (NF) for process variation and mismatch. The measurements show a double-sideband NF of 8.2 dB at an IF of 10 kHz and a conversion gain of 24.1 dB at 2.1 GHz, while the mixer consumes 2.1 mW from a supply voltage of 1.2 V.

Flicker Noise Improved CMOS Mixer Using Feedback Current Bleeding

A CMOS mixer using a negative-feedback current-bleeding circuit is presented with low flicker noise and robustness to process–voltage–temperature variations. The proposed technique reduces the common-mode flicker noise generated by the RF transconductance stage and the current-bleeding circuit, thus reducing conversion to the differential-mode flicker noise caused by mismatch and process variations. In addition, the proposed technique achieves stability against the voltage and temperature variations due to the negative feedback. Measurement results show a voltage conversion gain of 19 dB, an IIP3 of −7 dBm, and a flicker-noise figure of 14.2 dB at 10 kHz. The proposed mixer dissipates 3 mW from a 1.3 V supply voltage.

A dynamic current-bleeding technique for a low-noise and high-gain CMOS mixer

This letter presents a low-noise and high-gain CMOS mixer that uses a simple dynamic current-bleeding (DCB) technique. The conventional static current-bleeding (SCB) technique has high conversion gain and low noise figure at a high intermediate frequency (IF) but also has moderately high direct-mechanism flicker noise. Meanwhile, the conventional DCB technique possesses completely opposite characteristics. The proposed DCB technique obtains not only low direct flicker noise and low noise figure at high IF, but also has high conversion gain by combining only the advantageous features of both conventional techniques. Measurement results show a conversion gain of 21.2 dB and a noise figure of 16.3 dB at 10 kHz and 5.6 dB at 10 MHz, while the mixer consumes 4.2 mW at a 1.2 V supply voltage. It was implemented in a 0.11-μm CMOS process with a chip area of 0.8 × 0.8 mm2. © 2017 Wiley Periodicals, Inc. Microwave Opt Technol Lett 59:1267–1271, 2017