Low-Frequency Noise in CMOS Switched-gm Mixers: A Quasi-Analytical Model

Abstract

Flicker noise contributed by active mixers usually compromises the overall sensitivity level of direct-conversion receivers (DCRs). In this article, a qualitative quasi-analytical model has been developed to in-depth explain the flicker noise mechanism existing in the switched-gm active mixer in which an improved current source switch is presented for high mixer common-mode rejection ratio (MCMRR). The built model simply explains how frequency translations take place within the mixer. Compact equations are derived to estimate the flicker noise contribution of individual stages at the output. Simulations validate the accuracy of the predictions, and the dependence of flicker noise on local oscillator (LO) slope ratio, period, and other circuit parameters. The high-frequency limitation of the mixer is further estimated by investigating into the tail parasitic capacitance charging and discharging behavior. Furthermore, a switched-gm pMOS mixer prototype with low flicker noise is implemented in a 0.18-μm CMOS process. It operates at an RF input frequency of 1 GHz and provides a maximal conversion gain of 12.9 dB and an NF of 11.4 dB while a flicker noise corner of 220 kHz and an IIP3 of 3.6 dBm are measured, respectively. The mixer core only consumes 3.3 mW from a 1.8 V supply.