Low Flicker Noise Research Articles

A 77 GHz Frequency Doubling Two-Path Phased-Array FMCW Transceiver for Automotive Radar

A fully-integrated 77 GHz frequency doubling two-path phased-array frequency-modulated continuous-wave (FMCW) transceiver for automotive radar applications is proposed. By utilizing the frequency doubling scheme, the chirp bandwidth is improved, and the complexity of the frequency synthesizer and the insertion loss of the local-oscillating (LO) distribution network are both reduced. Top-injected coupled resonator based wide locking range technique is proposed in the frequency doublers to minimize the required injection power to cover the chirp bandwidth plus enough PVT variation margin, and therefore reduce the power consumption of the LO distribution network. Current-reused coupled resonator technique is utilized to implement the LO phase shifting in each receiving path. The digitally controlled artificial dielectric-based transmission lines are inserted in the low noise amplifiers to provide the operation frequency calibration capability. The receiving two-path signals are converted into intermediate frequency by low flicker noise current-mode passive mixers and then combined in the trans-impedance amplifier, followed by the reconfigurable analog baseband processing. Fabricated in 65 nm CMOS, the FMCW transceiver has achieved 1.93 GHz maximum chirp bandwidth, 12.9 ~ 13.2 dBm maximum transmitting power, and 47.8 ~ 100.7 dB programmable receiving conversion gain. The transceiver consumes 343 mW power and 4.64 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> chip area including all of the pads.

A 5 dB NF 100 KHz 1/F corner and 35 dBm OIP3 down conversion mixer using dynamic current injection and derivative superposition method

This letter presents the design and measurement of high OIP3, low flicker noise double-balanced Gilbert cell down conversion mixer in CMOS process. The key features of proposed mixer are dynamic current injection and derivative superposition. Since the flicker noise (1/f noise) have a strongly affect mixer's noise figure (NF), a dynamic current injection is used to reduce the flicker noise. The derivative superposition method has an auxiliary common gate stage of radio-frequency (RF) input stage to cancel each third order intermodulation distortion (IMD3) and can provide a high third order output intercept point (OIP3). The proposed down conversion mixer is fabricated in 0.18 μm CMOS technology. And this letter highlights the performances of the proposed mixer in terms of: flicker noise (i.e., noise figure: 5 dB at 100 kHz), third order output intercept point (i.e., OIP3, typically 35 dBm), and the conversion gain (i.e., typ. 17.3 dB) from −20 dBm RF input at 2.4 GHz. © 2016 Wiley Periodicals, Inc. Microwave Opt Technol Lett 58:1720–1723, 2016

Enhanced Thermionic Emission and Low 1/f Noise in Exfoliated Graphene/GaN Schottky Barrier Diode.

Temperature-dependent electrical transport characteristics of exfoliated graphene/GaN Schottky diodes are investigated and compared with conventional Ni/GaN Schottky diodes. The ideality factor of graphene/GaN and Ni/GaN diodes are measured to be 1.33 and 1.51, respectively, which is suggestive of comparatively higher thermionic emission current in graphene/GaN diode. The barrier height values for graphene/GaN diode obtained using thermionic emission model and Richardson plots are found to be 0.60 and 0.72 eV, respectively, which are higher than predicted barrier height ∼0.40 eV as per the Schottky-Mott model. The higher barrier height is attributed to hole doping of graphene due to graphene-Au interaction which shifts the Fermi level in graphene by ∼0.3 eV. The magnitude of flicker noise of graphene/GaN Schottky diode increases up to 175 K followed by its decrease at higher temperatures. This indicates that diffusion currents and barrier inhomogeneities dominate the electronic transport at lower and higher temperatures, respectively. The exfoliated graphene/GaN diode is found to have lower level of barrier inhomogeneities than conventional Ni/GaN diode, as well as earlier reported graphene/GaN diode fabricated using chemical vapor deposited graphene. The lesser barrier inhomogeneities in graphene/GaN diode results in lower flicker noise by 2 orders of magnitude as compared to Ni/GaN diode. Enhanced thermionic emission current, lower level of inhomogeneities, and reduced flicker noise suggests that graphene-GaN Schottky diodes may have the underlying trend for replacing metal-GaN Schottky diodes.

A 0.022 mm&lt;formula formulatype="inline"&gt;&lt;tex Notation="TeX"&gt;$^{{2}}$&lt;/tex&gt;&lt;/formula&gt; 98.5 dB SNDR Hybrid Audio &lt;formula formulatype="inline"&gt;&lt;tex Notation="TeX"&gt;$\Delta \Sigma$&lt;/tex&gt;&lt;/formula&gt; Modulator With Digital ELD Compensation in 28 nm CMOS

This work presents a compact-area hybrid continuous-time delta-sigma modulator (CTDSM) with a shared 6 bit asynchronous successive approximation register (ASAR) quantizer for audio application. It is implemented in a 28 nm CMOS process. The modulator incorporates an analog integrator and a digital filter. Signal is digitized after the analog first stage and processed digitally thereafter. Only the first stage is left in the analog domain. Because of high integration of digital circuitry, it could benefit from process advancement such as low power consumption and small area. Moreover, the excess loop delay (ELD) is compensated in the digital domain, and the conventional analog local feedback DAC for ELD compensation is no longer needed. In addition, resistive DAC (R-DAC) is adopted for low flicker noise. The measured DR and SNDR in 24 kHz BW are 100.6 dB and 98.5 dB, respectively, while occupying 0.022 mm 2 and achieving FOMs (SNDR + 10 $*$ log(BW/Power)) of 171.8 dB.

1/f-Noise Analysis in Passive Millimeter Wave Imaging Front End Using Zero Biased Detector

Noise equivalent temperature difference (NETD) is the critical parameter for passive imaging detection. A modelling of the sensitivity performance including the f-1-type low flicker noise (1/f-noise) influence is presented, specifically investigated on the 1/f-noise to the sensitivity performance and the trade-offs between the low-noise amplifier (LNA)’s gain and the video frequency bandwidth. Measurement bench is set up, and results confirm that low-frequency modulation to the signal helps in improving the sensitivity performance. Based on the measurement results, it is concluded that signal power influences the 1/f-noise properties in detection diode. The amplifier’s output power is suggested to be lower than −30 dBm at least. This level is much lower than the point of P1dB (1 dB compressed point of the LNA).

Active and Passive Combined Mixer for Low Flicker Noise and Low dc Offset

A direct-conversion mixer with low flicker noise and low dc offset is presented for WLAN applications. The design consists of a folded-type active mixer with a resonant inductor in cascade with a source-driven passive mixer, operating at half the conventional LO frequency. Because of this unique topology, neither direct nor indirect flicker noise of the active mixer appears at the mixer output. Moreover, the dc offset voltage from the LO self-mixing is lowered, and the burden of designing a high-frequency VCO is relieved. The measurement results show a noise figure of 12.2 dB at 10 kHz, a conversion gain of 11.4 dB, and an IIP3 of $-10.5 ~{\rm dBm}$ while the mixer consumes 8.7 mW for a 1 V supply voltage. The design is implemented in a Dongbu Hitek 0.11 $\mu{\rm m}$ CMOS process with a chip area of 1.3 $\,\times\,$ 0.98 ${\rm mm}^{2}$ .

A-189 dBc/Hz FoMT Wide Tuning Range VCO Using Q-Factor Enhancement Technique

A 28-GHz voltage-controlled oscillator (VCO) with a wide tuning range and a low phase noise is presented in this paper. A PMOS-only cross-coupled pair with a lower flicker noise is exploited to provide the negative resistance. The mechanisms for enhancing the Q-factor of the LC tank at millimeter-wave (mm-wave) frequencies are analyzed and applied to optimize the proposed VCO design to obtain a low phase noise. To guarantee accurate oscillating frequencies, distributed interconnections are carefully modeled by EM simulations. Fabricated in a standard 90-nm CMOS process, the proposed VCO achieves a wide tuning range of 20.1 %, from 25 to 30.66 GHz and a low phase noise of −105.47 dBc/Hz at 1-MHz offset. The current of the core circuit is 10.5 mA under a single 1.2-V supply. The core area of the chip is 0.38 mm × 0.24 mm.

1/fNoise from Glauber Dynamics: Self-Consistent Interaction and Temperature Dependent Correlations

Low frequency flicker noise has been argued to occur in spatially extended metastable systems near a critical point (Bak et al., 1987). An Ising-Glauber model based method is suggested here to systematically obtain temperature dependentnth-order correlation functions forNarbitrary interacting two-level systems (TLSs). This model is fully consistent with existing methods to calculate1/fnoise spectra from TLSs and complements them. However, with as such noa prioriassumptions on the typical log normal distribution of fluctuation rates, it is shown that1/fαnoise manifests in two different cases: first in the thermodynamic limit on a 2D lattice with long range antiferromagnetic interactions at low temperatures and second in the case of a statistical ensemble of finite-sized spin clusters representing disorder, but where each cluster is ordered due to ferromagnetic interactions.

A High Gain and Low Flicker Noise CMOS Mixer with Low Flicker Noise Corner Frequency Using Tunable Differential Active Inductor

This paper presents the design of a high conversion gain and low flicker noise down conversion CMOS double balanced Gilbert cell mixer using $$0.18\,\upmu \hbox {m}$$ 0.18 μ m CMOS technology. The high conversion gain and low flicker noise mixer is implemented by using a differential active inductor (DAI) circuit and cross-coupled current injection technique within the conventional double-balanced Gilbert cell mixer. A cross-coupled current bleeding circuit is used to inject the current to the switching stage to decrease the flicker noise. Instead of spiral inductor, a DAI with high tunability of the inductor and quality factor is used to tune out the parasitic capacitance effect and decrease the leakage current that has a harmonic component and produce the flicker noise. By tuning the DAI, the flicker noise corner frequency is reduced to 150 Hz. The proposed circuit is simulated with Cadence Spectra and the simulation results shows the NF of 11.2 dB, conversion gain of 23.7 dB and IIP3 of $$-6$$ - 6 dB for an RF frequency of 2.4 GHz. The excellent LO-RF, LO-IF, RF-LO and RF-IF isolations of $$-60, -110, -52$$ - 60 , - 110 , - 52 and $$-64$$ - 64 dB are achieved respectively. The total power consumption is 10.5 mW from a 1.8 V DC power supply.

A source degenerated LC quadrature VCO (SD-QVCO) using 0.18-μm SiGe BiCMOS

This letter presents a fully integrated BiCMOS quadrature voltage-controlled oscillator (QVCO). The QVCO consists of two nMOSFET cross-coupled oscillator stacked in series with source degenerated HBT transistors. SiGe HBT introduces low flicker noise compared to CMOS devices. To generate quadrature phase signals with strong coupling strength, the proposed design uses two MOS-coupled LC-tank cores instead of passive device-coupled cores. This source degeneration topology can improve the phase noise performance of the QVCO as compared to the sub-VCO. The proposed QVCO has been implemented with the TSMC 0.18 μm SiGe 3P6M BiCMOS process, can generate quadrature signals in the frequency range of 4.52–5.05 GHz with core power consumption of 5.76 mW at the dc bias of 1.8 V. At 4.53 GHz, phase noise at 1 MHz offset is −124.52 dBc/Hz. The die area of the fabricated prototype is 0.453 × 0.898 mm2.

Passive mixer with OPA filter for DVB-H front-end in 65 nm digital CMOS technology

This paper presents a passive mixer combined with a 1st-order active low-pass filter implemented in a purely digital low-power 65nm CMOS technology. The filter consists of a four-stage operational amplifier with two feed-forward paths for a 3dB corner frequency of 4MHz. The mixer offers a very low flicker noise corner frequency of 80Hz for DVB-H application. A fabricated test chip with integrated clock regeneration circuit offers even for a very small clock input signal amplitude a maximum gain of 26dB. The combination offers an IIP3 of −5dBm while the mixer consumes 12.27mA and the filter 4.42mA from a 1.25V supply.

A novel compact low-power direct conversion receiver for mobile UHF RFID reader

A novel direct conversion receiver with low cost and low power is implemented in a 0.18 μm 1P6M standard CMOS process for a Mobile UHF RFID reader. A highly linear active mixer with low flicker noise and low noise active load is proposed. An efficient and low cost on-chip DC offset voltage canceling scheme is adopted with a high-input-impedance four-input OPAMP to buffer the output of the DC offset canceller (DCOC) block. The receiver has a measured input 1 dB compression point of −2 dBm and a sensitivity of −72 dBm in the presence of the large leakage signal from the transmitter. Only occupying a silicon area of 2.5 mm2 and consuming 21 mA from a 1.8 V supply, the receiver makes the mobile UHF RFID reader to communicate with a transponder in a distance of 1 m conveniently.

A 0.18-μm SiGe BiCMOS HBT VCO using diode degeneration

This letter proposes a BiCMOS voltage-controlled oscillator (VCO), which was implemented in the standard TSMC 0.18 μm SiGe 3P6M BiCMOS process. The VCO consists of an nMOSFET cross-coupled oscillator stacked in series with source degenerated HBT diodes. SiGe HBT has an inherently low flicker noise compared to CMOS devices. At the supply voltage of 1.5 V, the output phase noise of the VCO is −122.01 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 5.6 GHz, and the figure of merit is −190.43 dBc/Hz. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 54:605–608, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26619

Analysis of position time series of GPS-DORIS co-located stations

We analyse the weekly time series of position residuals of 10 GPS-DORIS (Global Positioning System-Doppler Orbitography and Radiopositioning Integrated by Satellite) co-located stations in order to evaluate the spectral content of the observed nonlinear station motion. We have used the discrete wavelet transform to extract trends and seasonal signals, and the Allan variance to characterise the residual noise which allows to evaluate the positioning stability of stations.The GPS-DORIS co-located time series were produced using the GIPSY/OASIS II software, referred to ITRF2005 and expressed in the local geodetic reference frame. The wavelet analysis has revealed useful nonlinear trends, annual and semi-annual signals contained in the studied time series. For GPS time series, the amplitude of the annual signal is around 1.5 and 2.9mm in the horizontal (North and East) and Vertical components respectively, and the semi-annual signal shows amplitude around 0.8, 1.3 and 2.3mm in the North, East and Vertical components, respectively. For DORIS time series, the annual and semi-annual signals show amplitudes of around 4–6mm in the three components.However, after having removed the trends, annual and semi-annual signals, the slope of the Allan variance graph shows for GPS position time series, a combination of a low flicker noise and dominant white noise in the all three components, while for DORIS time series, the white noise is more frequent in the three components. The noise level, defined by the Allan deviation for the one-year sampling time, is smaller than 3 and 5mm in the three components for GPS and DORIS time series, respectively.

GaN-Based High-kPraseodymium Oxide Gate MISFETs withP2S5/(NH4)2SX+ UV Interface Treatment Technology

This study examines the praseodymium-oxide- (Pr2O3-) passivated AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs) with high dielectric constant in which the AlGaN Schottky layers are treated with P2S5/(NH4)2SX+ ultraviolet (UV) illumination. An electron-beam evaporated Pr2O3insulator is used instead of traditional plasma-assisted chemical vapor deposition (PECVD), in order to prevent plasma-induced damage to the AlGaN. In this work, the HEMTs are pretreated with P2S5/(NH4)2SXsolution and UV illumination before the gate insulator (Pr2O3) is deposited. Since stable sulfur that is bound to the Ga species can be obtained easily and surface oxygen atoms are reduced by the P2S5/(NH4)2SXpretreatment, the lowest leakage current is observed in MIS-HEMT. Additionally, a low flicker noise and a low surface roughness (0.38 nm) are also obtained using this novel process, which demonstrates its ability to reduce the surface states. Low gate leakage current Pr2O3and high-kAlGaN/GaN MIS-HEMTs, with P2S5/(NH4)2SX+ UV illumination treatment, are suited to low-noise applications, because of the electron-beam-evaporated insulator and the new chemical pretreatment.

A Low-Flicker Noise Gate-Controlled Lateral–Vertical Bipolar Junction Transistor Array With 55-nm CMOS Technology

The low-flicker noise (1/f noise) gate-controlled lateral-vertical bipolar junction transistor array (GC-LV-BJTA) is developed with a foundry's 55-nm CMOS technology for low-noise and low-power RF circuit applications. The GC-LV-BJTA is formed by paralleling some unit cells into an array structure for sharing adjacent collectors and bases, thus minimizing the total area. Many efforts, including the use of a deep n-well, a novel layout, an optimized emitter perimeter/area ratio, and a negatively biased gate, have been implemented to suppress the noise level and enhance the current gain. As a result, the GC-LV-BJTA, consisting of 16 unit cells with a 0.16-μm gate length, achieves a high gain of 85.7 with available low 1/f noise level, as compared with the nMOS or SiGe HBT.

5 MHz phase detector with low residual flicker

The measurement of close-to-carrier phase modulation (PM) noise of state-of-the-art oscillators is always challenging. Quite often the residual noise of the phase detector used in these measurements is higher than the noise of the source at Fourier offset frequencies between 5 and 100 Hz. A conventional double balanced mixer using 2N2222A transistors as the nonlinear components of a diode ring was constructed for use as a phase detector. Residual single-sideband PM noise measurements at 5 MHz for this device have shown a low flicker noise floor of L(10 Hz)=−163 dBc/Hz. When this mixer design is implemented in a dual-channel measurement system, a cross-correlated PM noise floor of better than L(10 Hz)=−170 dBc/Hz is expected.

Flicker noise reduction in RF CMOS mixer using differential active inductor

This article presents a low flicker noise (1/f), double-balanced Gilbert-cell mixer. As the down converted base-band signal is strongly affected by the low-frequency flicker noise, resulting in mixer signal-noise ratio (SNR) degradation, a dynamic current injection technique has been used to reduce the flicker noise corner frequency. Differential active inductor has been used to tune the tail capacitance at the node between the local oscillator (LO) switches and the radio frequency (RF) transconductance stages, resulting in reduction of RF leakage. RF and LO leakage has been minimized by adding an on-chip low-pass filter to the mixer output. The mixer has been designed and fabricated using Taiwan Semiconductor Manufacture Company (TSMC) 0.18-μm 1P6M complementary metal-oxide-semiconductor FET (CMOS) process. The performance of the fully integrated mixer is given. With RF of 2.4 GHz, intermediate frequency of 10 MHz and LO power of −5 dBm, conversion gain of 12 dB, input third order intercept point (IIP3) of −5.5 dBm, and single-side band noise (SSB-NF) figure of 15 dB with flicker noise corner frequency of 300 KHz had been measured. The mixer consumes 19.8 mW from 1.8 V supply. © 2011 Wiley Periodicals, Inc. Microwave Opt Technol Lett 53:2553–2556, 2011; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26366

High electrical performance liquid-phase HBr oxidation gate insulator of InAlAs/InGaAs metamorphic MOS-mHEMT

The InAlAs/InGaAs metal–oxide–semiconductor metamorphic high electron mobility transistors (MOS-mHEMTs) were demonstrated by using liquid-phase HBr treatment technology to form a high-quality gate insulator layer. In this study, liquid-phase HBr treatment technology was used instead of traditional plasma-assisted chemical vapor deposition (PECVD) because the proposed technology can prevent the device from plasma-induced damage. The novel HBr + ultraviolet (UV) illumination treated InGaAs provided a lower surface states such that MOS structure can be efficiently obtained. Besides, based on the atomic force microscopy (AFM) measurement, the native oxides film formed by HBr + UV illumination treatment also provided a better surface roughness compared to traditional NH 4OH and only HBr treatment solutions. It is beneficial for reducing the surface traps and lowering the leakage current in MOS-mHEMTs. Based on the flicker noise and load-pull power measurement results, HBr + UV treatment mHEMT achieved a low flicker noise at high current level and the power-added efficiency can be enhanced up to 9%. Therefore, the novel liquid phase method of HBr + UV illumination treatment exhibited a highly potential for low noise microwave power device applications.

CMOS Direct-conversion Radio Transceiver Design for 5-GHz WLAN Applications

Direct-conversion radio transceiver chipsets for 5-GHz WLAN have been implemented in 0.18-/jm CMOS technology. The receiver front-end includes low flicker noise down-conversion mixers where the parasitic tail capacitances in the transconductance stage are resonated out at the operating frequency. To reduce the local oscillator pulling and leakage, an offset clock generator is implemented in which a voltage controlled oscillator operates at two-thirds of the operating frequency band. The transmitter front-end can drive up to 2 dBm output power at the driver amplifier. The receiver front-end has 6.5 dB noise figure, -13 dBm input IP3, and voltage gain of 20 dB. The overall receiver has voltage gain of 60 dB. The phase noise of the clock generator at 5 GHz frequency is -109 dBc/Hz at 1 MHz offset.