Indium Tin Oxide Gate Research Articles

Highly Responsive Gate-Controlled p-GaN/AlGaN/GaN Ultraviolet Photodetectors with a High-Transmittance Indium Tin Oxide Gate.

This work presents highly responsive gate-controlled p-GaN/AlGaN/GaN ultraviolet photodetectors (UVPDs) on Si substrates with a high-transmittance ITO gate. The two-dimensional electron gas (2DEG) in the quantum well of the polarized AlGaN/GaN heterojunction was efficiently depleted by the p-GaN gate, leading to a high photo-to-dark current ratio (PDCR) of 3.2 × 105. The quantum wells of the p-GaN/AlGaN and AlGaN/GaN heterojunctions can trap the holes and electrons excited by the UV illumination, thus efficiently triggering a photovoltaic effect and photoconductive effect, separately. Furthermore, the prepared photodetectors allow flexible adjustment of the static bias point, making it adaptable to different environments. Compared to traditional thin-film semi-transparent Ni/Au gates, indium tin oxide (ITO) exhibits higher transmittance. Under 355 nm illumination, the photodetector exhibited a super-high responsivity exceeding 3.5 × 104 A/W, and it could even exceed 106 A/W under 300 nm illumination. The well-designed UVPD combines both the advantages of the high-transmittance ITO gate and the structure of the commercialized p-GaN/AlGaN/GaN high-electron-mobility transistors (HEMTs), which opens a new possibility of fabricating large-scale, low-cost, and high-performance UVPDs in the future.

Investigating the Failure Mechanism of p-GaN Gate HEMTs under High Power Stress with a Transparent ITO Gate.

The channel temperature distribution and breakdown points are difficult to monitor for the traditional p-GaN gate HEMTs under high power stress, because the metal gate blocks the light. To solve this problem, we processed p-GaN gate HEMTs with transparent indium tin oxide (ITO) as the gate terminal and successfully captured the information mentioned above, utilizing ultraviolet reflectivity thermal imaging equipment. The fabricated ITO-gated HEMTs exhibited a saturation drain current of 276 mA/mm and an on-resistance of 16.6 Ω·mm. During the test, the heat was found to concentrate in the vicinity of the gate field in the access area, under the stress of VGS = 6 V and VDS = 10/20/30 V. After 691 s high power stress, the device failed, and a hot spot appeared on the p-GaN. After failure, luminescence was observed on the sidewall of the p-GaN while positively biasing the gate, revealing the side wall is the weakest spot under high power stress. The findings of this study provide a powerful tool for reliability analysis and also point to a way for improving the reliability of the p-GaN gate HEMTs in the future.

Self-Aligned Transparent-Gate ITO/Germanium Nanospheres/SiO2/SiGe-Nanosheets photoMOSFETs on Silicon Nitride Platform

We report experimental fabrication and characterization of photoMOSFETs with self-aligned gate-stacking heterostructures of indium-tin-oxide (ITO)/Ge nanospheres/SiO₂-shell/Si_1-xGe_x-nanosheets. Array of Ge-nanosphere/SiO₂-shell/SiGe-nanosheet heterostructures was created in a self-organized, CMOS approach using the thermal oxidation of lithographically-patterned poly-Si_0.85Ge_0.15 nanopillars over buffer layers of Si₃N₄ on top of SOI substrates. With a polysilicon dummy-gate, source and drain self-align with the transparent ITO gate using a replacement-metal-gate process. Very high photocurrent gain, large photoresponsivity, as well as improved input capacitance and 3dB frequency were experimentally achievable in our photoMOSFETs. The pivotal roles of Ge-optical gate and SiGe-channel for large photoresponsivity and current gains were analyzed via numerical simulation.

Investigation on Stability of p-GaN HEMTs With an Indium–Tin–Oxide Gate Under Forward Gate Bias

In this study, p-GaN HEMTs with an indium-tin-oxide (ITO) electrode fabricated on the two different Mg concentration, i.e., 1 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">19</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-3</sup> and 8 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">19 </sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-3</sup> ,in p-GaN layer are investigated for the first time under the forward gate bias to understand the stability of the forward gate bias breakdown and V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> shift stability. First of all, a Mg concentration in p-GaN layer results in a better Ohmic characteristic between the ITO and p-GaN contact. Furthermore, the fabricated device with a high Mg concentration of p-GaN layer shows a better forward gate breakdown voltage, which can be attributed to the better Ohmic characteristic between p-GaN and ITO electrode. Last, an obvious negative V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> shift is observed, which is most probably related to the hole injections/trapping effects. In sum, the gate breakdown characteristic in p-GaN HEMTs with ITO electrode can be further improved while using high Mg concentration of p-GaN layer while an obvious a negative V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> shift under a forward gate bias is observed, indicating a trade-off between the gate breakdown voltage and V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> instability needs to be carefully considered to optimize the forward gate bias stability in p-GaN HEMTs with an ITO electrode.

Demonstration of p-GaN/AlGaN/GaN High Electron Mobility Transistors With an Indium–Tin–Oxide Gate Electrode

In this study, p-GaN/AlGaN/GaN high electron mobility transistors (HEMTs) with indium-tin-oxide (ITO) gate electrodes are demonstrated. The DC measurements for the devices show a drain current (ID) of 438 mA/mm at a V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</sub> and a V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> of 10 and 8 V, respectively. A maximum gm of 92.1 mS/mm and a specific ON-resistance (R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</sub> · A) of 1.86 mΩcm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> are obtained. Furthermore, the robustness of the ITO gate electrode atop the p-GaN layer under the forward gate bias is studied, indicating stable I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> - V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> and I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</sub> - V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> characteristics for a gate voltage of less than 11 V, which is higher than the compared device with Ni/Au Schottky gate contact. Therefore, ITO gate electrodes, which are compatible with the Light-emitting diode (LED) process, are a promising alternative for p-GaN HEMT technologies.

Protein Nanosphere Anchors for Stabilizing Hydroxylated Polymer Chains in Organic Memory Transistors with Outstanding Retention Characteristics

AbstractIt is demonstrated that a heme protein (cytochrome c [Cyt c]) nanosphere plays a strong anchoring role in binding hydroxyl groups of poly(vinyl alcohol) (PVA) leading to outstanding high‐temperature (100 °C) retention characteristics of transistor‐type organic memory devices (TOMDs). The PVA:Cyt c layers are spin‐coated on indium tin oxide gate electrodes from aqueous solutions with various Cyt c contents up to 50 wt%, followed by the formation of poly(3‐hexylthiophene) (P3HT) channel layers and nickel/aluminum top source/drain electrodes in TOMDs. Results show that adding 20 wt% Cyt c improves the drain current of devices in the presence of good hysteresis characteristics, which are maintained even after exposure to high‐temperature conditions (100 °C). The excellent conservation of hysteresis characteristics is attributed to the formation of Cyt c nanospheres that act as an anchoring point to retard the relaxation of PVA chains via specific interactions (hydrogen bonding etc.) between amino groups in the Cyt c nanosphere surfaces and hydroxyl groups in the PVA chains. The optimized PVA:Cyt c layers (20 wt% Cyt c, thermal treatment at 100 °C) deliver excellent retention characteristics to TOMDs, whereas no memory function is measured in the case of the pristine PVA layers at 100 °C.

Transparent conductive oxide-gated silicon microring with extreme resonance wavelength tunability

Transparent conductive oxides have attracted escalating research interest for integrated photonic devices and metasurfaces due to the extremely large electro-optic modulation of the refractive index by the free-carrier-induced plasma dispersion effect. In this paper, we have designed and fabricated a silicon microring resonator using an indium-tin oxide gate as the electric-tuning electrode. It achieved an ultralarge resonance wavelength tunability of 271 pm/V, which is obtained through the reduced width of the ring waveguide and a high-dielectric-constant HfO2 insulator. We demonstrated a broad resonance wavelength tuning range of over 2 nm with an ultrafast response time of less than 12 ns and near-zero static power consumption, which outperforms traditional thermal tuning.

Reversible capacitance changes in the MOS capacitor with an ITO/CeO2/p-Si structure

A reversible capacitance changes with respect to the polarity of applied voltage is demonstrated in a MOS (metal-oxide-semiconductor) capacitor consisting of a high-k CeO2 and oxygen-reactive indium-tin-oxide (ITO) electrode on p-Si substrate, i.e., an ITO/CeO2/p-Si structure. The capacitance-voltage (C-V), capacitance-time (C-t), and voltage-pulse measurements exhibit consistently that the accumulation capacitance is gradually increased upon repeatedly applying negative voltage to the ITO, while the depletion capacitance is reversibly decreased upon applying positive voltage. Particularly, the capacitance change is observed even at a low voltage of ±0.5 V from the device with 40-nm-thick CeO2 layer. The capacitance change is further enhanced as increasing measurement temperature from 25 to 100 °C, implying that the capacitance change is associated with the thermally activated process under the applied voltage. In addition, the resistance of ITO gate electrode is found to decrease upon applying negative voltage, but it is increased reversibly upon applying positive voltage. The reversible capacitance changes in the MOS capacitor with oxygen-reactive ITO gate electrode are explained with voltage-driven oxygen ion migration between ITO and CeO2 layers that can alter the CeO2 dielectric permittivity and induce the gate depletion in the ITO. These reversible capacitance changes have a potential to be employed to modulate the MOSFET (MOS field-effect-transistor) properties such as on-state current, threshold voltage, and transconductance.

Quantum Confinement and Interface States in ZnO Nanocrystalline Thin-Film Transistors

The experimental current–voltage ( ${I}_{D}$ – ${V}_{G}$ ) and capacitance–voltage ( ${C}$ – ${V}_{G}$ ) characteristics of the bottom-gate/top-contact ZnO thin-film transistors (TFTs) are analyzed accounting for quantum confinement and interface state effects. All the measurements are performed on the same TFTs composed of a 45-nm-thick nanocrystalline ZnO channel, indium tin oxide gate electrode, and a 21-nm-thick Al2O3 gate insulator. Interface state density (Dit) derived from the combined high–low frequency capacitance method reveals a large Dit near the conduction band edge. The TFT characteristics are simulated using a Schrodinger–Poisson model and compared to a semiclassical model. The Schrodinger–Poisson model calculates a lower C in accumulation by correctly accounting for the peak carrier concentration being several nanometers away from the ZnO/Al2O3 interface. The fit error in ${C}$ – ${V}_{G}$ in strong accumulation is only 1.2% compared to 4% in the semiclassical simulations. All simulations are performed using 21 nm of Al2O3. An effective mobility ( $\mu _{\mathrm{ eff}}$ ) that increases linearly with gate voltage is derived from the ratio of the experimental ${I}_{D}$ and the simulated mobile charge per unit area of the channel. Ignoring quantum confinement overestimates the channel charge and hence underestimates $\mu _{\mathrm{ eff}}$ by 40%. An additional Dit profile, at the top interface of the ZnO, is proposed in our analysis to explain the ${I}_{D}$ – ${V}_{G}$ characteristics in the subthreshold region.

Semi-transparent vertical organic light-emitting transistors

Abstract Vertical organic light-emitting transistor (VOLET) having an organic light-emitting diode integrated with a vertical thin-film transistor is promising for transparent electronics because the vertical device structure potentially offers a display with a large aperture ratio and a low power consumption. However, making a transparent VOLET has been challenging due to the requirements for all transparent electrodes including fabrication of a porous source electrode for current modulation in the device. Here, we report a semi-transparent VOLET with a large modulation of light emitted through the top and bottom electrodes using a nano-porous indium-tin oxide (ITO) source electrode, a Mg:Ag drain electrode, and an ITO gate electrode. The porous ITO source electrode is not only important for luminance modulation, but the nano-textured film morphology also enhances light extraction from the device. Finally, we show that the off current of the VOLET can be suppressed with an electron transporting layer (C60), leading to a large luminance on/off ratio of 104.

Organic devices based on pentacene and perylene by the neutral cluster beam deposition method

In this study, on the basis of p-type pentacene and n-type N,N′-dioctyl-perylene-3,4,9,10-tetracarboxylic acid diimide (PTCDI-C8) organic field-effect transistors (OFETs) and two-input complementary NAND logic gates in the top-contact device configuration were produced and characterized. The organic active layers were deposited on hydroxyl-free polymethylmethacrylate (PMMA)-modified indium tin oxide (ITO) glass gate substrates by the neutral cluster beam deposition (NCBD) method. The morphological and structural properties of the organic semiconducting active layers on the PMMA substrates were examined using atomic force microscopy, X-ray diffraction and contact-angle goniometry. Based on the growth of high-quality, well-packed crystalline films on the PMMA dielectric-modified ITO gate substrates, the p- and n-type transistors exhibited hole and electron mobilities of 0.247 and 7.23×10−2cm2/Vs, respectively, in the air without encapsulation. The trap density and activation energy were also derived from the transport characteristics for the temperature dependence of the mobilities in the temperature range 20−300K for the first time. Because of the well balanced p- and n-type OFETs in the devices, the complementary metal-oxide semiconductor (CMOS) NAND logic circuits exhibited a high voltage gain and a large noise margin with slight hysteresis.

Vertical Organic Field-Effect Transistors for Integrated Optoelectronic Applications.

Direct integration of a vertical organic field-effect transistor (VOFET) and an optoelectronic device offers a single stacked, low power optoelectronic VOFET with high aperture ratios. However, a functional optoelectronic VOFET could not be realized because of the difficulty in fabricating transparent source and gate electrodes. Here, we report a VOFET with an on/off ratio up to 10(5) as well as output current saturation by fabricating a transparent gate capacitor consisting of a perforated indium tin oxide (ITO) source electrode, HfO2 gate dielectric, and ITO gate electrode. Effects of the pore size and the pore depth within the porous ITO electrodes on the on/off characteristic of a VOFET are systematically explained in this work. By combining a phosphorescent organic light-emitting diode with an optimized VOFET structure, a vertical organic light-emitting transistor with a luminance on/off ratio of 10(4) can be fabricated.

Organic Field‐Effect Transistor Memory Devices Using Discrete Ferritin Nanoparticle‐Based Gate Dielectrics

Organic field-effect transistor (OFET) memory devices made using highly stable iron-storage protein nanoparticle (NP) multilayers and pentacene semiconductor materials are introduced. These transistor memory devices have nonvolatile memory properties that cause reversible shifts in the threshold voltage (Vth ) as a result of charge trapping and detrapping in the protein NP (i.e., the ferritin NP with a ferrihydrite phosphate core) gate dielectric layers rather than the metallic NP layers employed in conventional OFET memory devices. The protein NP-based OFET memory devices exhibit good programmable memory properties, namely, large memory window ΔVth (greater than 20 V), a fast switching speed (10 μs), high ON/OFF current ratio (above 10(4)), and good electrical reliability. The memory performance of the devices is significantly enhanced by molecular-level manipulation of the protein NP layers, and various biomaterials with heme Fe(III) /Fe(II) redox couples similar to a ferrihydrite phosphate core are also employed as charge storage dielectrics. Furthermore, when these protein NP multilayers are deposited onto poly(ethylene naphthalate) substrates coated with an indium tin oxide gate electrode and a 50-nm-thick high-k Al2 O3 gate dielectric layer, the approach is effectively extended to flexible protein transistor memory devices that have good electrical performance within a range of low operating voltages (<10 V) and reliable mechanical bending stability.

High-performance organic field-effect transistors with dielectric and active layers printed sequentially by ultrasonic spraying

High-performance organic field-effect transistors (OFETs) are reported with dielectric and active layers sequentially deposited by ultrasonic spray-printing. A cross-linkable insulator and a soluble small molecule semiconductor are developed which are both printable and highly robust. Using plastic with pre-patterned indium tin oxide gate contacts as required for display applications, two different layers are sequentially spray-printed: the semiconductor 6,13-bis(trisopropylsilylethynyl)pentacene (TIPS-PEN), and the insulator poly-4-vinylphenol (PVP). OFETs printed in ambient air with a bottom-gate/top-contact geometry are shown to achieve on/off ratios of >104 and mobilities up to 0.35 cm2 V−1 s−1. These rival the characteristics of the best solution-processable small molecule FETs fabricated by other processing methods such as drop casting and ink-jet printing.

A Proposed Silicon Optical Electronic Integrated Circuit with Monolithic Integration of LED, OPFET and Receiver Circuit

The paper presents an improved model of Silicon Optical Electronic Integrated Circuit (SOIC). The objective is to improve our OEIC model i.e. OEIC Circuit with Two Metal Layer Silicon Waveguide and Low Power Photonic Receiver Circuit by increasing responsitivity by increasing the quantum efficiency without changing the basic approach. This can be done by using optically controlled silicon MESFET also called OPFET. We also introduced the transparent indium tin oxide gate which when combines with MESFET, acts as a pre-amplifier in OEIC. The optically controlled silicon MESFET is integrated here having improved responsitivity, low gate to source capacitance, less signal delay, reduced noise and increased quantum efficiency.

Comparison of electrical and optical properties of Al/SiO2/n-GaN and ITO/SiO2/n-GaN metal–oxide–semiconductor photodetectors

Gallium nitride (GaN) MOS ultraviolet photodetector was fabricated using silicon dioxide (SiO2) insulator grown by a low temperature (30–40°C) and reliable method of liquid-phase deposition (LPD). The LPD process uses a supersaturated acid aqueous solution of hydrofluosilicic (H2SiF6) as a source liquid and an aqueous solution of boric acid (H3BO3) as a deposition rate controller. In this study, the LPD SiO2 was prepared at 40°C with concentrations of H2SiF6 and H3BO3 at 0.4 and 0.01 M, respectively. The authors have prepared Al gate/10 nm LPD-SiO2/n-GaN (sample A) and indium tin oxide (ITO) gate/10 nm LPD-SiO2/n-GaN (sample B). The dark current density was as low as 3.66×10−8 A/cm2 with an applied field of 5 MV/cm for sample B. For an incident light wavelength of 366 nm with an intensity of 4.15 mW/cm2 and a −10 V reverse bias, it was found that the measured responsivity was around 0.145 and 0.292 A/W for samples A and B, respectively. The photocurrent-to-dark current contrast ratio is up to 104 by using an ITO gate of the metal–oxide–semiconductor PD with an incident light wavelength of 366 nm. Defect-assisted tunnelling was invoked to explain these results.

Light Effects on Charge Trapping and Detrapping of nc-ZnO Embedded ZrHfO High-k MOS Nonvolatile Memories

MOS capacitors containing the nanocrystalline ZnO embedded Zr doped HfO2 high-k gate dielectric film integrated with the indium tin oxide gate electrode have been fabricated and characterized under the dark and light exposure conditions for nonvolatile memory properties. When measured in dark, the capacitor had a large charge storage capacity showing a counterclockwise capacitance-voltage hysteresis. When exposed to the light, the memory capacity was increased. The generation and transfer of electrons and holes in and from the nanocrystalline ZnO under the light exposure condition are responsible for the memory window change and charge retention characteristics.

Organic field-effect transistor with extended indium tin oxide gate structure for selective pH sensing

In this study, organic field-effect transistors (OFETs) with extended gate structure were fabricated for selective pH sensing applications. Indium tin oxide (ITO) was used as extended gate electrode as well as an active layer for H + sensing. The threshold voltage of the fabricated ion-selective OFET was varied by the changes in the electrochemical potential at the ITO electrode surface upon its exposure to buffer solutions with variable pH values. The sensor showed excellent linearity and a high sensitivity of 57–59 mV/pH in the pH range of 2–12. The selectivity of the ITO sensing layer to H + ions was also investigated by measuring the interfering effect of Ca 2+ and K + ions in the buffer pH solutions. The results showed that the Ca 2+ and K + ions weakly interfere with the selective pH sensing of the ITO-extended gate OFET sensor device.

Characteristics of sputtered Al-doped ZnO films for transparent electrodes of organic thin-film transistor

Aluminum-doped ZnO (AZO) thin-films were deposited with various RF powers at room temperature by radio frequency (RF) magnetron sputtering method. The electrical properties of the AZO film were improved with the increasing RF power. These results can be explained by the improvement of the crystallinity in the AZO film. We fabricated the organic thin-film transistor (OTFT) of the bottom gate structure using pentacene active and poly-4-vinyl phenol gate dielectric layers on the indium tin oxide gate electrode, and estimated the device properties of the OTFTs including drain current–drain voltage (I D–V D), drain current–gate voltage (I D–V G), threshold voltage (V T), on/off ratio and field effect mobility. The AZO film that grown at 160 W RF power exhibited low resistivity (1.54 × 10 − 3 Ω·cm), high crystallinity and uniform surface morphology. The pentacene thin-film transistor using the AZO film that's fabricated at 160 W RF power exhibited good device performance such as the mobility of 0.94 cm 2/V s and the on/off ratio of ~ 10 5. Consequently, the performance of the OTFT such as larger field-effect carrier mobility was determined the conductivity of the AZO source/drain (S/D) electrode. AZO films prepared at room temperature by the sputtering method are suitable for the S/D electrodes in the OTFTs.

AlGaN/GaN HEMT With a Transparent Gate Electrode

AlGaN/GaN high-electron-mobility transistors (HEMTs) with indium tin oxide (ITO) transparent gate electrodes have been fabricated. The transparent gate electrodes enable the investigation of photon, electron, and phonon behaviors in active regions in HEMTs using optical characterizations such as electroluminescence, photoluminescence, and Raman spectroscopy technologies. Leakage current, on/off ratio, and transparency have been compared for transistors using Ni/Au/Ni, ITO, and Ni/ITO stacks as gate electrodes. Compared to the Ni/Au/Ni gate transistor, the ITO gate device shows a comparable current gain cutoff frequency ( <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">f</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> ) but a much lower power gain cutoff frequency ( <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">f</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> ) due to the low conductivity of ITO.