High-resistivity Si Substrates Research Articles

Transmission Characteristics of Gaussian Monocycle Pulses for Inter-Chip Wireless Interconnections Using Integrated Antennas

Performance of integrated dipole antennas on Si substrates was investigated for inter-chip signal transmission in wireless interconnections for Si ultra-large scale integrated circuits (ULSI). Linear dipole antennas 4 mm long were fabricated on P-type Si substrates with a resistivity of 10 Ω·cm in an inter-chip stacked structure. Inter-chip antenna transmission gains were measured for the dipole antennas at a vertical distance of 2.86 mm and a horizontal distance of 3 mm when Si substrates with a resistivity of 2.29 kΩ·cm were inserted. A transmission gain of -30 dB and no dependence on vertical distance were observed. Gaussian monocycle pulses with a pulse width of 70 psec could be transmitted successfully in the inter-chip stacked structure. Antenna transmission gain and peak-to-peak voltage between Si chips were improved using a high resistivity Si substrate.

Microwave loss mechanisms in Ba 0.25Sr 0.75TiO 3 films

Trilayer Au(Pt)/Ba 0.25Sr 0.75TiO 3/(Pt)Au thin film varactors are fabricated on high resistive Si substrate and characterized at dc, rf and microwave frequencies. In the frequency range of 10–45 GHz the varactors reveal relatively low losses, the loss tangent is less than 0.025 at 45 GHz. Due to the thick and highly conductive Pt/Au electrodes the metal losses are less than 10%. However, the loss tangent of the ferroelectric film is still 3–5 times higher than that in Ba 0.27Sr 0.73TiO 3 single crystal. The analysis of the dc field dependent loss tangent and permittivity in a wide frequency range show that these additional losses are mainly due to the charged defects. Extrapolation of measured low frequency (1 MHz) loss tangents to the microwave region using the power law ω 1/3 is in good agreement with the experiment. We assume that the oxygen vacancies within the grain boundaries of ferroelectric film act as charged defects and cause extrinsic microwave losses. The knowledge of the extrinsic loss mechanism and corresponding microstructure defects is useful in optimization of the varactor design, deposition, and/or annealing process and further improvement of the varactor performance.

RF performance evaluation of ferroelectric varactor shunt switches

This paper addresses experimental RF performance evaluation, and electrical-parameter extraction of different-size ferroelectric varactor shunt switches. Ferroelectric varactor shunt-switch operation is based on the nonlinear dielectric tunability of a Ba0.6Sr0.4TiO3 (BST) thin film sandwiched between two metal layers in a parallel-plate configuration. Coplanar-waveguide implementation of the varactor shunt switch results in a high-speed RF switch, through a simple two-metal layer Si MMIC compatible process on high-resistivity Si substrates. The experimental RF performance of the switches shows low insertion loss for smaller-area devices, with good isolation for larger-area devices. To optimize the device design, the rf performances of multiple devices are tested, and the electrical parameters are extracted. The capacitance of the varactor shunt switches tested are tunable by more than 4:1 for bias voltages below 12 V. The switching speed of the devices tested is approximately 43 ns, based on the step-response measurements. © 2005 Wiley Periodicals, Inc. Microwave Opt Technol Lett 47: 370–374, 2005; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.21172

Novel low-cost wideband Si-based submount for 40 Gb/s optoelectronic devices

A novel low-cost wideband Si-based submount is proposed and fabricated for 40-Gb/s optoelectronic devices. The submount contains a coplanar waveguide (CPW) for microwave-signal feeding and a TaN thin-film resistor for impedance matching. The CPW transmission line is directly formed on high-resistivity Si substrate and exhibits a transmission loss as low as 0.165 dB/mm up to 40 GHz. Such a configuration has the advantage of a simplified fabrication procedure and efficient heat dissipation. As a demonstration, a high-speed electroabsorption (EA) modulator is chip-level packaged using the Si-based submount. The small-signal modulation bandwidth is measured to be more than 33 GHz, which is the first report of 40-Gb/s optoelectronic devices on Si-based submount. © 2005 Wiley Periodicals, Inc. Microwave Opt Technol Lett 45: 90–93, 2005; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.20733

Design of a Ku-band Wilkinson power divider on surface-stabilized high-resistivity Si substrates

The design, fabrication, and experimental evaluation of a Ku-Band 3-dB Wilkinson power divider on high-resistivity silicon (HRS) are presented in this paper. The measured insertion for the powder divider is 3.5 dB and the isolation between ports 2 and 3 is 12 dB. CPW lines were fabricated on two different silicon substrates (HRS and CMOS-grade silicon) and it is shown that the loss characteristics for a 50Ω CPW patterned on the surface-stabilized HRS is only 0.16 dB at 15 GHz. In contrast, the insertion loss for CPW line on CMOS grade silicon is 8.3 dB at 15 GHz. Thus, low insertion loss can be achieved by stabilizing the surface of HRS with a thin polysilicon layer. © 2005 Wiley Periodicals, Inc. Microwave Opt Technol Lett 44: 436–439, 2005; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.20659

12 W/mm AlGaN–GaN HFETs on Silicon Substrates

Al/sub 0.26/Ga/sub 0.74/N-GaN heterojunction field-effect transistors were grown by metal-organic chemical vapor deposition on high-resistivity 100-mm Si (111) substrates. Van der Pauw sheet resistance of the two-dimensional electron gas was 300 /spl Omega//square with a standard deviation of 10 /spl Omega//square. Maximum drain current density of /spl sim/1 A/mm was achieved with a three-terminal breakdown voltage of /spl sim/200 V. The cutoff frequency and maximum frequency of oscillation were 18 and 31 GHz, respectively, for 0.7-/spl mu/m gate-length devices. When biased at 50 V, a 2.14-GHz continuous wave power density of 12 W/mm was achieved with associated large-signal gain of 15.3 dB and a power-added efficiency of 52.7%. This is the highest power density ever reported from a GaN-based device grown on a silicon substrate, and is competitive with the best results obtained from conventional device designs on any substrate.

Effect of High-Resistivity Si Substrate on Antenna Transmission Gain for On-Chip Wireless Interconnects

Characterization of small integrated dipole antennas on high-resistivity Si substrates for use in on-chip wireless interconnection was performed and results were compared with those obtained by 3-dimensional (3D) finite-element simulation. The integrated antennas on standard P-type Si substrates with resistivities of 10 Ω·cm, 79.6 Ω·cm, 132 Ω·cm and 2.29 kΩ·cm, and one high-energy proton-implanted Si substrate were measured. When antenna length was 3.0 mm and antenna distance was 3.0 cm on a 10-Ω·cm-resistivity Si substrate, the antenna transmission gain was -43 dB. The antenna transmission gain was improved to -24 dB on the 2.29 kΩ·cm Si substrate. By using high-resistivity Si substrates, signal transmission via integrated antennas becomes possible.

Characteristics of Si Integrated Antenna for Inter-Chip Wireless Interconnection

The characteristics of a small-size integrated dipole antenna on Si have been evaluated for use in inter-chip wireless interconnections and the measured characteristics are compared with the results obtained by 3D finite element simulation. The measured inter-chip transmission coefficients for a 0.02 mm2 dipole antenna pair manually separated by 10.5 mm each other in the horizontal plane and in a omit plane where the receiver chip is 2.6 mm higher than the transmitter chip were -42.7 dB and -57.5 dB at 20 GHz when the antennas were fabricated on a high-resistivity Si substrate and on standard Si substrate, respectively. This shows the feasibility of using integrated dipole antennas for wireless clock distribution and data transmission in future 3D ICs or in stacked chip scale packaging.

High-Q integrated RF passives and RF-MEMS on silicon

ABSTRACTA technology platform is described for the integration of low-loss inductors, capacitors, and MEMS capacitors on a high-resistivity Si substrate. Using this platform the board space area taken up by e.g. a DCS PA output impedance matching circuit can be reduced by 50%. The losses of passive components that are induced by the semi-conducting Si substrate can effectively be suppressed using a combination of surface amorphisation and the use of poly crystalline Si substrates. A MEM switchable capacitor with a capacitance switching factor of 40 and an actuation voltage of 5V is demonstrated. A continuous tuneable dual-gap capacitor is demonstrated with a tuning ratio of 9 using actuation voltages below 15V.

Performance of a quasi-optical NbN hot-electron bolometric mixer at terahertz frequencies

The performance of a hot-electron bolometric (HEB) mixer based on NbN from 0.9 to 2.5 THz was investigated using a quasi-optical receiver configuration. An HEB mixer is an ultra-thin superconducting NbN strip located at the feed point of a thick normal conducting Au spiral antenna on a high-resistivity Si substrate. The active area of the mixer was 3 nm thick, 0.4 μm long and 4 μm wide. The quasi-optics consisted of an MgO hyperhemisphere with anti-reflection caps made of Kapton-JP polyimide film and an offset parabola to reduce input losses. The frequency dependence of the double-sideband receiver noise temperature was investigated at several frequencies by using a backward wave oscillator or an optically pumped far-infrared laser as the local oscillator. Results demonstrated low-noise and wide-band characteristics, below 1 K GHz−1 over the measured frequency range. At 917 GHz, the measured receiver noise temperature was 550 K across a 500 MHz intermediate-frequency bandwidth centred at 1.5 GHz, which is slightly better than that of other HEB mixers at around this frequency.This paper was presented at the 8th International Superconductive Electronics Conference, Osaka, Japan, 19–22 June 2001.

High speed Si-OEIC (OPIC) for optical pickup

An optical pickup OPIC/sup TM/ with a built-in high-speed split photodiode and new device structure, has been developed. We have successfully fabricated the OPIC with a cutoff frequency of 56 MHz for 780 nm wavelength radiation. We developed hologram laser in which a semiconductor laser, the OPIC and hologram glass are set as a unit, too. The development of these OPIC were made possible by the high-speed split photodiode, which have very high resistive Si substrate for reduction of the junction capacitance. The cutoff frequency of the high speed split photodiode thus realized is 61 MHz for 780 nm wavelength radiation. This photodiode has a double-layer anti-reflection film consisting of a silicon oxide film as the first layer and a silicon nitride film as the second layer. We show the structure of this new device, its fabrication process and the performance of the photodiode and OPIC.

Arrays of thermally evaporated PbSe infrared photodetectors deposited on Si substrates operating at room temperature

Thermally evaporated polycrystalline lead selenide was used to make detector arrays on high-resistivity Si substrates, for use as infrared photodetectors in the range. The arrays were made using standard photolithographic methods and a process fully compatible with the technologies used in the microelectronics industry. After activation at high temperature in an atmosphere, excellent uniformity and room-temperature peak detectivities up were obtained. The spectral response at 273 K of the detectors went up to , with peak responsivity of at . These arrays have been used to develop compact gas sensors with the addition of integrated bandpass multilayer optical filters.

High Q-factor inductors integrated on MCM Si substrates

High quality factor (Q) inductors were designed and fabricated on high-resistivity (2000 /spl Omega//spl middot/cm) Si substrates with multichip module (MCM) fabrication technology. A Q-factor of 30 was achieved for an inductor of 4 nH at 1-2 GHz. To enhance the Q-factor and reduce the parasitic coupling capacitance, a staggered double metal-layered structure was utilized by taking advantage of the double-layered metal lines in MCM. With electromagnetic simulation tools, computer-aided analysis was used to optimize the device characteristics. The skin effect and the lossy substrate effect on the performance of the radio frequency (RF) thin-film inductors were studied. The fabrication process used polyimide as the dielectric layer and aluminum as the metal layer. The use of the low dielectric-constant material, polyimide, reduces the parasitic coupling capacitance between metal lines and increases the quality factor and the self-resonant frequency for the RF integrated inductors.

Study of punch-through characteristics in irradiated MOSFETs

The DC and low frequency AC characteristics of the punch-through (PT) conduction have been examined in MOSFETs with different channel width/length ratios, fabricated on high resistivity Si substrates. The experimental results can be fitted by an analytical model deriving from a previous one developed for BARRITT devices. The modifications on the PT conduction induced by high dose neutron irradiation have been studied at various temperatures. The effects due to the radiation induced deep levels cannot be easily taken into account into the DC model, but can still be interpreted by using the AC model of the device. >

The cryogenic behaviour of metal-oxide-semiconductor transistors fabricated in high-resistivity silicon substrates

This paper discusses the static device operation of pMOSTs fabricated in high-resistivity (HR) Si substrates at cryogenic temperatures. It is shown that the anomalies observed at room temperature, i.e. the subthreshold leakage and the parasitic bulk conduction in saturation, are still present at 77 K and at 4.2 K, although considerable improvement of the subthreshold behaviour is observed. Furthermore, unlike MOSTs fabricated in standard substrates, little hysteresis is observed in the I-V characteristics down to liquid-helium temperatures. The observations are discussed in view of an analytical model adapted for HR-Si devices, which is extended for low-temperature operation. Finally, the effect of a reverse substrate bias, which is important for nuclear-radiation detection applications, and of the substrate contact on the device characteristics is demonstrated and discussed.

Limits of resolution of charge sensitive detector systems

A summary of a model of LF noise in field effect transistors is presented. New measurements of noise in FETs made on high resistivity Si substrates give evidence of the problems in such structures. The performance of conventional detector structures is compared with direct charge sensing FETs. The prospects of reducing equivalent noise charge to 0.1 e − rms are discussed.

Photodetectors fabricated on heteroepitaxial GaAs/Si structures grown by molecular beam epitaxy

Photodetectors were fabricated on GaAs/Si epitaxial structures grown on high resistivity Si substrates by modulated molecular beam epitaxy. Our efforts were focused on enhancing the substrate surface quality and optimizing the deposition conditions during the early stages of growth of the GaAs on the Si substrates. The photodetector structures investigated consisted of a 300Å thick GaAs/AlAs nucleation layer, a 5-period GaAs (100Å)/AlAs(100Å) accomodation layer grown at 300°C, two GaAs/InGaAs strained layer superlatices separated by a GaAs spacer layer, and a 2μm undoped GaAs active photodetector layer, a 0.2μm n-Gaas and a n +-GaAs contact layer. Various photodetector configurations fabricated in these GaAs/Si material structures were investigated. The photodetector response measurements were made using a 840nm wavelength pulsed laser with a pulse width of 5ns and rise (t r) and fall (t f) times of 200ps. Typical rise and fall times of the photodetectors were in the 1–2 ns and 3–6 ns ranges, respectively. The responsivity and quantum efficiency values of these photodetectors were in the ranges of 0.5–1.0 A/W and 0.3–1.5, respectively.

Electrical properties of InAs epilayers grown by molecular beam epitaxy on Si substrates

InAs epitaxial films have been grown by molecular beam epitaxy on high-resistivity Si (20 Ω cm) substrates for the first time, and transport properties were investigated by Hall effect measurements down to 10 K. The electron mobilities peak at 75 K with a value of 4.5×104 cm2/(V s) in 6.7-μm-thick (n=2.6×1015 cm−3 ) unintentionally doped layers. It is shown that the temperature dependence of the Hall mobility can be explained by a combined ionized impurity-polar optical phonon scattering model in the thin InAs layers. Despite the existence of a large lattice mismatch, the results are indicative of a high quality material.

Monolithic GaAs/Si Integration

AbstractThe recent demonstrations of room-temperature cw operation of diode lasers fabricated in GaAs/AlGaAs layers grown on Si wafers have encouraged efforts to develop monolithic GaAs/Si integration technology for applications such as optical interconnects between VLSI subsystems. This paper summarizes our current work in this area, which is focused on the development of a highspeed, MSI-scale monolithic GaAs/Si test chip that integrates Si MOSFET circuits with diode lasers, LEDs, photoconductive detectors, and MESFET logic circuits fabricated in GaAs/AlGaAs layers grown by molecular beam epitaxy. Growth issues and processing considerations that affect device and circuit performance are addressed, and the characteristics of LEDs monolithically integrated with Si driver circuits and of GaAs microwave MESFETs fabricated on high-resistivity Si substrates are reported.

Monolithic GaAs/Si Integration

ABSTRACTThe recent demonstrations of room-temperature cw operation of diode lasers fabricated in GaAs/AlGaAs layers grown on Si wafers have encouraged efforts to develop monolithic GaAs/Si integration technology for applications such as optical interconnects between VLSI subsystems. This paper summarizes our current work in this area, which is focused on the development of a highspeed, MSI-scale monolithic GaAs/Si test chip that integrates Si MOSFET circuits with diode lasers, LEDs, photoconductive detectors, and MESFET logic circuits fabricated in GaAs/AlGaAs layers grown by molecular beam epitaxy. Growth issues and processing considerations that affect device and circuit performance are addressed, and the characteristics of LEDs monolithically integrated with Si driver circuits and of GaAs microwave MESFETs fabricated on high-resistivity Si substrates are reported.