Abstract

The characteristics of a small-size integrated dipole antenna on Si have been evaluated for use in inter-chip wireless interconnections and the measured characteristics are compared with the results obtained by 3D finite element simulation. The measured inter-chip transmission coefficients for a 0.02 mm2 dipole antenna pair manually separated by 10.5 mm each other in the horizontal plane and in a omit plane where the receiver chip is 2.6 mm higher than the transmitter chip were -42.7 dB and -57.5 dB at 20 GHz when the antennas were fabricated on a high-resistivity Si substrate and on standard Si substrate, respectively. This shows the feasibility of using integrated dipole antennas for wireless clock distribution and data transmission in future 3D ICs or in stacked chip scale packaging.

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