Epitaxial Stack Research Articles

Continuous Growth of Buffer/Drift Epitaxial Stack Based on 4H-SiC by Quick Change of N<sub>2 </sub>Flow Rate under High Growth Rate Condition

N-type 4H-SiC homo-epitaxial films were grown under high growth rate condition by high speed wafer rotation vertical CVD tool, and dependence on N2 flow rate for in-wafer distribution of thickness and carrier concentration was investigated. By adjusting only the N2 flow rate from 0.33 to 130 sccm, average carrier concentration of the SiC film was controlled within a range from 3 x 1015 to 1 x 1018 cm-3, while maintaining good in-wafer uniformity less than ±7.0%. Average growth rate higher than 54 μm/h and in-wafer uniformity less than ±3.1% were maintained and no dependence for thickness distribution on N2 flow rate was observed. Buffer/drift epitaxial stack using quick change of N2 flow rate was fabricated, and the crystalline quality and steepness of N concentration at buffer/drift interface were also investigated. The epitaxial stack showed lower defect density compared with single drift layer and showed steep interface between buffer layer and drift layer.

Atomically interface engineered micrometer-thick SrMoO3 oxide electrodes for thin-film BaxSr1-xTiO3 ferroelectric varactors tunable at low voltages

In the field of oxide electronics, there has been tremendous progress in the recent years in atomic engineering of functional oxide thin films with controlled interfaces at the unit cell level. However, some relevant devices such as tunable ferroelectric microwave capacitors (varactors) based on BaxSr1−xTiO3 are stymied by the absence of suited compatible, very low resistive oxide electrode materials on the micrometer scale. Therefore, we start with the epitaxial growth of the exceptionally highly conducting isostructural perovskite SrMoO3 having a higher room-temperature conductivity than Pt. In high-frequency applications such as tunable filters and antennas, the desired electrode thickness is determined by the electromagnetic skin depth, which is of the order of several micrometers in the frequency range of a few gigahertz. Here, we report the pulsed laser deposition of a fully layer-by-layer grown epitaxial device stack, combining a several micrometers thick electrode of SrMoO3 with atomically engineered sharp interfaces to the substrate and to the subsequently grown functional dielectric layer. The difficult to achieve epitaxial thick film growth makes use of the extraordinary ability of perovskites to accommodate strain well beyond the critical thickness limit by adjusting their lattice constant with small shifts in the cation ratio, tuned by deposition parameters. We show that our approach, encompassing several orders of magnitude in film thickness scale whilst maintaining atomic layer control, enables the fabrication of metal-insulator-metal (MIM) varactors based on 50–100 nm thin BaxSr1−xTiO3 layers with high tunability above three at the Li-ion battery voltage level (3.7 V).

Substrate Effects in GaN-on-Silicon RF Device Technology

The influence of the semiconducting Si substrate on the performance of GaN-on-Si RF technology is reviewed. Firstly, the formation of a parasitic conduction channel at the substrate-epitaxy interface is discussed in terms of its physical mechanism and its influence on RF loss, followed by schemes to minimize this effect. Secondly, it is shown that the presence of the parallel channel serves to backbias the III-nitride epitaxial stack and lead to current collapse even on the highly-resistive Si substrates used for RF device fabrication, analogous to GaN-on-doped Si power devices. Strategies to mitigate this issue are also presented and critically compared. Thirdly, thermal generation of carriers in Si at elevated operating temperatures leading to increased substrate loss is quantified, also followed by a discussion of possible techniques to reduce its influence on RF loss.

Monolithically Integrated CMOS-Compatible III–V on Silicon Lasers

CMOS-compatible III–V lasers integrated on silicon are a crucial step to reduce power consumption and cost for next-generation optical transceivers. Here, we demonstrate a concept to co-integrate III-V lasers into a CMOS Silicon Photonics platform, in which lasers, photonics, and electronic circuitry share the same back end of line. Based on a bonded III–V epitaxial layer stack, ultra-thin laser devices, optically pumped lasing and coupling to silicon are demonstrated. Furthermore, we present all building blocks for electrically pumped laser devices.

100-Gb/s Electro-Absorptive Duobinary Modulation of an InP-on-Si DFB Laser

100-Gb/s single-channel optical data communication transceivers can provide a compact and cost-effective solution for the exponentially growing data-center traffic. One of the enabling technologies is electro-absorption-modulated single-mode lasers which are very compact, efficient, and fast. In this letter, such a transmitter integrated on a silicon photonics platform is demonstrated. While low loss and high contrast waveguides are provided by Si photonics, the gain and efficient electro-absorption are provided by the InP-based multi-quantum-well structure. A lumped electro-absorption modulator integrated with a distributed feedback laser is designed and fabricated in this platform. The epitaxial stack is identical for the laser and the modulator, which eases the fabrication process considerably. In this way, we successfully demonstrate 100-Gb/s single-channel electrical duobinary optical data transport over ~100 m of fiber with a bit error rate of 1.6e-3.

The Role of Silicon Substrate on the Leakage Current Through GaN-on-Si Epitaxial Layers

We present an investigation of vertical leakage in GaN-on-Si epitaxial stack through electrical characterization and device simulations. Different structures of increasing complexity have been fabricated and analyzed in order to achieve a complete understanding of the main transport mechanisms. We have clarified the role of the Si substrate through comparison of identical structures built on p-type and n-type Si substrates. We show that in the case of p-Si substrates the leakage current is sustained by carrier generation in the Si depletion region. We also find that experiments on structures grown on n-doped silicon are consistent with considering electron injection from the substrate through the AlN/Si barrier as the main current limiting mechanism. Our insights are supported by device simulations that consistently reproduce the experimental capacitance–voltage and current–voltage characteristics as a function of temperature for all the considered structures.

High Reflectivity Hybrid AlGaN/Silver Distributed Bragg Reflectors for Use in the UV-Visible Spectrum

Indium-free AlGaN-based distributed Bragg reflectors (DBRs) in the UV spectrum are known to have very low reflectivities due both to the low refractive index contrast as well as limitations imposed by the critical thickness of AlGaN alloys (tensile strain of ~2.41% for AlN on GaN). Near-bandedge excitonic resonances influence the real part of AlGaN's dielectric function, which sharply increases its refractive index as the photon energy approaches the bandgap. Furthermore, heavy doping (Si: 10 20 cm -3 ) can modify the plasma frequency of AlGaN, leading to a reduction in its refractive index. Hence, judiciously choosing the high index material to exploit excitonic resonances and using heavy doping to reduce the refractive index of the low index material can enhance the index contrast and enable growth of epitaxial DBRs with higher reflectivities. We have demonstrated this technique both experimentally and by simulations for wavelengths ranging from 240 to 370 nm. Typically, over 50 epitaxial pairs are needed to achieve a mirror whose reflectivity exceeds 99%, but this can be shrunk down to 20-30 epitaxial pairs by depositing silver/aluminum underneath the epitaxial DBR stack. Silver and aluminum exhibit 90% reflectivity at the AlGaN/metal interface between wavelengths ranging from >360 to 180-670 nm, respectively. A thinner DBR stack also reduces the thermal resistance, which would allow the VCSEL to achieve higher peak output powers, and simultaneously reduce overall tensile strain.

Control of Buffer-Induced Current Collapse in AlGaN/GaN HEMTs Using SiNx Deposition

The stoichiometry of low-pressure chemical vapor deposition SiN x surface passivation is shown to change vertical conductivity at the top of the epitaxial stack in GaN-on-Si power high-electron mobility transistors (HEMTs). This changes the charge stored in the carbon-doped GaN layer during high-voltage operation, and allows direct control of buffer-related current collapse in HEMTs. Substrate bias ramps are used to identify the changes in C:GaN charge trapping and vertical leakage. Channel length dependence indicates a lateral conductivity in the C:GaN with a localized increase in vertical conductivity under the ohmic contacts. An optimum SiN x recipe is identified which simultaneously delivers low current collapse and low drain leakage.

Electric Circuit Model Analogy for Equilibrium Lattice Relaxation in Semiconductor Heterostructures

The design and analysis of semiconductor strained-layer device structures require an understanding of the equilibrium profiles of strain and dislocations associated with mismatched epitaxy. Although it has been shown that the equilibrium configuration for a general semiconductor strained-layer structure may be found numerically by energy minimization using an appropriate partitioning of the structure into sublayers, such an approach is computationally intense and non-intuitive. We have therefore developed a simple electric circuit model approach for the equilibrium analysis of these structures. In it, each sublayer of an epitaxial stack may be represented by an analogous circuit configuration involving an independent current source, a resistor, an independent voltage source, and an ideal diode. A multilayered structure may be built up by the connection of the appropriate number of these building blocks, and the node voltages in the analogous electric circuit correspond to the equilibrium strains in the original epitaxial structure. This enables analysis using widely accessible circuit simulators, and an intuitive understanding of electric circuits can easily be extended to the relaxation of strained-layer structures. Furthermore, the electrical circuit model may be extended to continuously-graded epitaxial layers by considering the limit as the individual sublayer thicknesses are diminished to zero. In this paper, we describe the mathematical foundation of the electrical circuit model, demonstrate its application to several representative structures involving In x Ga1−x As strained layers on GaAs (001) substrates, and develop its extension to continuously-graded layers. This extension allows the development of analytical expressions for the strain, misfit dislocation density, critical layer thickness and widths of misfit dislocation free zones for a continuously-graded layer having an arbitrary compositional profile. It is similar to the transition from circuit theory, using lumped circuit elements, to electromagnetics, using distributed electrical quantities. We show this development using first principles, but, in a more general sense, Maxwell’s equations of electromagnetics could be applied.

Color mixing from monolithically integrated InGaN-based light-emitting diodes by local strain engineering

Additive color mixing across the visible spectrum was demonstrated from an InGaN based light-emitting diode (LED) pixel comprising red, green, and blue subpixels monolithically integrated and enabled by local strain engineering. The device was fabricated using a top-down approach on a metal-organic chemical vapor deposition-grown sample consisting of a typical LED epitaxial stack. The three color subpixels were defined in a single lithographic step. The device was characterized for its electrical properties and emission spectra under an uncooled condition, which is desirable in practical applications. The color mixing was controlled by pulse-width modulation, and the degree of color control was also characterized.

Multi-Wavelength Raman Characterization of Epitaxial Silicon Wafers for In-Line Process Characterization and Monitoring Applications

We have characterized 200-mm and 300-mm Si wafers with a single epitaxial layer and with a triple epitaxial layer stack atop using multi-wavelength, high-resolution Raman spectroscopy. 96-point wafer mapping measurements were performed on all wafers. Statistics of Raman signal intensity, shift and full-width-at-half-maximum (FWHM) values, under different excitation wavelengths, were extracted and compared with two types of reference Si wafers (prime Si wafers and reclaimed Si wafers). Significant variations in Raman signal intensity, shift and FWHM were measured between reference wafers and epitaxial wafers indicating potential Si lattice stress and crystallinity variations. Excitation wavelength dependence of Raman signal intensity, shift and FWHM also indicated variations in the Si lattice stress and the crystallinity of epitaxial layers in the depth direction. Non-contact multiwavelength Raman spectroscopy was found to be very sensitive to the quality of epitaxial Si layers which makes this technique very effective in complimentary in-line process characterization and monitoring.

Heterogeneously integrated III–V-on-silicon 2.3x μm distributed feedback lasers based on a type-II active region

We report on 2.3x μm wavelength InP-based type-II distributed feedback (DFB) lasers heterogeneously integrated on a silicon photonics integrated circuit. In the devices, a III–V epitaxial layer stack with a “W”-shaped InGaAs/GaAsSb multi-quantum-well active region is adhesively bonded to the first-order silicon DFB gratings. Single mode laser emission coupled to a single mode silicon waveguide with a side mode suppression ratio of 40 dB is obtained. In continuous-wave regime, the 2.32 μm laser operates close to room temperature (above 15 °C) and emits more than 1 mW output power with a threshold current density of 1.8 kA/cm2 at 5 °C. A tunable diode laser absorption measurement of CO is demonstrated using this source.

A Comprehensive Computational Modeling Approach for AlGaN/GaN HEMTs

This paper for the first time presents a comprehensive computational modeling approach for AlGaN/GaN high electron mobility transistors. Impact of the polarization charge at different material interfaces on the energy band profile as well as parasitic charge across the epitaxial stack is modeled and studied. Furthermore, impact of surface and bulk traps on two-dimensional electron gas, device characteristics, and gate leakage is accounted in this paper. For the first time, surface states modeled as donor type traps were correlated with gate leakage. Moreover, a new approach to accurately model the forward gate leakage in Schottky gate devices is proposed. Finally, impact of lattice and carrier heating is studied, while highlighting the relevance of carrier heating, lattice heating, and bulk traps over the device characteristics. In addition to this, modeling strategy for other critical aspects like parasitic charges, quantum effects, S/D Schottky contacts, and high field effects is presented.

Electric circuit model for strained-layer epitaxy

For the design and analysis of a strained-layer semiconductor device structure, the equilibrium strain profile may be determined numerically by energy minimization but this method is computationally intense and non-intuitive. Here we present an electric circuit model approach for the equilibrium analysis of an epitaxial stack, in which each sublayer may be represented by an analogous configuration involving a current source, a resistor, a voltage source, and an ideal diode. The resulting node voltages in the analogous electric circuit correspond to the equilibrium strains in the original epitaxial structure. This new approach enables analysis using widely accessible circuit simulators, and an intuitive understanding of electric circuits may be translated to the relaxation of strained-layer structures. In this paper, we describe the mathematical foundation of the electrical circuit model and demonstrate its application to epitaxial layers of Si1−xGex grown on a Si (001) substrate.

InGaAs-OI Substrate Fabrication on a 300 mm Wafer

In this work, we demonstrate for the first time a 300-mm indium–gallium–arsenic (InGaAs) wafer on insulator (InGaAs-OI) substrates by splitting in an InP sacrificial layer. A 30-nm-thick InGaAs layer was successfully transferred using low temperature direct wafer bonding (DWB) and Smart CutTM technology. Three key process steps of the integration were therefore specifically developed and optimized. The first one was the epitaxial growing process, designed to reduce the surface roughness of the InGaAs film. Second, direct wafer bonding conditions were investigated and optimized to achieve non-defective bonding up to 600 °C. Finally, we adapted the splitting condition to detach the InGaAs layer according to epitaxial stack specifications. The paper presents the overall process flow that achieved InGaAs-OI, the required optimization, and the associated characterizations, namely atomic force microscopy (AFM), scanning acoustic microscopy (SAM), and HR-XRD, to insure the crystalline quality of the post transferred layer.

Dark current investigation in thin P-i-N InGaAs photodiodes for nano-resonators

We investigated the dark current components of thin planar InGaAs photodiodes grown by metalorganic vapor-phase epitaxy for optical nano-resonators. Owing to their high electric field enhancement, nano-resonators make it possible to substantially reduce the thickness of the active region to about 100 nm all the while maintaining high quantum efficiency. In the present study, to cover a broad spectral band, we combined several resonance peaks induced by guided-mode resonances in a given spectral range. This type of geometry allowed us to introduce InAlAs at the edge of a thin InGaAs active region in order to drastically reduce both the diffusion current and the generation/recombination current. We found that, in such devices, tunneling dark current components increase as the thickness of the active layer is reduced and dominate the reverse dark current. By optimizing the epitaxial stack, while keeping its total thickness constant (the optical properties of the nano-resonator remained unchanged), we showed that we are already able to achieve a specific detectivity of up to 1×1013 cmHz W−1 for λ=1.55 μm.

Threading dislocations in GaAs epitaxial layers on various thickness Ge buffers on 300 mm Si substrates

We have grown GaAs epitaxial layers on Ge buffers, themselves on Si (001) substrates, using an Applied Materials 300mm metal organic chemical vapor deposition tool. We varied the Ge buffer thickness between 0.36 and 1.38µm and studied the properties of a 0.27µm thick GaAs layer on top. We found that increasing the Ge buffer thickness yielded smoother GaAs films with an rms surface roughness as low as 0.5nm obtained on a 5×5µm2 area. The bow of the substrate increased following a linear law with the epitaxial stack thickness up to 240µm for a 1.65µm stack. We have also characterized the threading dislocations present in the GaAs layers using X-ray diffraction and cathodoluminescence. Increasing the Ge buffer thickness resulted in lower threading dislocation densities, enabling us to obtain anti-phase boundary – free GaAs films with a threading dislocation density as low as 3×107cm−2. In addition, atomic force microscopy surface topology measurements showed the presence of pits in the GaAs layers whose density agreed well with other threading dislocation density assessments. It thus seems that threading dislocations can in certain cases induce some growth rate variations, making them visible in as-grown GaAs films. Using thicker Ge buffers results in smoother films with less threading dislocations, with the side effect of increasing the bow on the wafer. If bow is not an issue, this is a practical approach to improve the GaAs (on Ge buffer) on silicon quality.

III-V-on-silicon 2-µm-wavelength-range wavelength demultiplexers with heterogeneously integrated InP-based type-II photodetectors.

2-µm-wavelength-range silicon-on-insulator (SOI) arrayed waveguide gratings (AWGs) with heterogeneously integrated InP-based type-II quantum well photodetectors are presented. Low insertion loss (2.5-3 dB) and low crosstalk (-30 to -25 dB) AWGs are realized. The InP-based type-II photodetectors are integrated with the AWGs using two different coupling approaches. Adiabatic-taper-based photodetectors show a responsivity of 1.6 A/W at 2.35 µm wavelength and dark current of 10 nA at -0.5 V, while photodetectors using grating-assisted coupling have a responsivity of 0.1 A/W and dark current of 5 nA at -0.5 V. The integration of the photodetector array does not degrade the insertion loss and crosstalk of the device. The photodetector epitaxial stack can also be used to realize the integration of a broadband light source, thereby enabling fully integrated spectroscopic systems.

A Low-Leakage Epitaxial High-κ Gate Oxide for Germanium Metal-Oxide-Semiconductor Devices.

Germanium (Ge)-based metal-oxide-semiconductor field-effect transistors are a promising candidate for high performance, low power electronics at the 7 nm technology node and beyond. However, the availability of high quality gate oxide/Ge interfaces that provide low leakage current density and equivalent oxide thickness (EOT), robust scalability, and acceptable interface state density (D(it)) has emerged as one of the most challenging hurdles in the development of such devices. Here we demonstrate and present detailed electrical characterization of a high-κ epitaxial oxide gate stack based on crystalline SrHfO3 grown on Ge (001) by atomic layer deposition. Metal-oxide-Ge capacitor structures show extremely low gate leakage, small and scalable EOT, and good and reducible D(it). Detailed growth strategies and postgrowth annealing schemes are demonstrated to reduce Dit. The physical mechanisms behind these phenomena are studied and suggest approaches for further reduction of D(it).

Sol–gel deposition of Pb(Zr,Ti)O3 on GaAs/InGaAs quantum well heterostructure via SrTiO3 templates: Stability of the semiconductor during oxide growth

Pb(Zr,Ti)O3 (PZT) layers were grown by sol–gel deposition on a InGaAs/GaAs quantum well heterostructure. Prior to PZT deposition, a thin SrTiO3 template is fabricated by molecular beam epitaxy. X-ray diffraction and transmission electron microscopy are used to analyse the structural quality of the epitaxial stack. Photoluminescence experiments allow for assessing the effect of PZT growth on the quantum well emission. Despite significant oxygen diffusion through the III–V heterostructure, conditions are found to maintain room temperature photoluminescence of the quantum wells.