Abstract
In this work, we demonstrate for the first time a 300-mm indium–gallium–arsenic (InGaAs) wafer on insulator (InGaAs-OI) substrates by splitting in an InP sacrificial layer. A 30-nm-thick InGaAs layer was successfully transferred using low temperature direct wafer bonding (DWB) and Smart CutTM technology. Three key process steps of the integration were therefore specifically developed and optimized. The first one was the epitaxial growing process, designed to reduce the surface roughness of the InGaAs film. Second, direct wafer bonding conditions were investigated and optimized to achieve non-defective bonding up to 600 °C. Finally, we adapted the splitting condition to detach the InGaAs layer according to epitaxial stack specifications. The paper presents the overall process flow that achieved InGaAs-OI, the required optimization, and the associated characterizations, namely atomic force microscopy (AFM), scanning acoustic microscopy (SAM), and HR-XRD, to insure the crystalline quality of the post transferred layer.
Highlights
In0.53Ga0.47As is one of the most promising III-V materials for a sub-10-nm technological node n-channel, with a theoretical mobility of 9500 cm2·V−1·s−1 for an n-type Metal Oxide Semiconductor Field Effect Transistor (n-MOSFET) [1], around four times better than strained Si (2500 cm2·V−1·s−1) [2]
InGaAs epitaxial layers grown on a 300 mm Si substrate using a metamorphic layer has been reported in the literature [3]
A thin InGaAs layer is transferred after the direct wafer bonding onto an oxidized handle wafer
Summary
In0.53Ga0.47As is one of the most promising III-V materials for a sub-10-nm technological node n-channel, with a theoretical mobility of 9500 cm2·V−1·s−1 for an n-type Metal Oxide Semiconductor Field Effect Transistor (n-MOSFET) [1], around four times better than strained Si (2500 cm2·V−1·s−1) [2]. InGaAs epitaxial layers grown on a 300 mm Si substrate using a metamorphic layer has been reported in the literature [3]. The III-V layer buffer is used to grow the thin indium–gallium–arsenic (InGaAs) layer and to localize the H+ implantation for the layer transfer. A thin InGaAs layer is transferred after the direct wafer bonding onto an oxidized handle wafer.
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