Reliability Of Electronic Packages Research Articles

Response Spectrum Analysis of Printed Circuit Boards Subjected to Shock Loads

A spacecraft consists of a number of electronic packages to meet the functional requirements. An electronic package is generally an assembly of printed circuit boards placed in a mechanical housing. A number of electronic components are mounted on the printed circuit board (PCB). A spacecraft experiences various types of loads during its launch such as vibration, acoustic and shock loads. Prediction of response for printed circuit boards due to shock loads is important for mechanical design and reliability of electronic packages. The modeling and analysis of printed circuit boards is required for accurate prediction of response due to shock loads. The validated finite element model of the PCB can be adopted to perform response spectrum analysis. Shock response spectrum analysis of printed circuit boards subjected to a half-sine pulse excitation is carried out using finite element method. The objective of this paper is to predict the shock response spectrum of a printed circuit board due to launch environment. The analysis results are validated by conducting experimental tests of PCB.

An analytical study on steam-driven delamination and stability of delamination growth in electronic packages

In this study, elliptic interfacial defects between the molding compound and the substrate in electronic packages are analytically modeled to investigate delamination growth direction and delamination growth stability. Approximate solutions of strain energy release rate for three delamination patterns are derived based on Reissner–Mindlin plate theory and the solution of an elliptic crack embedded in an infinite solid. These solutions reveal that an elliptic defect is expected to grow into a circular crack along the minor-axis. The results of this study can be used for predicting critical defect sizes or temperatures and evaluating reliability of electronic packages.

Analysis of vapor pressure and void volume fraction evolution in porous polymers: A micromechanics approach

A novel micromechanics model is proposed, aimed at evaluating vapor pressure and void volume fraction of moisture absorbed polymeric materials during solder reflow process in electronic packaging. This model takes into account contributions of both thermal expansion and vapor pressure to the deformation of moisture absorbed polymers so that it is capable of predicting vapor pressure and void volume fraction simultaneously provided the initial conditions of vapor pressure and void volume fraction are prescribed. The novelty of the present model lies in that it can tackle problems where the void volume fraction is variable and unknown. An incremental algorithm based on this model is formulated to facilitate the numerical calculation. The effective properties (Young’s modulus, Poisson’s ratio and apparent thermal expansion coefficient) and vapor pressure obtained by this model can be used as initial loading condition and material properties for analyzing vapor pressure induced interfacial delamination and evaluating reliability of electronic packages.

A review on reliability of electronic packaging in micro/nano manufacturing

Electronic packaging is a critical part of products such as computers, smart phones, automotive components and other electronic devices. Along with the development of society and economy, the demand for electronic devices and its quality has increased rapidly in recent years. Thus, it is necessary to research the reliability of electronic packaging. This paper presents a review of recent investigations on the reliability of electronic packaging components. The dynamic characteristics and fatigue test under different loading conditions are discussed, including vibration loading, thermal loading and combined loading. Finite element method (FEM) is used frequently in the studies as well as experimental test. Finally, it is significant to emphasise the importance of electronic packaging.

Adhesion Reliability of the Epoxy-Cu Interface by Molecular Simulations

Interfacial delamination is one of the most common failure modes in electronic packages. To obtain good reliability of electronic packages, it is important to study the interface properties. In this study, the adhesion reliabilities of the epoxy-Cu interface, which is widely used in electronic packagings, are investigated using molecular dynamics simulation with the effects of temperature, moisture, crosslink conversion, and oxidation degree considered. The results show that adhesion reliability of Cu-epoxy interfaces is almost independent of temperature, strain rate, and crosslink conversion of epoxy resins, while is weakened by increasing moisture contents. The variation of interfacial interaction energy with the increasing tensile deformation is revealed at molecular scale, which is useful to understand the interfacial interaction and interfacial delamination.

Comparison of Warpage Measurement Capabilities and Results Obtained by Using Laser and Digital Fringe Projection Methods

Electronic packaged devices are becoming increasingly smaller in size and higher in density while requiring higher performance and superior reliability. Warpage is one of the crucial factors for the thermomechanical reliability of electronic packages and warpage control becomes a more crucial process during the printed wiring board (PWB) fabrication and package assembly processes. This requirement necessitates more accurate methods of measuring warpage. The fringe projection methods are recent trends for measuring the warpage of chip packages, PWBs, and PWB assemblies (PWBAs) because of their noncontact, full-field, and high-resolution measurement capabilities. This paper presents a comparison of two fringe projection methods: laser fringe projection (LFP) (projection moiré) and digital fringe projection (DFP). Experimental results show that digital fringe projection has higher practical resolution, and better accuracy and precision than laser fringe projection.

Estimating interfacial interaction energy of Cu-epoxy resin from molecular dynamics simulation

Interfacial delamination is one of the typical failure modes in electronic packages. To obtain good reliability of electronic packages, it is important to study the interface properties. In this study, molecular dynamics simulation is conducted to investigate the interfacial interaction energy of Cu-epoxy resin, which is widely used in electronic packages, and the effects of temperature, moisture, crosslink conversion and oxidation degree. The results show that the interaction energy of Cu-epoxy resin is almost independent of the cross-link conversion of the epoxy resin, whereas it is weakened by increasing temperature, moisture and oxidation. Meanwhile, the mechanism of interfacial energy variation is revealed on a molecular scale, which is useful for understanding the interfacial interaction and interfacial delamination.

Effects of voids on thermal-mechanical reliability of lead-free solder joints

Reliability of electronic packages has become a major issue, particularly in systems used in electrical or hybrid cars where severe operating conditions must be met. Many studies have shown that solder interconnects are critical elements since many failure mechanisms originate from their typical response under thermal cycles. In this study, effects of voids in solder interconnects on the electronic assembly lifetime are estimated based on finite element simulations.

Techniques for Measuring Warpage of Chip Packages, PWBs, and PWB Assemblies

One of the crucial factors for the thermo-mechanical reliability of electronic packages is warpage that occurs during the printed wiring board (PWB) fabrication, solder masking and solder reflow processes. As the quality and reliability requirements of electronic components (packages) become higher, warpage control becomes a more crucial process during the PWB fabrication (manufacturing) and package assembly processes. The warpage of PWBs, PWB assemblies and electronic packages are measured by various techniques. Each technique has both its advantages and disadvantages; therefore the choice of a particular technique depends on whether one wants to measure the warpage of a PWB, PWB assembly or chip package. This paper reviews the pros and cons, such as resolution, speed, costs, accuracy, in-line capability, flexibility, and robustness, of different techniques used for measuring the warpage of chip packages, PWBs and PWB assemblies.

J012023 熱履歴による樹脂の粘弾性物性変化を考慮した積層パッケージの反り予測解析([J012-02]電子情報機器、電子デバイスの強度・信頼性評価と熱制御(2))

Mechanical reliability of electronic packages is one of the most important problems for the reliability of electronic products. Reduction of the warpage of an electronic package is useful to increase its mechanical reliability. The warpage of an electronic package often shows a hysteresis curve during a thermal cycle. However, it was difficult to simulate the hysteresis. In this study, we performed the viscoelastic analysis of a bonded sample of Si chip and underfill resin. This sample shows the hysteresis of the warpage during a heating and cooling heat cycle. We measured the master curves of the relaxation modulus using Dynamic Mechanical Analyzer (DMA) before and after heating. Then, we analyzed the warpage of the specimen with considering the change of the master curve of relaxation modulus of the underfill resin. The hysteresis of the warpage of the bonded specimen was well expected using the proposed method.

An analytical procedure for estimating field lifetime and failure rate of electronic packages

To understand the reliability characteristics of electronic packages under field conditions, accelerated life tests (ALT) with higher stress levels are needed in practice. Instead of the time-consuming and costly ALT, an analytical procedure based on finite element simulation and a Weibull statistical method to estimate the lifetime and failure rate of electronic packages subjected to thermal cycling loadings is proposed in the present study. To consider uncertainties, geometric parameters and material properties are assumed as random variables and incorporated into numerical simulation. The result shows that the mean time to failure (MTTF) of a studied electronic package under a specific thermal cycling loading condition can be predicted accurately. From either the proposed analysis or based on a particular model found in literature, the acceleration factor (AF) can be predicted accurately as well. Furthermore, according to the outcome from the Weibull statistical method, the failure rate under either the field or a particular test condition can be determined. Accordingly, the MTTF and failure rate of the package under field conditions can be estimated from the result of a simulated accelerated test as well as the AF model. The present study indicates that the proposed analytical procedure can help engineers evaluate the reliability of electronic packages rapidly and effectively.

Non-linear analyses of strain in flip chip packages improved by the measurement using the digital image correlation method

Numerical methods like the finite element (FE) method are often used to evaluate the reliability of electronic packages. However, the accuracy of non-linear numerical analyses should be confirmed by experimental measurements. In this study, we evaluated the strain distribution in flip chip (FC) packages with multi-layered printed circuit boards (PCBs) by combining the digital image correlation method (DICM) and the non-linear FE method, considering the viscoelasticity of resins and the elastoplasticity and creep of solder alloy. Four types of FC package consisting of two types of buildup (BU) resin and two types of underfill (UF) resin were evaluated. The distributions of strain on the cutting sections of FC packages were measured using the DICM with microphotographs obtained by a confocal laser scanning microscope (CLSM). The strain measurements showed that the UF resin with the low coefficient of thermal expansion (CTE) reduced thermal strain around a solder bump, and the BU resin with the low CTE reduced the strain concentration along the interface between a Si chip and a solder bump. We performed the non-linear FE analyses while taking into account the viscoelastic Poisson’s ratio of the UF resin and the constant instantaneous Poisson’s ratio. The result of the FE analyses with the constant instantaneous Poisson’s ratio did not correspond with the strain measurements using the DICM. The normal strain in a solder bump was less than that obtained by the measurement, and the direction of a shear strain band in a solder bump was different from that measured using the DICM. On the other hand, the FE analyses considering the viscoelastic Poisson’s ratio showed good agreement with the strain measurements using the DICM. The strain measurement using the DICM improved the accuracy of the non-linear FE analysis of microelectronic packages effectively.

Undercooling Behavior and Intermetallic Compound Coalescence in Microscale Sn-3.0Ag-0.5Cu Solder Balls and Sn-3.0Ag-0.5Cu/Cu Joints

The microstructure of microscale solder interconnects and soldering defects have long been known to have a significant influence on the reliability of electronic packaging, and both are directly related to the solidification behavior of the undercooled solder. In this study, the undercooling behavior and solidification microstructural evolution of Sn-3.0Ag-0.5Cu solder balls with different diameters (0.76 mm, 0.50 mm, and 0.30 mm) and the joints formed by soldering these balls on Cu open pads of two diameters (0.48 mm and 0.32 mm) on a printed circuit board (PCB) substrate were characterized by differential scanning calorimetry (DSC) incorporated into the reflow process. Results show that the decrease in diameter of the solder balls leads to an obvious increase in the undercooling of the balls, while the undercooling of the solder joints shows a dependence on both the diameter of the solder balls and the diameter ratio of solder ball to Cu pad (i.e., Ds/Dp), and the diameter of the solder balls has a stronger influence on the undercooling of the joints than the dimension of the Cu pad. Coarse primary intermetallic compound (IMC) solidification phases were formed in the smaller solder balls and joints. The bulk Ag3Sn IMC is the primary solidification phase in the as-reflowed solder balls. Due to the interfacial reaction and dissolution of Cu atoms into the solder matrix, the primary Ag3Sn phase can be suppressed and the bulk Cu6Sn5 IMC is the only primary solidification phase in the as-reflowed solder joints.

Linkages Between Microstructure and Mechanical Properties of Ultrafine Interconnects

Microstructures within ultrafine electronic interconnections, which change rapidly during the formation of such joints and evolve continuously thereafter under service conditions, are an important factor to be considered in order to accurately evaluate the reliability of electronic packages that contain such interconnects. By combining phase-field and finite-element mechanical modeling techniques, this work explicitly considers both the size and geometry of the joints to understand their effects on microstructural evolution and subsequent mechanical properties. The simulation results indicate that the degree of inhomogeneity of the stress distribution increases as the size of the joints is reduced when microstructure is considered. The calculated maximum stresses present in hourglass-shaped joints when considering microstructure are approximately 10 MPa larger than those present in the corresponding joints when neglecting microstructure. The geometries of such interconnects also have a significant effect on their mechanical properties. Hourglass-shaped joints exhibit the lowest maximum von Mises stresses in comparison with the other shapes considered. In addition, the included microstructural features can introduce local stress concentrations within the microjoints, which may deteriorate the reliability and performance of the electronic packages. It is therefore recommended that the microstructure as well as the size and geometry of joints be considered among the design and fabrication parameters to enable reliable ultrafine interconnects.

Evaluation by three-point-bend and ball-on-ring tests of thinning process on silicon die strength

With the onset of ultra-compact packages, systems in package may include stacked dies and mechanical sensors. Thus the thinning of silicon becomes necessary. The risk of failure, especially die crack, is often a major concern in the reliability of electronic packages. Therefore chip strength assessment becomes necessary for reliability prediction. In this paper, three-point-bend test and ball-on-ring test are compared to evaluate the risk of fracture of a silicon die as a function of its thickness, and of surface quality induced by the thinning process. Five thinning processes and six thicknesses (from 300μm down to 80μm) are statistically evaluated.

Application of Piezoresistive Stress Sensor in Wafer Bumping and Drop Impact Test of Embedded Ultrathin Device

Though an understanding on the development of residual stresses in silicon device after chip level packaging processes has been investigated in previous studies, little is known about the development of stresses after wafer bumping process. In this paper, piezoresistive stress sensors were used to evaluate the stresses in device wafer after wafer bumping process, such as under bump metallization fabrication, dry-film process, and solder bumping. For the stress evaluation, n-type piezoresistive stress sensors were fabricated on p-type (100) silicon wafer and then sensors were calibrated to determine piezoresistive coefficients. The calibrated sensor wafers were finally used to measure residual in-plane stresses at the surface of device wafer. Due to the growing demand of portable and handheld devices, the reliability of electronic packages with Pb-free solder under drop impact condition has become an issue of concern. This paper aims to measure the real-time stress in an ultrathin die during a drop test to ascertain whether die cracking is a possible problem when dealing with 50-μm-thick dies. The advantages of these stress data are that they: 1) serve as a basis for process selection to meet the trends and needs of a reliable package, and for the development and improvement of existing processes; and 2) are important to enhance survivability during wafer bumping, handling and packaging.

Measurement and Analysis for Residual Warpage of Chip-on-Flex (COF) and Chip-in-Flex (CIF) Packages

A flip-chip package using adhesive interconnection consists of materials which have different coefficients of thermal expansion (CTE). The package experiences temperature higher than room temperature during the assembly process and is also exposed to the thermal cycling load during its lifetime. As a result, flip-chip packages have residual warpage after completion of the assembly process. Excessive warpage causes various reliability problems. Therefore, residual warpage is an essential factor for evaluating the reliability of electronic packages. In this paper, we evaluated the warpage of chip-on-flex (COF) packages using the moiré methods. A chip-in-flex (CIF) package developed to increase the binding force between the chip and the substrate was also evaluated with the same methods. Finite element analysis (FEA) was also performed for comparison with the experimental results. Based on the FEA result, effective design parameters for the CIF package were found to reduce the residual warpage.

전자패키지 신뢰성 평가기술의 개요

Reliability technology has been expected to grow rapidly for new types of electronic equipments. We have selected several reliability issues in electronic package to be reviewed. This paper will provide a view of the current state of technological progress in reliability of electronic package in Japan, and will discuss future prospects for the technology.

機械学会における電子実装の信頼性と熱制御に関する研究分科会活動について

機械学会における電子実装の信頼性と熱制御に関する研究分科会活動について

A Creep Model for Solder Alloys

Demand for long-term reliability of electronic packaging has lead to a large number of studies on viscoplastic behavior of solder alloys. Various creep models for solder alloys have been proposed. They range from purely empirical to mechanism based models where dislocation motion and diffusion processes are taken into account. In this study, most commonly used creep models are compared with the test data and implemented in ABAQUS to compare their performance in cycling loading. Finally, a new creep model is proposed that combines best features of many models. It is also shown that, while two creep models may describe the same material stress–strain rate curves equally well, they may yield very different results when utilized for cycling loading. One interesting observation of this study is that the stress exponent, n., also depends on the grain size.