Dual Material Double Gate Research Articles

Impact of underlap layer on DC and RF/analog performance of asymmetric junctionless dual material double gate MOSFET for low-power analog amplifier design

Impact of underlap layer is analytically investigated on asymmetric junctionless dual material double gate MOSFET (AJDMDG) to reduce subthreshold slope and threshold voltage, which are two essential requirements with shrinking device dimensions to avoid short channel effects. The model utilizes two-dimensional Poisson’s equation with parabolic approximation for determining electrical parameters where dimensional ranges are kept within fabrication limit. Excellent accuracy is found for the obtained analytical outcome, when compared with results obtained from TCAD ATLAS simulator. Comparative study is extended for conventional junctionless DMDG (JDMDG) and underlap asymmetric junctionless single material DGFET (UAJDG) device, having identical dimensional parameters and biasing ranges; where the present structure exhibits superior performance in terms of threshold voltage, subthreshold slope and DIBL of 34.57%, 62.85% and 69.85% respectively compared to JDMDG and 12.50%, 26.08% and 40.25% respectively w.r.t UAJDG structure. Supremacy of the proposed architecture is further established with RF/analog Figures of Merit (FOMs), which are essential for designing low power analog amplifier.

Impact of deep cryogenic temperatures on gate stack dual material DG MOSFET performance: Analog and RF analysis

By understanding the potential benefits of Gate Stack Dual Material double gate MOSFET (DG MOSFET), this research aims to contribute to the investigation of its electrical characteristics with improved performance and dependability. A detailed investigation is conducted into the temperature dependent electrical properties at different temperatures. A detailed analysis is conducted on the enhanced gate controllability in lower technology nodes and the protection against short channel effects. Together with the DC performances, this research also analyzes the suggested device's analog performance. The device's performance matrix was presented for temperatures ranging from 70 K to 800 K. The results showsthe improvement the drain current, transconductance, and transconductance generation factor(TGF) with decrease in temperature.

2D analytical modelling of asymmetric junctionless dual material double gate MOSFET for biosensing applications considering steric hindrance issue

The current manuscript for Asymmetric Junctionless Dual Material Double Gate MOSFET (AJDMDG MOSFET) biosensor reports improved sensitivity for both threshold voltage and ON-current. In the presence of high-K dielectric material, the device was built using both neutral and charged biomolecules. After calculating the minimal surface potential, the threshold voltage is calculated by solving the 2D Poisson’s equation using a parabolic-potential configuration under realistic boundary circumstances. Analytical results show good agreement with TCAD simulation, prompting an exploration of threshold voltage sensitivity with front-gate voltage changes of all possible dimensions. Corresponding drain current sensitivity with a higher ON-to-OFF current ratio is theoretically estimated and compared with identical DGFET architecture, resulting in a significant improvement for all possible step patterns when steric hinderance is considered for moderately filled cavities; this aids in detecting both labelled and label-free electrical species at lower concentration levels.

Ge‐ and Ge1−zSnz‐Based Gate‐Underlap Dual Material Double Gate Tunnel Field Effect Transistor: Modeling, Optimization, and its Application to Biosensors

Herein, an n‐channel dual material double gate tunnel field effect transistor (DMDG‐TFET) with a gate–drain underlap using Ge and Ge1−zSnz is proposed. An analytical model has been developed to optimize the length of the underlap region for Ge and Ge–Sn alloy as the channel material. The ambipolarity shown by TFET has been utilized to perform a label‐free biosensing in response to the change of permittivity of the biomaterials used in the gate–drain underlap region. The use of Ge–Sn alloy as a channel material results in a lower ambipolar current but higher sensitivity to the presence of biomolecules. DMDG with workfunction (4 and 4.4 eV) is used to optimize the device performance. The analytical results have been validated by the results obtained using commercial software (Silvaco TCAD). A high sensitivity of the biosensor device is obtained by utilizing the tunnel FET ambipolar current with optimized gate underlap of LUD = 55 nm (for Ge) and LUD = 38 nm (for Ge–Sn alloy).

Dependence of RF/analog and linearity parameters on ferroelectric layer thickness in ferroelectric tunnel junction dual material double gate (FTJ-DMDG) TFET

In this article, we have proposed a ferroelectric tunnel junction (FTJ) dual material double gate (DMDG) TFET using TCAD simulator, where a ferroelectric (FE) layer is incorporated at tunnel junction to increase the band to band tunnelling rate. TCAD simulation result reflects that the inclusion of FE layer leads to improved ON current with enhanced BTBT rate as the thickness of FE layer (t FE) is reduced from 4 to 2 nm. The RF/analog parameter like transconductance (g m), gain (g m/g d), cut off frequency (f t), transconductance generation factor (TGP), gain frequency product (GFP), and transconductance frequency product (TFP) are improved by noticeable amount with down scaling in t FE value. The linearity analysis like g m2, g m3, voltage intercept points (VIP2 and VIP3), power intercept point (IIP3), and 1-dB compression point are also highlighted in FTJ-DMDG-TFET by varying t FE. A noticeable improvement in linearity behaviour is perceived with increased value in t FE.

Qualitative Analysis of DG-TFET Structures with Gate Material Engineering

The paper largely focuses on enhancing device parameters of a Double Gate Tunnel Field Effect Transistor structure such as ON current, OFF Current,transconductance and ratio of ON current to OFF current (ION / IOFF) using hetero dielectric gate material. The paper presents three state of art of dual gate TFET i.e., Conventional Double Gate TFET (CDGTFET), horizontally placed Dual Material Double Gate TFET (HDMDGTFET), vertically placed Dual Material Double Gate TFET (VDMDGTFET). The dual material dielectric combinations used in the structures are (SiO2-TiO2), (HfO2-TiO2) and (SiO2-SiC). The Structures are being modeled using Silvaco Atlas tool. Simulations of these structures are carried out and various electrical parameters have been obtained. The results obtained from simulation of these structures are being presented and discussed in this paper. Comparison of the three structures is carried out and resulted in the reduction of ON Current and OFF Current is observed.

Impact of biomolecules position and filling area on the sensitivity of hetero stack gate MOSFET

A two-dimensional dual material double hetero stack gate (DMDG-HSG-MOSFET) based biosensor is proposed for the identification of label-free biomolecules like uricase (K = 1.54), streptavidin (K = 2.10), ferrocytochrome C(K = 4.7), and protein (K = 8). The influence of the biomolecule's position and filling area (100%, 66.66%, and 33.33%) has been inspected to detect the device sensitivity. The electrical parameters like device current, threshold voltage, current sensitivity, voltage sensitivity, and subthreshold performance of the device are examined by considering the neutral biomolecules. Further, the device performance optimization has been done by varying the oxide thickness (tox) using the dielectric modulation method. The performance parameters are analyzed for the biomolecules filling areas 100%, 66.66% and 33.33% and the analysis provides better results with protein biomolecule. For protein biomolecule with a 100% filling area the threshold voltage, current, and subthreshold swing sensitivities are obtained as 0.69, 1.96, and 1.09 respectively.

An Accurate Drain Current Model of Dual Material Double Gate Metal Oxide Semiconductor Field Effect Transistor

An Accurate Drain Current Model of Dual Material Double Gate Metal Oxide Semiconductor Field Effect Transistor

Modeling of Threshold Voltage and Subthreshold Current of Junctionless Channel-Modulated Dual-Material Double-Gate (JL-CM-DMDG) MOSFETs

Modeling of Threshold Voltage and Subthreshold Current of Junctionless Channel-Modulated Dual-Material Double-Gate (JL-CM-DMDG) MOSFETs

An Approach for Drain Current Modeling Including Quantum Mechanical Effects for a DMDG Junctionless Field Effect Nanowire Transistor

This paper presents the effects of quantum confinements on the surface potential, threshold voltage, drain current, transconductance, and drain conductance of a Dual Material Double Gate Junctionless Field Effect Nanowire Transistor (DMDG-JLFENT). The carrier energy quantization on the threshold voltage of a DMDG-JLFENT is modeled, and subsequently, other parameters like drain current were analytically presented. The QME considered here is obtained under the quantum confinement condition for an ultra-thin channel, i.e., below 10 nm of Si thickness. The threshold voltage shift due to QME can be used as a quantum correction term for compact modeling of junctionless transistors. The analytical model proposed for surface potential, threshold voltage, drain current, transconductance, and drain conductance were verified by TCAD 3-D quantum simulation results which makes it suitable for SPICE compact modeling.

Impact of bio-target location and their fill-in factor on the sensitivity of hetero channel double gate MOSFET label-free biosensor

In this work, the performance of dielectric modulated InP/InGaAs/InP based on the hetero channel dual material double gate MOSFET (DM-H-DMDG MOSFET) for the label-free electrical identification of bio-targets has been inspected with the help of a 2D TCAD device simulator. The impact of bio-target’s location and their fill factor position has been analysed to observe the device sensitivity. Under the dry situation, the effect of charged and non-charged biomolecules on the electrical features such as threshold voltage, electric field, drain current, subthreshold performance, and sensitivity of DM-H-DMDG MOSFET has been evaluated. Simulation results show that the threshold voltage sensitivity of the proposed device is 0.62 and 0.59 when the fill factor is 100% and 50% respectively. The peak value of an electric field is 4.2 × 106 V cm−1 and 4.5 × 106 V cm−1 respectively near the source end and 0.5 × 105 V cm−1 and 5.5 × 105 V cm−1 near the drain end, when positively/negatively charged biomolecules are immobilised in the cavity. Again, the threshold voltage of the device is obtained as 0.265 V/0.245 V when the fill factor is 100% and 50% respectively.

Design and Analysis of Junctionless Based Symmetric Nanogap-Embedded TFET Biosensor

In the present paper, symmetrical configuration of dual material double gate dielectric modulated junctionless TFET (DM DG JLTFET) for biosensor applications is explored. The JLTFET consists of Si material with an intensely doped n-type substrate. In this work, the JLTFET utilizes the dielectric modulation method which aids the bio-transistor to recognize neutral and charged analytes (biomolecules). A double metal gate structure is designed by employing two dissimilar metal gate electrodes to reduce short channel impact on device characteristics. The proposed device includes a nanogap region (cavity) which is framed for biomolecules to immobilize. Surface potential and their sensitivity are examined for neutral and charged-neutral analytes. The effects of structure parameters such as nanogap region length and fill-in factor have been analyzed through simulation. The paper examines the behavior of DM DG JLTFET for biological molecules sensing via change in relative permittivity and charge density. The proposed device shows noticeable sensitivity results for charged biomolecules (especially for positively charged analytes). The present work has analyzed the different parameters affecting the sensitivity of the biosensor which includes structural geometric variations like change in cavity length, cavity thickness and fill-in factor. The sensitivity of the neutral biomolecules having higher dielectric constant is observed higher; the surface potential sensitivity of the Gelatin (k = 12) is estimated as 3.75 × 10 3 which is 45%, 55%, and 135% higher than the sensitivity of Keratin (k = 7), Bacteriophage T7 (k = 6), and Glucose Oxidase (k = 3), respectively at the cavity length of 7 nm.

Performance evaluation of junctionless double surrounding gate In0.53Ga0.47As nanotube MOSFET using dual material gate engineering

In this paper, the authors present the studies made on drain current (ID) for 5 nm gate length Dual Material (DM) Double Surrounding Gate (DSG) inversion mode (IM) and junctionless (JL) In0.53Ga0.47As nanotube (NT) MOSFET and Silvaco ATLAS 3D TCAD based simulation results are reported. In these studies, the authors have made use of the Non-Equilibrium Green’s Function (NEGF) approach and the self-consistent solution of Poisson’s equation with Schrodinger’s equation. In the case of inversion mode nanotube MOSFET, the channel region is lightly doped. The effect of Dual Material Gate Engineering for In0.53Ga0.47As Nano Tube channel radius 1.5 nm with gate oxide (Al2O3) thickness (0.8 nm) on ID, has also been studied. Further, a comparison of results has been done between IM DM DSG and JL DM DSG NT MOSFET. In the case of JL MOSFET, doping concentrations are optimized for two approaches (i) to get the same ION current as IM device and (ii) to get the same threshold voltage (VTH) as IM device. This results in 10 and 102 times smaller IOFF in matching ION and VTH optimized devices respectively as compared to IM device. It was found that DM Gate Engineering reduces drain induced barrier lowering (DIBL) in IM and JL devices. JL device is found to have much smaller DIBL ~ 21.10 mV/V, almost an ideal SS ~ 60 mV/dec, and a higher ION/IOFF ratio ~ 2.85 × 108 as compared to the results available for CGAA devices in the literature.

Analysis on effect of lateral straggle on analog, high frequency and DC parameters in Ge‐source DMDG TFET

The diffusion of doping concentration in source/drain regions through ion implantation technique extents to the channel, which decreases the inversion portion of channel and results in variation of device behavior. In this paper, by merging the advantages of Ge-source TFET and dual material gate (DMG) TFET, a new device named as Ge-source dual material double gate (DMDG) TFET is proposed. We have investigated DC parameters like drain current vs gate bias, drain current vs drain bias, subthreshold swing (SS), and current ratio (ION/IOFF) by changing the lateral straggle parameter (σ) from 0 to 5 nm through TCAD device simulator in proposed TFET. The RF/analog behavior like transconductance (gm), output conductance (gd), intrinsic gain (gm/gd), total gate capacitance (Cgg), cut-off frequency (fc), transconductance generation factor (TGF), transconductance frequency product (TFP), gain frequency product (GFP), and gain transconductance frequency product (GTFP) are reported for different σ values in proposed TFET. It is found that both DC and RF/analog figure of merits are a function of σ. It is perceived that ION as well as RF/analog characteristics are improved, whereas, short channel parameter degrades with increase in σ. Finally, the effect of σ on noise performance and s-parameters are highlighted in proposed device.

Sensitivity Analysis on Dielectric Modulated Ge-Source DMDG TFET Based Label-Free Biosensor

This work compares the performance of dielectric modulated (DM) based Ge-source dual material double gate (DMDG) Tunnel Field Effect Transistor (TFET) and conventional (C)-DMDG-TFET as label free biosensor through Technology Computer Aided Design (TCAD) simulator. Here, cavity is introduced both at source and drain sides of the fixed HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> dielectric to increase the capture area of biosensors. Sensitivity (S <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sub> ) is extracted for both neutral and charged (positive/negative) biomolecules considering cavity is fully filled with different dielectric materials (k). We have reported the sensitivity with the variation in height of nanogap cavity (h <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">bio</sub> ) for neutral biomolecules in the cavity. The sensitivity of Ge-source DMDG-TFET is found higher than C-DMDG-TFET due to more conduction at the tunnel junction. Also, the subthreshold swing (SS), transfer characteristics, and I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> /I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> ratio of these biosensors are reported for different k and h <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">bio</sub> considering neutral/charged biomolecules. The sensitivity of partially filled nanogaps with biomolecules like decreasing, increasing, concave, and convex step profiles are reported for both the biosensors. The dynamic range (DR) of both the biosensors are extracted in presence of positive and negative charged biomolecules. The response time of Ge-source DMDG-TFET is reported at different k. A comparative study of proposed biosensor with other reported work is discussed. Finally, the sensitivity is extracted for DMDG-TFET considering other source material like GaAs, InAs, Si-Ge hetero stacked (HS), GaAs-InAs HS.

Impact of back gate work function for enhancement of analog/RF performance of AJDMDG Stack MOSFET

In this work, the impact of back gate work function on analog/RF performance of Asymmetric Junctionless Dual Material Double Gate MOSFET with high K gate Stack (AJDMDG Stack MOSFET) has been studied. The impact of back gate work function on analog/RF parameters like drain current (ID), transconductance (gm), transconductance generation factor (TGF), intrinsic gain, output resistance (rout), cut-off frequency, maximum frequency of oscillation (fmax) etc. have been studied through TCAD device simulator. The results reveal that an improvement in analog/RF performance has been achieved by choosing a low value work function of the back gate.

Linearity Parameters Evaluation due to Lateral Straggle in Ge-Source DMDG-TFET

TFET is very favourable device than MOSFET in terms of low power design and applications. The accurate fabrication of device results in satisfactory electrical characteristics. The diffusion of source/drain regions through the ion implantation technique, extent to the channel section, which eventually changes the behaviour of device. In this letter, the linearity behaviour of Ge-source dual material double gate (DMDG) TFET is highlighted for the variation in lateral straggle parameter (σ) from 0 to 5 nm. The linearity parameters such as higher order harmonics (gm2 and gm3), voltage intercept point (VIP2 and VIP3), input intercept power (IIP3), intermodulation distortion (IMD3), and 1-dB compression point are studied in Ge-source DMDG-TFET taking σ as parameter.

Drain Current Modelling of Asymmetric Junctionless Dual Material Double Gate MOSFET with High K Gate Stack for Analog and RF Performance

This paper presents the continuous 2D analytical modelling of electrostatic potential, threshold voltage (Vth), subthreshold swing, drain induced barrier lowering (DIBL) and drain current of asymmetric junctionless dual material double gate MOSFET with high K gate stack (AJDMDG Stack MOSFET). The electrostatic potential is achieved by solving Poisson’s equation with the help of the parabolic approximation method. Analytical results are verified by using ATLAS TCAD Device simulator. A comparative study of short channel effects (SCEs) of AJDMDG Stack MOSFET and asymmetric junctionless dual material double gate MOSFET with high K gate stack (SJDMDG Stack MOSFET) has been observed in order to show the efficacy of asymmetry condition such as gate oxide asymmetry, gate work function asymmetry etc. for suppressing SCEs. Further, analog/RF performance parameters such as transconductance (gm), output resistance (rout), intrinsic gain, transconductance generation factor (TGF), cut-off frequency (fT), maximum frequency (fmax), gain bandwidth product (GBW) etc. of AJDMDG Stack MOSFET are observed and compared the results with SJDMDG Stack MOSFET structure. Results reveal that AJDMDG Stack MOSFET has better efficacy for RF applications.

The analog/RF performance of a strained-Si graded-channel dual-material double-gate MOSFET with interface charges

The analog/radiofrequency (RF) performance of a strained-silicon (s-Si) graded-channel dual-material double gate (GC-DMDG) metal–oxide–semiconductor field-effect transistor (MOSFET) with interface charges is investigated by using Sentaurus technology computer-aided design (TCAD) software. The analog/RF figures of merit of the proposed s-Si GC-DMDG MOSFET, including the intrinsic voltage gain, transconductance generation factor, early voltage, unity-current gain frequency ( $$f_{\rm t}$$ ), transconductance–frequency product (TFP), gain–frequency product (GFP), and gain–transconductance–frequency product (GTFP), are evaluated for different values of device parameters such as the strain in the silicon, the interface charge density, and the thicknesses of the oxide and substrate layers. The simulation results exhibit that the proposed s-Si GC-DMDG MOSFET device attains lower values of transconductance and output conductance and a higher value of early voltage compared with the s-Si graded-channel double-gate (GC-DG) MOSFET. Besides, the proposed s-Si GC-DMDG MOSFET device provides better performance in terms of $$f_{\rm t}$$ , TFP, GFP, and GTFP in comparison with the s-Si GC-DG MOSFET in the strong inversion region, and vice versa in the subthreshold region.

Analytical modeling of subthreshold current and swing of strained‐Si graded channel dual material double gate MOSFET with interface charges and analysis of circuit performance

AbstractIn this paper, a two‐dimensional (2‐D) center channel potential based subthreshold current (SC) and subthreshold swing (SS) are developed analytically for strained‐Si (s‐Si) graded‐channel dual‐material double gate (GC‐DMDG) MOSFET with interface charges. The proposed analytical model is extracted by solving 2‐D Poisson equation in s‐Si graded‐channel using appropriate boundary conditions. The analytical 2‐D model includes effects of various MOSFET parameters such as s‐Si channel length, strain in the silicon substrate, and oxide interface charge density with damaged length by extensively analyzing channel potential, SC, and SS. Also, the subthreshold characteristics of the proposed s‐Si GC‐DMDG MOSFET demonstrate superior performance over s‐Si graded channel double gate MOSFET. The numerical results obtained using TCAD of the proposed DG MOSFET are validated with the results attained from proposed analytical model. Moreover, the performance of CMOS inverter using s‐Si GC‐DMDG MOSFET is evaluated for different device parameters. It is investigated that the proposed s‐Si GC‐DMDG MOSFET has better noise margin than s‐Si GC‐DG MOSFET.