Linearity Parameters Evaluation due to Lateral Straggle in Ge-Source DMDG-TFET

Abstract

TFET is very favourable device than MOSFET in terms of low power design and applications. The accurate fabrication of device results in satisfactory electrical characteristics. The diffusion of source/drain regions through the ion implantation technique, extent to the channel section, which eventually changes the behaviour of device. In this letter, the linearity behaviour of Ge-source dual material double gate (DMDG) TFET is highlighted for the variation in lateral straggle parameter (σ) from 0 to 5 nm. The linearity parameters such as higher order harmonics (gm2 and gm3), voltage intercept point (VIP2 and VIP3), input intercept power (IIP3), intermodulation distortion (IMD3), and 1-dB compression point are studied in Ge-source DMDG-TFET taking σ as parameter.