Dual-armed Cluster Tools Research Articles

Periodic Scheduling Optimization for Dual-Arm Cluster Tools with Arm Task and Residency Time Constraints via Petri Net Model

In order to improve quality assurance in wafer manufacturing, there are strict process requirements. Besides the well-known residency time constraints (RTCs), a dual-arm cluster tool also requires each robot arm to execute a specific set of tasks. We call such a tool an arm task-constrained dual-arm cluster tool (ATC-DACT). To do this, one of the arms is identified as the dirty one and the other as the clean one. The dirty one can deal with raw wafers, while the clean one can deal with processed wafers. This requirement raises a new problem for scheduling a cluster tool. This paper discusses the scheduling problem of ATC-DACTs with RTCs. Due to the arm task constraints, the proven, effective swap strategy is no longer applicable to ATC-DACTs, making the scheduling problem difficult. To address this problem, we explicitly describe the robot waiting as an event and build a Petri net (PN) model. Then, we propose a hybrid task sequence (HTS) as an operation strategy by combining the swap and backward strategies. Based on the HTS, the necessary and sufficient conditions for schedulability are established; also, a linear programming model is developed. We then develop an algorithm using these results to optimally schedule the system. Industrial case studies demonstrate the application of this method.

Cycle time analysis for cluster tools with parallel process chambers, processing time variation, and chamber cleaning operations

Cluster tools are the key equipment in semiconductor manufacturing. For high-end chip manufacturing processes, to ensure the wafer quality, periodical cleaning operations for process chambers in such tools are required for eliminating the residual gas and chemicals. In operating a tool, the wafer processing time in a process chamber may vary within a range. It is meaningful to predict the cycle time of cluster tools with chamber cleaning operations and processing time variation. By doing so, automation material handling system can be told when a lot is completed by a cluster tool such that it can assign an overhead hoist transporter to transport this lot at the right time. This plays an important role in improving the productivity of a whole semiconductor manufacturing system. This work conducts the cycle time analysis of cluster tools with chamber cleaning operations and processing time variation. Specifically, it proposes a novel method to calculate the average cycle time of a single-arm cluster tool under which an optimal schedule can be obtained. Then, for a dual-arm cluster tool, an efficient algorithm is developed to approximate the average system cycle time under which an optimal schedule can be obtained. Experiments show that the gap between the average system cycle time obtained by simulations and the average system cycle time obtained by the proposed method is no more than 0.1% which demonstrate the effectiveness of the proposed method.

Efficient Scheduling of Residency-Time-Constrained Dual-Armed Cluster Tools With Condition-Based Chamber Cleaning Operations

Efficient Scheduling of Residency-Time-Constrained Dual-Armed Cluster Tools With Condition-Based Chamber Cleaning Operations

The Impact of Processing Time Variations on Swap Sequence Performance in Dual-Armed Cluster Tools

The performance of a swap sequence is analyzed by assuming cyclic scheduling in dual-armed cluster tools with processing time variations. A dual-armed cluster tool consists of multiple processing modules (PMs), one material handling robot that can hold two wafers at the same time, and loadlocks where wafer cassettes are loaded or unloaded. The swap sequence in a dual-armed cluster tool is widely used in practice and known to be optimal with deterministic processing times when the bottleneck PM’s workload is larger than the robot workload. However, in practice, processing times on a PM can have a small variation, which leads to a different processing time of each wafer on the PM. Hence, when the processing time variation is introduced, the performance of the swap sequence needs to be analyzed. This paper first defines a fundamental cycle and analyzes its cycle time. It then proposes optimality conditions of the swap sequence and performs numerical experiments to show the effectiveness of the sequence. <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Note to Practitioners</i> —A dual-armed cluster tool used for semiconductor manufacturing processes is usually operated with a swap sequence because it is simple, easy to control, and proven to be optimal with deterministic processing times. However, studies on the performance of the swap sequence are still limited with processing times varying in PMs which often occur in practice. Hence, this study shows the effectiveness of the swap sequence with the processing time variations by analyzing cycle times, optimality conditions, and performing numerical experiments.

Cleaning Plan Optimization for Dual-Armed Cluster Tools With General Chamber Cleaning Periods

Cleaning Plan Optimization for Dual-Armed Cluster Tools With General Chamber Cleaning Periods

Dual-Arm Cluster Tool Scheduling for Reentrant Wafer Flows

Cluster tools are the key equipment in semiconductor manufacturing systems. They have been widely adopted for many wafer fabrication processes, such as chemical and physical vapor deposition processes. Reentrant wafer flows are commonly seen in cluster tool operations for deposition processes. It is very complicated to schedule cluster tools with reentrant processes. For a dual-arm cluster tool with two-time reentering, the existing studies point out that a one-wafer periodical (1-WP) schedule can be found, and it is optimal in terms of productivity. However, for some wafer fabrication processes, wafers should be processed at some PMs more than two times. This gives rise to a question of whether there still exists a 1-WP schedule for dual-arm cluster tools with the number of reentering times being more than two such that the cycle time of a tool can reach the lower bound. This problem is still open, and this is what this work wants to tackle. For a dual-arm cluster tool with the number of reentering times being k (&gt;2) times, if there does not exist a value f ∈ {1, 2 …} such that k = 3f, theoretical proofs are given to show that a 1-WP schedule can be found, otherwise it does not exist. For cases with a 1-WP schedule, the cycle time can be obtained by analytical expressions. For the cases without a 1-WP schedule, two new methods for a three-wafer periodical schedule are proposed to improve the system productivity by comparing it with an existing three-wafer periodical schedule. The applications of the obtained results are demonstrated by examples. Wafer residency time constraints are required for some wafer fabrication processes. Note that the results obtained in this work cannot be directly applied to cluster tools with both reentrant wafer flows and wafer residency time constraints. Nevertheless, schedulablity and scheduling analyses for that applications can be conducted based on the obtained results in this work.

Optimal Cyclic Scheduling of Wafer-Residency-Time-Constrained Dual-Arm Cluster Tools by Configuring Processing Modules and Robot Waiting Time

Optimal cyclic scheduling problems of wafer-residency-time-constrained dual-arm cluster tools in wafer fabrication are challenging and remain to be fully solved. Existing studies assume that all processing modules (PMs) of a required type are used to process the same type of wafers. This sometimes brings unneeded conservation to scheduling results, because we may be able to make a tool schedulable by reducing the number of PMs in some steps if the original one is not. In some cases, we may use fewer PMs to reach the same result if the original one is schedulable. This work selects a proper number of PMs of needed types to process wafers with the highest productivity. It proposes the necessary and sufficient conditions under which a tool is schedulable and develops a polynomial-complexity algorithm that finds an optimal cyclic schedule. Examples are given to show its superiority over existing ones, thus advancing this field greatly.

Control laws synthesis for timed event graphs subject to generalised marking constraints by Min-Plus algebra: application to cluster tools

This paper discusses the problem of control laws for Discrete Event Dynamic Systems (DEDSs) represented by Timed Event Graphs (TEGs) under Generalized Marking Constraints (GMCs). The behaviour of TEGs is described using linear equations while GMCs are expressed by weighted inequalities in Min-Plus algebra. We formulate the problem in terms of control linear Min-Plus models. Hence, an algebraic method to calculate control laws ensuring the respect of GMCs is suggested. And once sufficient conditions are satisfied, we propose casual feedbacks to guarantee these marking specifications. Besides, the proposed control strategy is applied to a dual-armed cluster tool, a well-known industrial application.

An Efficient Binary Integer Programming Model for Residency Time-Constrained Cluster Tools With Chamber Cleaning Requirements

Cluster tools play a significant role in the entire process of wafer fabrication. As the width of circuits in semiconductor chips shrinks down to less than 10nm, strict operational constraints are imposed on the operations of cluster tools in order to ensure the quality of processed wafers. Particularly, wafer residency time constraints and chamber cleaning requirements are commonly seen in etching, chemical vapor deposition, coating processes, etc. They make the scheduling problem of cluster tools more challenging. This work aims to provide a solution for dual-arm cluster tools with wafer residency time constraints and chamber cleaning requirements. To do so, it proposes a novel virtual wafer-based scheduling method. By this method, under a steady state, a PM processes either a real or virtual wafer at a time. When a PM processes a virtual one, its chamber can perform a cleaning operation. In this way, we can meet not only the strict residency time constraints for real wafers, but also innovatively meet chamber cleaning requirements. Based on such a novel scheduling method, an efficient binary integer programming model is established to optimize the throughput of cluster tools. Finally, experiments are performed to show the efficiency and effectiveness of the proposed method. <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Note to Practitioners</i> —To ensure wafer quality in semiconductor manufacturing, engineers have to impose wafer residency time constraints and chamber cleaning requirements on the operations of cluster tools. In order to tackle their scheduling problem with these constraints, this work proposes a novel method based on the use of virtual wafers. Under a one-cyclic schedule obtained for time-constrained cluster tools without chamber cleaning requirements, virtual wafers are loaded into the tool such that when a PM processes a virtual wafer, a chamber cleaning operation can be performed in practice. The key to solve this scheduling problem is to find a wafer loading sequence with the highest performance in terms of cycle time. To do so, this work establishes an efficient binary integer programming model to search for such a solution. Since the obtained solution is a periodical wafer loading sequence based on a one-wafer cyclic schedule, it can be easily implemented. Therefore, this work has a high practical value to numerous semiconductor manufacturers.

Green scheduling of dual-armed cluster tool based on cleaning scenarios

Semiconductor manufacturing is one of the most complex manufacturing systems, of which wafer fabrication is the core part. Dual-armed cluster tool is widely used in the wafer manufacturing industry with its efficient production characteristics. The scheduling process of the dual-armed cluster tool has to consider many constraints; wafer residency time constraints, activity time fluctuations, etc. are relatively basic requirements. With the improvement of wafer processing accuracy in the market, green scheduling and processing efficiency are emerging as key issues for research, the scheduling of dual-armed cluster tool considering the above constraints is an NP-hard problem. Based on this study, the clean scenario is divided, a scheduling model that can realize low-carbon production is constructed, and the scheduling idea of the dual-armed cluster tool under clean transient is analyzed to ensure that the clustering tool is in green scheduling and restored to a steady state as soon as possible during the scheduling process.

Wafer Delay Analysis and Workload Balancing of Parallel Chambers for Dual-Armed Cluster Tools With Multiple Wafer Types

We examine a scheduling problem for a dual-armed cluster tool that processes multiple similar wafer types concurrently. It has been recently proved that the well-known swap sequence, which is widely used for single wafer type processing, also minimizes the cycle time for concurrent processing. In this article, we wish to minimize wafer delays in a process chamber, which are critical to wafer quality degradation, while maintaining the minimum cycle time. In particular, we show that concurrent processing of wafers with different processing times complicates the analysis of wafer delays significantly, and the wafer delays can be remarkably reduced by finding a proper cycle plan which is the release sequence of different wafer types. We first characterize wafer delays for a given cycle plan by analyzing the circuits of the timed event graph (TEG) model. From this, we prove that concurrent processing of wafers may cause a significant workload imbalance between parallel chambers of a process step, and hence the wafer delays increase substantially. We present that the wafer delays are minimized by a cycle plan that evenly balances workloads between parallel chambers. We also propose how wafer loading task at each process step has to be postponed to meet wafer delay constraints while maintaining the minimum cycle time. Note to Practitioners —Wafer quality control has become an essential fab operational problem in semiconductor manufacturing industry. In cluster tools, which are dominantly being used for diverse wafer fabrication stages, it has been proven that the wafer delays within process chambers have a crucial impact on the wafer quality. Accordingly, modern fabs have introduced stringent quality control to regulate wafer delays in cluster tools. In this research, we propose a scheduling strategy to minimize the wafer delays when a cluster tool concurrently processes multiple wafer types. We first show that the release sequence of different wafer types significantly impacts the wafer delays under concurrent processing, and we then propose how these wafer delays can be minimized by finding the optimal wafer release sequence.

Efficient Approach to Failure Response of Process Module in Dual-Arm Cluster Tools With Wafer Residency Time Constraints

In semiconductor manufacturing, a process module (PM) failure in cluster tools (CTs) happens from time to time. To effectively operate a CT, such a failure should be handled in a proper and timely manner. This issue becomes much more complicated because wafer residency time constraints (WRTCs) must be met to ensure the quality for some wafer fabrication processes. With such constraints, if a tool is operated under a periodic schedule and a PM fails, it is desired that the tool can still operate under a periodic schedule if it is possible. Nevertheless, the periodic schedule after a PM failure must be different from that before its failure since in this case the tool is degraded. Thus, there must be a transient process between them. It is a great challenge to operate a tool such that it can go through such a transient process with WRTCs being always satisfied. This paper aims to solve this problem by proposing PM failure response policies which can successfully transfer a CT to the feasible schedule after failure from the one before a failure. Then, efficient algorithms are developed to improve these response policies. The proposed policies are composed of simple control laws such that they can be realized in real time and online. Illustrative examples are presented to show their applications.

Transient Process Optimization for Dual-Arm Cluster Tools With Wafer Revisiting

In wafer fabrication, it is imperative to minimize the transient process of cluster tools for the sake of on-demand and preventive maintenance. Due to the trend of multi-type and small-batch production, transient processes appear more and more frequently. Thus, the optimization problems of transient processes have gained increasing attention from both industry and academia. The requirement for wafer revisiting tend to complicate this problem significantly. However, only a few studies take such a challenge for cluster tools with wafer revisiting. This paper focuses on the schedule optimization of transient processes for dual-arm cluster tools with wafer revisiting. To accelerate transient processes, including both start-up and close-down ones, we adopt a program evaluation and review technique to analyze and harness a cluster tool’s state evolution. We then propose computationally efficient algorithms to speed up transient processes. Finally, we provide illustrative examples to show their applications and validate their effectiveness.

Scheduling dual-arm cluster tools with multiple wafer types and residency time constraints

Accompanying the unceasing progress of integrated circuit manufacturing technology, the mainstream production mode of current semiconductor wafer fabrication is featured with multi-variety, small batch, and individual customization, which poses a huge challenge to the scheduling of cluster tools with single-wafer-type fabrication. Concurrent processing multiple wafer types in cluster tools, as a novel production pattern, has drawn increasing attention from industry to academia, whereas the corresponding research remains insufficient. This paper investigates the scheduling problems of dual-arm cluster tools with multiple wafer types and residency time constraints. To pursue an easy-to-implement cyclic operation under diverse flow patterns, we develop a novel robot activity strategy called multiplex swap sequence. In the light of the virtual module technology, the workloads that stem from bottleneck process steps and asymmetrical process configuration are balanced satisfactorily. Moreover, several sufficient and necessary conditions with closed-form expressions are obtained for checking the system's schedulability. Finally, efficient algorithms with polynomial complexity are developed to find the periodic scheduling, and its practicability and availability are demonstrated by the offered illustrative examples.

Integrated Scheduling of a Dual-Armed Cluster Tool for Maximizing Steady Schedule Patterns

A cluster tool consists of several single-wafer processing chambers and a wafer handling robot. A wafer has to wait within a chamber after being processed there until it is unloaded by the robot. Such wafer delays may cause wafer quality degradation or variability due to residual gases and heat in the chamber. The tool operation schedule has to maintain identical timing patterns or schedules for each cycle so as to keep wafer delays constant for every wafer. However, at the beginning of the tool operation, the tool is in an empty state and hence we need to make the tool reach such steady schedule by loading wafers into the tool. In this article, we develop a method of scheduling the robot tasks during the start-up period of a cluster tool to reach a target steady schedule quickly as possible. To do this, we model the behaviors of a cluster tool using timed Petri nets and linear system matrices in the max-plus algebra. By analyzing the matrices, we first identify a class of steady schedules which can be reached from the empty tool. We develop the matrices that explain the schedule evolution of the start-up period before reaching the steady period. By examining the matrices, we develop a method of choosing the most desirable one from such class of reachable steady schedules that can be achieved in the minimum time. We also prove that the schedule also minimizes the time duration of the close-down. Finally, we present computational experiments.

Scheduling Dual-Armed Cluster Tools for Concurrent Processing of Multiple Wafer Types With Identical Job Flows

As the order size for modern fabs tends to be smaller, fabs wish to process a class of similar wafer lots at a tool concurrently to reduce the work-in-progress lots as well as the total manufacturing lead time. We examine a scheduling problem for a dual-armed cluster tool that simultaneously produces multiple wafer types with identical wafer flow patterns but different process times. We prove that the conventional swap sequence, which is optimal and prevalently being used for single-wafer-type processing, is also optimal for such concurrent processing. We then propose a way of determining a release sequence of wafer types into the tool, called cycle plan , that maximizes the utilization of parallel chambers and hence increases the tool throughput rate. We present conditions for which the parallel chambers are shared by all wafer types and their workloads are evenly balanced so as to maximize the throughput rate. We also report the experimental results. Note to Practitioners —This paper suggests how to operate cluster tools for concurrent processing of similar wafer types. The results ensure that the conventional swap sequence is still effective for concurrent processing. We also provide a simple strategy of mixing different wafer types and the optimal release sequence for the wafers. We confirm that the tool throughput can be significantly improved when the release sequence of wafers is properly determined.

Robust Scheduling of Time-Constrained Dual-Arm Cluster Tools With Wafer Revisiting and Activity Time Disturbance

Wafer revisiting and residency time constraints complicate the scheduling problem of cluster tools in semiconductor manufacturing. Random disturbance to the activity time in operating a tool further complicates such a scheduling problem. To solve this challenging problem, this paper proposes a robust real-time schedule which consists of a real-time controller (RTC) and an off-line schedule. The former is developed to offset the activity time disturbance such that the wafer sojourn time fluctuation in a process module is minimized. With the RTC, to find the off-line schedule, necessary and sufficient schedulability conditions under which a feasible schedule exists are derived and these conditions can be easily checked. Then, the off-line schedule can be efficiently found by the proposed algorithms based on nondisturbed activity time if a feasible schedule exists. With the obtained real-time schedule, it is shown that the productivity of the system is maximized. Finally, examples are used to illustrate the proposed approach.

${K}$ -Cyclic Schedules and the Worst-Case Wafer Delay in a Dual-Armed Cluster Tool

In a cluster tool for semiconductor manufacturing, a wafer waits within a chamber after processing until it is unloaded by the robot. Such wafer delays degrade wafer quality due to residual gases and heat, even cause quality failures. A cluster tool mostly operates in a ${K}$ -cyclic schedule, where an identical timing pattern repeats for each ${K}$ cycles, because of sporadic disruptions in process times or robot task times and the closed-architecture of the tool scheduler. In addition, it is hard to predict the ${K}$ -cyclic schedule that the tool will reach. Such a ${K}$ -cyclic schedule makes wafer delays at each chamber repeat ${K}$ different values. Therefore, such variability of wafer delays increases the risk of quality failure. Therefore, we examine the maximum wafer delay among all possible ${K}$ -cyclic schedules called the worst-case wafer delay in this paper. We first characterize the maximum cyclicity ${K}$ of tool schedules. We then develop closed-form formulas for most frequently used wafer flow patterns and an optimization model that computes the worst-case wafer delay. We also identify factors that affect the worst-case wafer delay and their influences by experiments. Finally, we suggest tool operation guidelines for lowering the worst-case wafer delay.

Closed-Form Expressions on Lot Completion Time for Dual-Armed Cluster Tools With Parallel Processing Modules

Cluster tools, which consist of processing modules (PMs) and a transport robot, are used for wafer fabrication processes in semiconductor manufacturing fabs. Once processing of a wafer lot containing several wafers is completed in a tool, an overhead hoist transport (OHT) unloads the lot and transports it to another tool. Since it is not easy to estimate when a wafer lot is completed, an OHT is required to wait for the wafer lot to be completed near the tool, or tools become idle due to the late delivery of wafer lots. To reduce the resulting idle time, a closed-form expression of the lot completion time is derived, especially, for a dual-armed cluster tool consisting of parallel PMs, to reflect real applications. We even consider lot switching operations where two consecutive wafer lots are processed with an overlap in analyzing the completion time. We finally show that the formulas derived can be used when there are small processing time variations experimentally. Note to Practitioners —For a dual-armed cluster tool with parallel processing modules (PMs), a closed-form expression on the lot completion time is derived. For this, we also consider lot switching operations, where the previous and next lots are temporarily processed together in a tool. With the formulas, we can send overhead hoist transports (OHTs) just-in-time to tools to unload or load wafer lots in tools, which can significantly reduce the idle time of tools and OHTs. In addition, the formulas can be used to design the number of PMs for wafer lots and assign wafer lots to tools to reduce their flow time. We believe that more efficient planning and scheduling in semiconductor manufacturing can be achieved by utilizing our results.

Wafer delay analysis and control of dual-armed cluster tools with chamber cleaning operations

As the design of integrated circuits has become increasingly complicated and dense, serious wafer quality problems are observed in modern wafer fabrication facilities. Therefore, in cluster tools of leading fabs process chambers are periodically cleaned in order to eliminate residual chemicals and impurities that can damage the wafer quality. A chamber cleaning operation is mainly applied to tools in which a wafer delay has a crucial impact on the wafer quality, and hence the need of wafer delay control becomes more significant when chamber cleaning is considered. Thus, we first examine how wafer delays can be specified for cluster tools with chamber cleaning operations. We confirm that wafer delays are substantially increased when chambers are periodically cleaned, and we show that such increased wafer delays cannot be eliminated or reduced using the existing scheduling methods. In such a case, we prove that a partial loading strategy can minimise both the tool cycle time and the wafer delays by controlling the number of wafers being loaded into parallel chambers. We also present how wafer delays under the partial loading strategy can be further reduced by introducing a timing control method that regulates the start times of robot tasks.