Device Density Research Articles

(Energy Technology Division Graduate Student Award sponsored by BioLogic) Probing and Engineering Electrode-Electrolyte Interfaces in Electrochemical Energy Storage and Conversion

Climate change demands the development of clean energy technologies, where rechargeable batteries and fuel cells promise a bright future by integrating with solar or wind energy. Li-ion batteries and fuel cells also play essential roles in electrifying transportation in replacement of internal combustion engines. Central to these electrochemical systems is the electrode-electrolyte interface, where (electro)chemical surface reactions or intercalation reactions occur, and its thermodynamic and kinetic properties determine the energy density, power density, and lifetime of the electrochemical devices. However, the molecular structures at the interface and how they promote or suppress the desired reactions remain unclear, hindering the rational design of electrode-electrolyte interfaces to improve the performance of electrochemical devices.This talk focuses on the fundamental understanding of the interfacial (electro)chemical reaction mechanisms at the molecular level and charges transfer kinetics at the electrified interfaces. First, an in situ Fourier-transform infrared spectroscopy (FTIR) method was developed to examine the parasitic reactions between carbonate electrolytes and lithium nickel, manganese and cobalt oxides (NMC) in Li-ion batteries, and unique evidence for dehydrogenation reactions on Ni-rich NMC was revealed, which accounted for interface impedance build-up and battery capacity fading. Based on the proposed mechanism, strategies based on electrolyte non-covalent interactions were demonstrated to improve battery lifetime. In the second part of the talk, the research extended in situ FTIR characterization and electrolyte engineering to electrocatalytic reactions central to fuel cell technologies. An interfacial layer of protic ionic liquids with different acid dissociation constants were found to enhance the oxygen-reduction reaction (ORR), attributed to strengthened hydrogen bonding between ORR products and ionic liquids, revealed by in situ surface-enhanced infrared absorption spectroscopy and density functional theory (DFT) calculations. For the hydrogen evolution reaction (HER), similarly, promoting hydrogen bonding between interfacial water molecules also facilitated proton-coupled electron transfer kinetics, resulting in favorable HER in controllable organic confinements. Finally, this talk will introduce fundamental, theoretical aspects of charge transfer processes at the electrode-electrolyte interface - the kinetic mechanism for ion intercalation. Experimental evidence from a charge-adjusted electrochemical method showed that Li-ion intercalation occurs by coupled ion-electron transfer (CIET), which governs the current-dependent maximum capacity and power density of intercalation batteries. these research efforts have laid a solid foundation for the rational design of electrochemical interfaces employing the physical chemistry of electrodes and electrolytes, for next-generation electrochemical storage devices with improved energy and power density and cycle life.

(Invited) Unification of Bulk Storage and Supercapacitive Storage

In typical insertion electrodes for batteries, the capacity is determined by bulk storage within the electroactive particles, which is comparatively well investigated and understood. In contrast, supercapacitor electrodes are dominated by interfacial storage at interfaces, which is well addressed experimentally. However the charge carrier chemistry (defect chemistry) especially in the latter case is not taken seriously. Consequently a bridge between the two important fields is absent. Following and extending our quantitative concept of job-sharing storage, a generalized description that includes bulk and space charge storage (electrochemical and supercapacitive storage) is possible. In other words the treatment of defect chemistry as a function of the degree of storage as well as of position is key to a unification. The experimental part of our research uses TiO2 and Nb2O5 thin films. The precise measurement of the storage capacity of thin films as a function of thickness allows us to deconvolute bulk and interfacial contributions. We discuss the results in terms of bulk and space charge capacitance. The generalized treatment that comprises both contributions shows also how the ratio of both varies with the degree of storage. Meanwhile exploiting various techniques (bias dependent impedance, TEM and EELS) electric field and charge distributions from bulk to the interface region are investigated. In the same context we study the space charge behavior in a discretized manner rather than by using the analytical Poisson-Boltzmann function. In this way a more precise definition and demarcation of electrode and double layer capacity is achieved. In terms of application we expect this work to provide a better understanding of energy and power densities of storage devices which becomes particularly important for nanoionic systems.

(Invited) Graphene-Based Scaffolds for Electrochemical Energy Storage

The efficient transport of charge species within energy storage devices is critical to realizing both large power and energy densities, especially when operating under extreme conditions (e.g. ultralow temperatures, high charge/discharge rates, etc.). A number of resistances can contribute to sluggish ion/electron transport in a cell such as charge transfer at interfaces, electrolyte resistance, electrode resistance, and diffusive transport within porous electrodes. Several strategies have been pursued to address these transport limitations. Electrolyte engineering is an effective approach as it can influence both electrolyte resistance and charge transfer resistances. Electrode materials discovery and development is another popular strategy as the charge storage mechanism and electrode resistance play a key role in kinetics of the device. Within electrode materials development, engineering of the electrode pore architecture is an extremely effective strategy to decrease the diffusive transport lengths and electrode resistances. This pore engineering can be achieved through synthetic chemistry for small pores (e.g. <10 um) and via additive manufacturing for larger pores (> 10 um). Here we show how electrolyte engineering and electrode materials development can be used to overcome sluggish transport in graphene-based electrodes. Particular focus will be given to the use of synthetic means to tune to the properties of a graphene aerogel scaffold (e.g. surface area, pore size, mechanical properties) and additive manufacturing to define the larger pore structure to facilitate uniform deposition of active materials (e.g. MnO2) and improve energy density and rate capability of the energy storage device. We explore a number of additive manufacturing techniques (e.g. direct ink write, projection microstereolithography, etc.) to print a variety of lattice structures and computer-guided designs to determine the optimal electrode architecture.This work was performed under the auspices of the U.S. Department of Energy by Lawrence Livermore National Laboratory under Contract DE-AC52-07NA27344.

(Invited) Integration of InP Heterojunction Bipolar Transistors on Silicon Substrates for 6G Networks

The fast expansion of the global datasphere creates a huge demand on the future wireless communication technologies. Although 5G, the 5th generation of the cellular network technology, is still being rolled out, the potential of 6G is already intensively explored. The vision of 6G implies not only massive connectivity and higher data rate (up to 100 Gb/s and more) in ultra-reliable low-latency communication, but machine-to-machine interaction will dominate over those involving humans. AI (artificial intelligence) and machine learning will be omnipresent.6G network will address a frequency spectrum beyond 100 GHz, which provides wider bandwidths and, therefore, potentially simpler modulation schemes and eventually lower power consumption. However, a clear disadvantage of these mm-waves or sub-THz frequencies are the atmospheric absorption and blockage effect by physical obstacles or rain. These challenges must be tackled by a sufficiently high transceiver device density per area together with advanced beam steering and AI empowered networks.The power amplifier (PA) is one of the most critical components of the RF front-end module. Here, InP based heterojunction bipolar transistors (HBT) clearly outperform PAs based on CMOS or SiGe BiCMOS concerning saturated output power, energy efficiency and breakdown voltage. However, the limiting downside of InP HBTs is the missing cost-efficient and scalable fabrication, which hampers its adoption in high-volume 6G applications. In this paper we review various InP HBT fabrication concepts with the aim of lowering the production costs and maintaining high device performance.The best HBT device performance is demonstrated for the lattice-matched deposition on native small-diameter (≤ 150 mm) InP substrates due to perfect III-V crystal quality. Although device fabrication on these wafers cannot profit from the advanced tool park available in 200/300 mm fabs, the main drawbacks are the high cost and brittleness of InP substrates. Realizing InP HBTs on Si substrates allows to benefit from their robustness, low cost, and the access to a mature device fabrication on large-diameter wafers.In wafer reconstitution, numerous diced InP wafer tiles, which already contain the grown HBT layer stack, are bonded to a Si carrier to populate the wafer surface. After planarization, the reconstructed Si wafer can be further fabricated in a CMOS compatible 200/300 mm fab. In transfer printing a comparable approach is followed while only the active device stack is transferred to the Si carrier. Transferring only a thin InP layer to the Si carrier, which serves as a starting surface for the HBT deposition, leads to a so-called engineered substrate. Compared to the previous transfer methods, the III-V device deposition is carried out after bonding. The key advantage of all these heterogenous integration concepts is the access to a CMOS compatible and scalable device fabrication while maintaining the high III-V crystal quality. Nevertheless, the HBT production costs can only be significantly reduced with a certain re-usability of the InP substrates.The monolithic deposition directly on Si substrates would be the most cost-efficient integration approach. Unfortunately, the mismatch in lattice constant and thermal expansion coefficient between Si and III-V materials leads to the formation of relaxation defects, which degrade the HBT device performance. The growth of thick strain relaxation buffers allows to reduce the defect density in the device layers but bears new challenges such as wafer warpage or III-V crack formation.Nano-ridge engineering (NRE) is based on selective area growth (SAG) applying trench-patterned Si wafers. The III-V deposition starts inside very narrow trenches to achieve efficient aspect ratio trapping (ART) of misfit defects. After the trench is filled with III-V material, the growth is continued to engineer a broad and pristine nano-ridge (NR) which holds the device stack. A second oxide pattern prevents sidewall deposition around the NRs during the deposition of the HBT heterolayers.In the first part of this paper, pros, and cons of the most common InP HBT integration scenarios as summarized in figure will be compared in detail. Among all concepts, NRE holds the potential of being the most cost-efficient integration approach due to SAG in line with very limited III-V material deposition. However, the key open question is what NR crystal quality, and hence, device performance can be realized. This question will be addressed in the second part of the paper, reporting about the latest developments at imec. Figure 1

(Keynote) Technological Challenges and Emerging Device Architectures for Future Semiconductor Micro and Nanoelectronics

Semiconductor technology has known an exponential evolution in the last decades and is fully integrated in our everyday life. According to the Semiconductor Industry association (SIA) the global semiconductor industry sales reaches about US$ 700 billion in 2023, corresponding with a shipment of more than 1.2 trillion components. This necessitates implementation of many novel materials, advanced design concepts and new transistor structures.Increased device performance and reduced power consumption, while maintaining a good manufacturability and yield performance without penalizing the cost/function, are driving microelectronic research towards 3-nm technologies. A large variety of device architectures such as FinFETs, TFETs, negative capacitance, Gate-All-Around, nanowires (NWs), nanosheets (NSs) in both horizontal or vertical configurations, CFET and Forksheet structures are extensively investigated for both logic and analog/RF building blocks enabling System-on-Chip (SoC) applications.In addition to the huge progress achieved in silicon technology, heterogenous integration of Ge and III-V technologies on a silicon platform shows a strong potential, leading towards the on-chip integration of building blocks with different functionality. The fact that both Ge and III-V materials can be selectively grown on Si has strongly triggered the interest in heterogeneous integration.Wide bandgap materials such as GaN offer unique features for RF applications used in base stations for mobile communication, complementing the performance of Si devices suffering from limited output power. These materials can epitaxially be grown on Si substrates. One of the main challenges related to the hetero epitaxy of III-V materials on a Si substrate is the control of extended defects due to the lattice mismatch of the different materials. In recent years, there has been a strong increase in the commercial availability of GaN devices, although for certain applications there is a competition with SiC.Complex and dense SoC applications can be realized by 3D wafer stacking using Through-Silicon-Vias (TSV) for wafer-to-wafer bonding. The 3D integration results in a reduction of the RC product and interconnect length, a smaller form factor and enables vertical partitioning. Main challenges are the TSV process module itself (e.g. Cu via filling, mechanical stress, contamination, keep-out-zone), the wafer thinning and handling and the 3D stacking technology (stacking density, pitch, chip-to-chip interconnect etc.). Very promising results are obtained for monolithic sequential 3D (S3D) processing based on the processing of different tiers on top of each other. Difference can be made between transistor level (n- and pMOS), CMOS level (different standard cells in different tiers) and IP block level for the partitioning. In this way it is e.g. possible to process first CMOS circuits in the Si substrate and then further processing in a III-V layer on top. Benefits are related to an enhanced device density per chip area and a shorter interconnection length. A low cost less scalable tier can be processed on top of an expensive scalable tier as done in the case of logic-memory integration.Major trends in above mentioned process integration approaches are reviewed and technological challenges of some process modules and device structures highlighted.

A Solution to VLSI: Digital Circuits Design in Quantum Dot Cellular Automata Technology

Quantum Dot Cellular Automata is a Nano device efficient than other devices in nanotechnology for the last two decades. It is beneficial over Complementary Metal Oxide Semiconductor technology like high speed, low energy dissipation, high device density and high computation efficiency. To achieve further optimization different methods like simplifications in Boolean expressions, tile method, clocking scheme, cell placement, cell arrangement, novel input techniques, etc., are in use. These methods improve the performance metrics in terms of QCA Cells, total circuit area, delay in output, power consumption, and coplanar or multilayer layout. This paper is about the novel NOT gate layout designed with efficient parameters compared to existing NOT gates except area parameters with analysis and XOR gate and multiplexer circuits. The novel gate provides an improvement of 55% in the number of cells, polarization raised by 0.33, and an 80.77% improvement in total area. These circuits illustrate further scope in QCA circuit design efficiently. XOR circuit shows area reduction up to 0.006 μm2 with 0.5 clock cycle delay. Further optimization in XOR parameters and with this novel NOT gate researchers can optimize parameters to bring revolution and digitalization.

Self-supported, additive-, and binder-free CuS nanowire array for high performing Na-ion capacitor

Na-ion capacitors are considered to be one of the most promising energy storage devices due to its low cost, safe, highly abundance in nature and comparable performance to lithium-ion capacitor. NICs provide high power density as well as good energy density in a single device. However, the lack of host materials to store Na-ions has challenged its commercialization. It is very important to investigate a suitable host material for the Na-ion capacitors. Metal chalcogenides shows significant electrochemical performance towards the NICs. The low capacitance value, stability in the electrolyte is the main drawbacks of the metal chalcogenides. The tailoring in the nanostructures and the component of the electrode can improve the electrochemical performance of Na-ion capacitors. Herein, a liquid-solid chemical method is developed to fabricate self-supported, binder, and additive-free CuS nanowires on porous copper foam electrode, and investigated for the first time as an anode for Na-ion capacitor. Using Cu-foam instead of Cu-foil as a substrate and current collector enhances the 5-fold capacitance (380 F g−1 at 1 A g−1) for Na-ion capacitors, which suggest the replacement of the Cu-foil as current collector. The involved conversion reaction in CuS NWs/Cu-foam is confirmed by in-situ XRD measurement. Since it is observed that the CuS NWs/Cu-foam exhibited good electrochemical and redox features with superior specific capacitance in three-electrode system, a symmetric device is assembled. The symmetric device shows 400 F g−1 of specific capacitance at 1 A g−1 with 28 Wh kg−1 of energy density and 1440 W kg−1 of power density. It is favourable that CuS nanowires are still preserving to the same morphology after 1000 charge-discharge cycles, which is confirmed by the SEM imaging.

5G Impacts, Internet of Things (IoT) and Businesses in Developing Countries

This study addresses the ramifications of 5G technology for enterprises in developing countries and how it affects the Internet of Things (IoT). The IoT ecosystem is expected to see considerable improvements in connectivity, speed, and capacity with the introduction of 5G networks. The potential advantages and difficulties of integrating 5G technology into the IoT landscape are discussed in this study, along with how it might change several industries in developing nations. This research also highlights how 5G technology might boost IoT capabilities through higher device densities, lower latency, and faster data transmission rates. Additionally, it looks into the particular ramifications for enterprises in underdeveloped countries, taking into account the difficulties with infrastructure, affordability, and the digital divide that these countries confront. It also discusses the potential hazards and obstacles to the deployment of 5G, such as the requirement for suitable legal frameworks, security precautions, and talent development. The results of this study help to improve awareness of the potential effects of 5G technology on the IoT landscape in developing countries and offer guidance for stakeholders, enterprises, and policymakers in properly using its advantages. &#x0D;

Toward Sub-Terahertz: Space-Time Coding Metasurface Transmitter for Wideband Wireless Communications.

A space-time coding metasurface (STCM) operating in the sub-terahertz band to construct new-architecture wireless communication systems is proposed. Specifically, a programmable STCM is designed with varactor-diode-tuned metasurface elements, enabling precise regulation of harmonic amplitudes and phases by adjusting the time delay and duty cycle of square-wave modulation signal loaded on the varactor diodes. Independent electromagnetic (EM) regulations in the space and time domains are achieved by STCM to realize flexible beam manipulations and information modulations. Based on these features, a sub-terahertz wireless communication link is constructed by employing STCM as a transmitter. Experimental results demonstrate that the STCM supports multiple modulation schemes including frequency-shift keying, phase-shift keying, and quadrature amplitude modulations in a wide frequency band. It is also shown that the STCM is capable of realizing wide-angle beam scanning in the range of ±45o , which offers an opportunity for user tracking during the communication. Thus, the STCM transmitter with high device density and low power consumption can provide low-complexity, low-cost, low-power, and low-heat solutions for building the next-generation wireless communication systems in the sub-terahertz frequency and even terahertz band.

Growth and mobility characterization of N-polar AlGaN channel high electron mobility transistors

All-AlGaN based high electron mobility transistors (HEMTs) are promising for increasing the power density in both RF and power devices, improving overall efficiency. Nitrogen (N) polar GaN/AlGaN HEMTs offer lower contact resistance compared to its metal-polar counterpart. In this work, we report the metal organic chemical vapor deposition (MOCVD)-based growth of N-polar AlGaN channel HEMT structures with a varying Al mole fraction in the AlxGa1−xN channel (x = 20%, 30%, 59%, and 73%). We confirmed the high-quality morphology and the Al composition of the grown structures using atomic force microscopy and x-ray diffraction spectra, respectively. We measured a mobility of ∼160 cm2/(V.s) in our N-polar AlGaN HEMT stack (20% Al in the channel) structure and found an alloy-scattering dominated transport with increasing Al mole fraction, further supported by our simulations that consider both alloy-scattering and optical phonon-scattering mechanisms. From 20% to 59% Al composition, we found a decreasing trend in mobility while for 59%–73% Al composition in the channel, both the simulated and the experimental mobility showed a nearly saturating trend. The structures were then fabricated into HEMTs with Al0.20Ga0.80N (channel)/Al0.59Ga0.41N (barrier), showing 320 mA/mm drain current for a 4 μm long-channel device.

Advancing osmotic power generation using bioinspired MXene-based membrane via maze breaking

The osmotic energy generated by the salinity gradient between seawater and river water is a potential blue energy that can be harnessed to alleviate the current energy crisis but without causing environmental pollution. Two dimensional (2D) MXene nano sheets can be horizontally assembled into laminar membranes to create nanochannels enabling the ionic selective transport and thus to capture the osmotic energy. However, the ions have to transport through the maze-like tortuous laminar channels sourced from the interspaces between two neighboring nanosheets, which lead to super-high transport resistance and low power density, hindering their wide applications. Enlightened by the water and mineral ions transport in trees, here, a bioinspired MXene-based membrane with aligned and ordered vertical channels is developed for efficient osmotic power generation from salinity gradient. The peak power density of the electrical devices composed of such maze-breaking membranes could be achieved up to 372 W m−2, which is at least one order of magnitude higher than conventionally horizontal membranes reported in the literature. The high-power generation efficiency was attributed to the shortened ionic transport path (by breaking the maze). Moreover, the membrane possesses a high antifouling performance as well as long-term stability, possibly due to the strong combination of MXene and GO via the hydrogen bonds and cross-linking in preparation. This work reports a new and high-performance MXene-based membrane not only for osmotic energy conversion but also for other practical separations.

Designed nanoarchitectonics and fabrication of Ni(OH)2/MWCNT/CNF electrode for asymmetric hybrid supercapacitor applications

The creation of ternary composite materials with innovative structures is crucial for enhancing the energy density and stability of supercapacitor devices. In this study, Ni(OH)2-based ternary composites were successfully synthesized using a straightforward hydrothermal method. Comprehensive analyses of structure, morphology, surface area, and binding energy were conducted using powder X-ray diffraction, scanning electron microscopy, transmission electron microscopy, and X-ray photoelectron microscopy. The electrochemical performance of the Ni(OH)2/MWCNT/CNF electrode displayed a higher specific capacitance of 882 F g−1 and lower resistance compared to pure Ni(OH)2 electrodes. An asymmetric supercapacitor device, assembled with the chosen Ni(OH)2/MWCNT/CNF and activated carbon (AC), exhibited energy and power densities of 47.5 Wh kg−1 and 750 W kg−1, along with 83.42 % capacitance retention after 5000 charge-discharge cycles. These outstanding results confirm the potential of this material as an exceptional electrode for future supercapacitor applications.

5G and Companion Technologies as a Boost in New Business Models for Logistics and Supply Chain

The transport and logistics industry plays a crucial role in supporting the economy, but it faces various challenges, including high costs and the need for operational efficiency. To address these challenges, the industry is embracing digital transformation, and 5G networks are expected to play a significant role in this process. This paper explores the benefits of 5G technologies in the transportation and logistics sector, focusing on device density, low latency, network slicing, supply chain visibility, port operations, and enhanced communication. Additionally, the paper emphasizes the importance of stakeholder engagement and sustainability considerations in the adoption of innovative technologies. The research methodology involves an online survey administered to stakeholders in the port logistics sector, aiming to assess their knowledge and implementation of innovative technologies. The paper also reviews the relevant literature and highlights the potential of digital technologies, such as IoT, blockchain, AI, and 5G, in optimizing supply chains and port operations. The findings provide insights into the current state of knowledge and implementation of innovative technologies in port operations and the potential for market adoption and contribute to understanding the benefits and challenges of 5G technology in the logistics industry.

Design and Simulation of Phase Synchronizer for Adiabatic Quantum Flux Parametron Circuits

An adiabatic quantum flux parametron (AQFP) is a two-terminal superconducting device capable of amplifying or inverting digital input signals at near-kT energy dissipation. This ultra-low power device is desirable for myriad reasons, including high performance accelerator applications as CMOS processors become more and more limited by energy consumption. Promising performance results have been realized on AQFP processors; however, scaling these results to larger computing systems faces engineering challenges due to device density and power distribution. AQFP circuits require a multi-phase activation signal to propagate logic. If data is not properly aligned with the activation phase, it can be dropped or shifted to an incorrect phase and disrupt circuit operation. This work presents design and simulation of an activation phase synchronizer: a simple circuit that will accept data arriving on any phase and re-align it to a known phase of the subsequent cycle. The phase synchronizer can be useful for mitigating clock skew across clock domains or play an important role in asynchronous design where the arrival time of data may be unknown.

Adsorption of DNA nucleobases on single-layer Ti3C2 MXene and graphene: vdW-corrected DFT and NEGF studies.

We investigated the interaction of DNA nucleobases [adenine (A), guanine (G), thymine (T), and cytosine (C)] with single-layer Ti3C2 MXene using Van der Waals (vdW)-corrected density functional theory and non-equilibrium Green's function methods. All calculations were benchmarked against graphene. We showed that depending on the initial vertical height of a nucleobase above the Ti3C2 surface, two interaction mechanisms are possible, namely, physisorption and chemisorption. For graphene, DNA nucleobases always physisorbed onto the graphene surface irrespective of the initial vertical height of the nucleobase above the graphene sheet. The PBE+vdW binding energies for graphene are high (0.55-0.74eV) and follow the order G > A > T > C, with adsorption heights in the range of 3.16-3.22 Å, indicating strong physisorption. For Ti3C2, the PBE+vdW binding energies are relatively weaker (0.16-0.20eV) and follow the order A > G = T > C, with adsorption heights in the range of 5.51-5.60 Å, indicating weak physisorption. The binding energies for chemisorption follow the order G > A > T > C, which is the same order for physisorption. The binding energy values (5.3-7.5eV) indicate very strong chemisorption (∼40 times larger than the physisorption binding energies). Furthermore, our band structure and electronic transport analysis showed that for physisorption, there is neither significant variation in the band structure nor modulation in the transmission function and device density of states. The relatively weak physisorption and strong chemisorption show that Ti3C2 might not be capable of identifying DNA nucleobases using the physisorption method.

Structure and the Thermal Management of a 3-D Silicon Carbide MOSFET Module

Silicon carbide (SiC) device has higher switching frequency, higher breakdown voltage, and lower on-state voltage drop, which makes it subversive potential in the high power density applications. However, the traditional packaging structure cannot cope with the high power density of SiC devices, so the existing commercial SiC power module can only be used in derating applications. This paper proposed a 3-D packaging design method for high power density MOSFET power module, in which the cooling system is integrated inside the module to reduce the thermal resistance and the temperature difference of the SiC MOSFET chips. At the same time, the heat dissipation process of the new structure is modeled and analyzed, and the accuracy of the model is proved by experiment and simulation.

MXene@ carbonized wood monolithic electrode with hierarchical porous framework for high-performance supercapacitors

Bulk electrodes with sufficient electrochemically active substances promote the enhanced energy density of energy storage devices. Additionally, the pore structure and wettability regulation of the electrodes are key factors in determining the electrochemical performance of the device. Herein, a monolithic electrode (CW/MXene) with a dual utilization strategy for the hierarchical porous structure of carbonized wood (CW) and the high electrical conductivity as well as wettability of MXene was proposed. The combination of MXene and CW provides a hierarchical pore structure with enhanced wettability to the electrolyte to complete the electrochemical reaction. CW/MXene showed the impressive electrochemical performance of 14.48 F cm−2 (203.94 F g−1) at a current density of 1 mA cm−2. Moreover, the obtained symmetric supercapacitor exhibits high areal/specific capacitances of 4.24 F cm−2 (80.61 F g−1) at 1.0 mA cm−2 and high energy densities of 0.589 mWh cm−2/11.2 Wh kg−1. This work provides advanced multiple utilization and excellent electrochemical performance for ultra-thick carbonized wood electrode applications in supercapacitors.

Improved prediction for failure time of multilayer ceramic capacitors (MLCCs): A physics-based machine learning approach

Multilayer ceramic capacitors (MLCC) play a vital role in electronic systems, and their reliability is of critical importance. The ongoing advancement in MLCC manufacturing has improved capacitive volumetric density for both low and high voltage devices; however, concerns about long-term stability under higher fields and temperatures are always a concern, which impact their reliability and lifespan. Consequently, predicting the mean time to failure (MTTF) for MLCCs remains a challenge due to the limitations of existing models. In this study, we develop a physics-based machine learning approach using the eXtreme Gradient Boosting method to predict the MTTF of X7R MLCCs under various temperature and voltage conditions. We employ a transfer learning framework to improve prediction accuracy for test conditions with limited data and to provide predictions for test conditions where no experimental data exists. We compare our model with the conventional Eyring model (EM) and, more recently, the tipping point model (TPM) in terms of accuracy and performance. Our results show that the machine learning model consistently outperforms both the EM and TPM, demonstrating superior accuracy and stability across different conditions. Our model also exhibits a reliable performance for untested voltage and temperature conditions, making it a promising approach for predicting MTTF in MLCCs.

Ultra-fine microstructure and exceptional low coercivity developed in a high-Bs Fe-Si-B-P alloy by co-alloying Ni, Mo, and Cu

Designing soft magnetic alloys with high saturation magnetic induction (Bs) is of great importance for improving the power density of electric and electronic devices. For high-Bs nanocrystalline alloys, the main problem is the grain coarsening effect induced by high Fe content (>80 at.%), which deteriorates the soft magnetic properties. In present work, we designed new Fe-based nanocrystalline alloys by microalloying a Fe-Si-B-P alloy. The co-alloying of Ni, Mo, and Cu effectively refines the microstructure of nanocrystalline alloys from 28.5 nm to 13.1 nm and increased the stability of soft magnetic properties. Even though there are 28-nm-large surface crystallites in the amorphous precursors, an exceptional low coercivity of 1–2 A/m with a high Bs of 1.81 T was developed after nanocrystallization. These excellent magnetic properties could be maintained within a wide annealing temperature window of 50 K and an annealing time window up to 600 s for high heating rate annealing.

Pristine and modified silicene based volatile organic compound toxic gas sensor: a first principles study

In this work, we have investigated the sensitivity of two Volatile Organic Compounds (VOCs), formaldehyde (FD) and acetaldehyde (AD) on the surface of two-dimensional (2D) Armchair Silicene Nanoribbon (ASiNR) by analysing the structural, electronic and transport properties using density functional theory (DFT) and non-equilibrium Green's function (NEGF) formalism. Different models of ASiNR have been considered viz; pristine, Al-doped, P-doped, Al/P co-doped and vacancy-defected ASiNR. The findings revealed that the vacancy-defected models shows a significant increase in the adsorption energies for both VOCs compared to other models. Apart from that, in all the models, the current increases with the applied voltage and the maximum value of current was found in Al/P co-doped model at a higher bias voltage of 2 V. The variation of the computed transmission spectrum peaks from −2 to 2 eV of energy values also confirms the sensitivity of the proposed models towards the VOC molecules. Moreover, the projected device density of states (PDDOS) revealed that all the models remain semiconducting before and after adsorption, which completely agrees with the transmission spectrum. Furthermore, Al/P co-doped model shows high sensitivity of 68% and77% towards FD and AD molecules respectively. Thus, it is concluded that the modeled ASiNR VOC gas sensors will aid in sensing cancer.