Development Of Semiconductor Technology Research Articles

Pressure induced semiconductor-like to metal transition and linear magnetoresistance in Cr2S2.88 single crystal.

The transition metal chalcogenide Cr2S3-x has unique properties, such as a lower antiferromagnetic transition temperature, semiconducting behavior, and thermoelectric properties. We focus on the effects of high pressure on the properties of electrical transport and structure in the single crystal Cr2S2.88. It is observed that the resistance drops abruptly by approximately two orders of magnitude and the temperature derivative of the resistance changes from negative to positive after 15.7 GPa. The Cr2S2.88 crystal has undergone transitions from a semiconductor-like phase to a metal I phase and then to another metal II phase. Simultaneously, a structural phase transition after 16.1 GPa is confirmed by synchrotron angle dispersive X-ray diffraction (AD-XRD). After the structural phase transition, the negative magnetoresistance becomes positive with increasing pressure and shows a linear relationship in the metal II phase. Electron-type carriers dominate in the semiconductor-like phase, but hole-type carriers dominate after the structural phase transition. Our work provides an example of the effective modulation of semiconductor-like properties by pressure, which is meaningful for the innovation and development of semiconductor technology.

Systematic Analysis on The Development and Potential Use of Novel Semiconductors

Silicon-based transistors and integrated circuits, crucial for modern technology, are facing limitations due to scaling constraints. As transistors shrink, their performance is capped, affecting advanced technologies like AI, IoT, and 5G. Gallium nitride (GaN), with a melting point 200°C higher than silicon, presents a promising alternative due to its superior high-power and high-frequency performance. This essay reviews silicon’s semiconductor limitations and highlights the advancements in silicon carbide and Gan. The basic theories, such as electron mobility, energy level and covalent bond, are analyzed, and it is found that GaN is better than Sic and Si, but the three examples of semiconductors have different development fields in different fields. It compares the benefits of traditional silicon with these novel semiconductors, focusing on high-frequency and high-temperature performance. The essay also discusses current development, issues, and future predictions in semiconductor technology. Exploring new materials like GaN and silicon carbide addresses the technical challenges of silicon and enhances device performance, broadening technological possibilities.

Developing Cost-Effective Digital PET Scanners: Challenges and Solutions

When compared to older analog systems, digital Positron Emission Tomography (PET) scanners provide much improved resolution, sensitivity, and diagnostic capabilities. This represents a major leap in the field of medical imaging. On the other hand, the development of digital PET scanners that are both cost-effective and accessible presents a number of issues that need to be solved in order to make these technologies more accessible and inexpensive. The creation of digital PET scanners that are low-cost is the subject of this research, which investigates the primary obstacles and possible solutions to these problems. Wce at a cheaper cost. In this respect, it is essential to make advancements in scintillator materials, such as the creation of new kinds of crystals that have a higher light output and a lower cost. In addition, developments in semiconductor technology and the incorporation of circuits that are more efficient in terms of cost may contribute to a reduction in the total cost of digital PET scanners. The complexity of the imaging systems, in addition to the high manufacturing costs that are often connected with them, is another key hurdle. In order to process and reconstruct pictures of a high quality, digital PET scanners need the use of complicated hardware setups and advanced software algorithms. A reduction in production costs may be achieved by the use of modular and scalable designs, as well as the streamlining of the design and manufacturing processes. Modular systems make it possible to make gradual improvements and repairs, which may be more cost-effective than replacing complete components that are being replaced.

A Review of Mechanism and Technology of Hybrid Bonding

Abstract With the development of semiconductor technology, traditional flip-chip bonding has been difficult to meet the high-density, high-reliability requirements of advanced packaging technology. As an advanced three-dimensional stacked packaging technology, Cu-SiO2 hybrid bonding technology can achieve high-density electrical interconnection without bumps, which expands the transmission performance and interconnection density of chips greatly. However, the investigation on Cu-SiO2 bonding is far from mature, and many researchers are studying Cu-SiO2 bonding passionately. There are many technologies that use different bonding mechanisms to achieve Cu-SiO2 bonding, which will affect the bonding strength directly. We review the mechanism and research progress of Cu-Cu bonding, SiO2-SiO2 bonding. What is more, we summarize the comparison of bonding conditions and bonding strength of various methods furtherly. According to the bonding mechanism, we propose some economical solutions for low-temperature Cu-SiO2 hybrid bonding, with the aim of providing certain references for the further development of advanced semiconductor packaging.

Benchmarking diamond surface preparation and fluorination via inductively coupled plasma-reactive ion etching

Diamond, renowned for its exceptional semiconducting properties, stands out as a promising material for high-performance power electronics, optics, quantum, and biosensing technologies. This study methodically investigates the optimization of polycrystalline diamond (PCD) substrate surfaces through Inductively Coupled Plasma Reactive Ion Etching (ICP-RIE). Various parameters, including gaseous species, flow rate, coil power, and bias power were tuned to understand their impact on surface morphology and chemistry. A thorough characterization, encompassing chemical, spectroscopic, and microscopic methods, shed light on the effects of different ICP-RIE conditions on surface properties. CF4/O2 plasma emerged as a viable treatment for achieving smooth PCD surfaces with minimal etch pit formation. Most notably, surface fluorination, a critical aspect of increasing chemical and thermal stability, was successfully accomplished using CF4, SF6, and other F-containing plasmas. The fluorine concentration and surface chemistry variations were studied, with high resolution X-ray Photoelectron Spectroscopy unveiling differences amongst the sp2 C phase, sp3 C phase, C–O, CO, and C–F bonds. Time-of-flight secondary Ion Mass Spectrometry (ToF-SIMS) and depth-profile analysis unveiled a consistent surface fluorination pattern with CF4/O2 treatment. Furthermore, contact angle measurements showcased heightened hydrophobicity. This study provides valuable insights into precise diamond surface engineering, important for the development of future diamond-based semiconductor technologies.

Five-Level Inverter-Fed Model Predictive Current Control for a Five-Phase PMSM Drive

In this paper, a five-level inverter-fed Model Predictive Current Control (MPCC) of Five-Phase Permanent Magnet Synchronous Motor (PMSM) Drive is proposed to enhance the performance of the drive by reducing the torque ripples. The MPCC method provides a good steady-state performance and also this method does not require a weighting factor. Among the various torque ripple minimization techniques, the multilevel inverters attracted more attention in electric drives due to rapid development in semiconductor technology. The performance analysis of a five-level (5L) inverter-fed five-phase PMSM drive is compared with two-level (2L) and three-level (3L) inverter drives under various operational conditions. The effectiveness of the proposed method is analyzed using MATLAB/SIMULINK software and also implemented using a real-time simulator.

A Method for Automatically Predicting the Radiation-Induced Vulnerability of Unit Integrated Circuits.

With the rapid development of semiconductor technology, the reduction in device operating voltage and threshold voltage has made integrated circuits more susceptible to the effects of particle radiation. Moreover, as process sizes decrease, the impact of charge sharing effects becomes increasingly severe, with soft errors caused by single event effects becoming one of the main causes of circuit failures. Therefore, the study of sensitivity evaluation methods for integrated circuits is of great significance for promoting the optimization of integrated circuit design, improving single event effect experimental methods, and enhancing the irradiation reliability of integrated circuits. In this paper, we first established a device model for the charge sharing effect and simulated it under reasonable conditions. Based on the simulation results, we then built a neural network model to predict the charge amounts in primary and secondary devices. We also propose a comprehensive automated method for calculating soft errors in unit circuits and validated it through TCAD simulations, achieving an error margin of 2.8-4.3%. This demonstrated the accuracy and effectiveness of the method we propose.

Computational Optical Scanning Holography

Holographic techniques are indispensable tools for modern optical engineering. Over the past two decades, research about incoherent digital holography has continued to attract attention. Optical scanning holography (OSH) can obtain incoherent holograms using single-pixel detection and structured illumination with Fresnel zone patterns (FZPs). Particularly by changing the size of a detector, OSH can also obtain holograms under coherently illuminated conditions. Since 1979, OSH has continuously evolved. According to the evolution of semiconductor technology, spatial light modulators (SLMs) come to be useful for various imaging fields. By using SLM techniques for OSH, the practicality of OSH is improved. These SLM-based OSH methods are termed computational OSH (COSH). In this review, the configurations, recording and reconstruction methods, and proposed applications of COSH are reviewed.

Fragile Foundations: Tracing Argentina's Semiconductor Saga amid Institutional Turmoil.

This article suggests that the persistent pattern of political and economic instability in Argentina has affected the development of semiconductor technology in Argentina, affecting secure resources, financial stability, and appropriate institutional frameworks. This article reconstructs Argentina's history of semiconductor technology to understand the initial research, development, and production of semiconductor technology and the emergence of the field of electronics knowledge in a peripheral country like Argentina. In-depth interviews with key players and analysis of institutional documents shed light on the achievements of the protagonists and their relationship to the country's political and economic context.

Low noise, analog electrocardiogram signal amplifier for wearable equipment

Due to the rapid development of semiconductor technology, the edges of electronic devices are getting smaller and the power consumption is getting lower and lower 3-op-amp instrumentation amplifier. However, there are still some problems such as excessive power consumption and noise. First, the disadvantages are identified, and then the shortcomings of the specialty are improved. So this design gives a low noise ECG equipment, which shows great performance in reducing noise to 3.94uV and the highest differential gain reaches 36.508376dB. It can be used in watches and other wearable devices for ECG signal detection. At the same time, this project can complete the required requirements and is suitable for some wearable devices. Its successful research could lead to more accurate ECG monitoring and consume less power in wearable devices. More importantly, its emergence brings new development ideas and development directions to ECG equipment, making ECG monitoring convenient and mobile.

Design and Implementation of DDS Signal Generator Based on FPGA

With the rapid development of semiconductor technology, the digital circuit of the control chip gradually replaces the analog circuit of the traditional signal generator, which improves the performance of the signal generator and reduces the cost of research, development and production. This paper proposes a design scheme that takes FPGA chip as the control center. The signal generator system mainly includes DAC module, FPGA module and key module. The system uses Verilog language to develop the sine wave digital signal generation and key switching frequency control logic circuit on FPGA. The frequency control word circuit in the FPGA module provides multiple frequency sine wave selection, and the look-up table circuit realizes the reading of different phases by controlling the read address of the ROM. The 14-bit high-speed DAC module converts the digital signals sent by FPGA into analog signals. The DAC module integrates low-pass filter processing to increase the smoothness of the signal. After testing, the system meets the design requirements.

Design of ECG circuits for wearable devices

Heart diseases have become more and more prominent in recent years. ECG signals can accurately reflect the health of hearts during the detection process. The use of wearable ECG devices requires low power consumption, a high common-mode rejection ratio, and minimal noise. Traditional research has concentrated on lowering the circuit's overall power dissipation, which typically results in less current flowing through the amplifier but higher circuit noise. Therefore, this places higher demands on the amplifier in the circuit. Electronic devices are becoming smaller due to the rapid development of semiconductor technology. Amplifiers designed for semiconductor devices can effectively solve the problems mentioned above. The circuit created in this study has a low power need, a high common-mode rejection ratio, is compact, has a high input impedance, and has a low input-referred noise level. In addition, LT-Spice software was used to design and simulate the circuit, and the results were analyzed and calculated accordingly. The circuit meets the requirements of the project design. The frequency range of the circuit is 1mHz - 227.9Hz. The differential gain of the circuit is 36.6dB. The integrated input-fred noise is 3.94uV. The total consumption of electricity is 4.67W. These data indicate that the circuit has a high gain in the frequency range of ECG signals, which can filter out other interference signals. It also solves the problems of power consumption and noise.

Research on heavy ion irradiation effects on SOI SRAM

SRAM based on SOI devices has been widely used in aerospace storage devices due to its good electrical characteristics and radiation resistance. However, with the development of semiconductor technology, the feature size of devices continues to shrink, and the irradiation effects of high-energy ions have become increasingly serious. Single event effect has become the biggest threat to the failure of the spacecraft. A mixed-simulation method was used to research the heavy ion irradiation effects on SOI SRAM. SRAM consists of two coupled inverters. Firstly, the voltage changes of the inverter and SRAM output nodes under heavy ion irradiation were compared and analyzed, then the influence of the device itself and heavy ion parameters on the single particle flipping effect of the SRAM is investigated, and finally the necessary conditions for the flipping of the stored information in the SRAM are discussed and derived. The results show that heavy ion incidence does not permanently change the final state of the inverter; devices in the off state in the SRAM will undergo information flipping only when they are irradiated by heavy ions, and the threshold voltage of the N-type MOSFET is lower than that of the P-type MOSFET; an increase in the penetration depth will accelerate the flipping speed of the SRAM, but when the LET is high, the influence of the penetration depth on the flipping speed decreases; the change of the stored information in the SRAM is the result of the combined effect of pulse width and pulse height.

Accurate Prediction and Reliable Parameter Optimization of Neural Network for Semiconductor Process Monitoring and Technology Development

Herein, novel neural network (NN) methods that improve prediction accuracy and reduce output variance of the optimized input in the gradient method for cross‐sectional data are proposed, and the variability evaluation approach of optimized inputs in the semiconductor process is suggested. Specifically, electrical parameter measurements (EPMs) and power‐delay product of industrial high‐k metal gate DRAM peripheral 29‐stage ring oscillator circuits, including NMOS, PMOS, and interconnects, are focused on. The proposed methods find an optimized input to achieve a lower NN output variance in the gradient descent than one multilayer perceptron (MLP) and mean ensemble of MLPs even when considering the variabilities of the devices and interconnects. The local optima problem of one MLP is resolved by utilizing multiple MLPs trained with different train/validation data, their trimmed mean, and an additional learnable layer. Moreover, adding the learnable layer secures versatility for various parametric datasets. The methods improve the prediction accuracy (R2) by 5.6–15.6% in sparse data space compared to one MLP and the mean ensemble, decrease the NN output variance of the optimized input by 73.0–81.6% compared to one MLP and the mean ensemble, and are successfully verified by implementing it on EPMs of 3977 test patterns of 314 wafers and 16 lots.

LARGE-SCALE SYNTHESIS OF HOMOGENEOUS WS2 FILMS BY PHYSICAL VAPOR DEPOSITION

TMDs are semiconductors, unlike graphene, and have a direct bandgap when converted from bulk to thin film. This property makes TMDs an ideal material for optoelectronic and photovoltaic applications due to their strong optical absorption and photoluminescence effect. The WS2, a popular TMD, has unique properties such as low friction coefficient, high thermal stability, and good electrical conductivity, and a bandgap energy of approximately 1.2 eV and 2.2 eV for indirect and direct behaviors. The article also discusses various methods for synthesizing WS2, including chemical vapor deposition (CVD), physical vapor deposition (PVD), hydrothermal synthesis, and solvothermal synthesis. PVD is a scalable method for producing large-area films and coatings with high quality, but the difficulty of controlling the sulfur or selenium sources in this method leads to the need for optimizing growth parameters for large-scale and high-quality WS2 film synthesis. The study reports the successful growth of large-scale and homogeneous WS2 films on a glass substrate using PVD and optimized substrate temperature. The results of this study provide valuable information for the advancement of WS2 film growth techniques and the development of WS2-based semiconductor technologies, such as transistors, diodes, photodetectors, and solar cells.

A Physics-Informed Automatic Neural Network Generation Framework for Emerging Device Modeling.

With the rapid development of semiconductor technology, traditional equation-based modeling faces challenges in accuracy and development time. To overcome these limitations, neural network (NN)-based modeling methods have been proposed. However, the NN-based compact model encounters two major issues. Firstly, it exhibits unphysical behaviors such as un-smoothness and non-monotonicity, which hinder its practical use. Secondly, finding an appropriate NN structure with high accuracy requires expertise and is time-consuming. In this paper, we propose an Automatic Physical-Informed Neural Network (AutoPINN) generation framework to solve these challenges. The framework consists of two parts: the Physics-Informed Neural Network (PINN) and the two-step Automatic Neural Network (AutoNN). The PINN is introduced to resolve unphysical issues by incorporating physical information. The AutoNN assists the PINN in automatically determining an optimal structure without human involvement. We evaluate the proposed AutoPINN framework on the gate-all-around transistor device. The results demonstrate that AutoPINN achieves an error of less than 0.05%. The generalization of our NN is promising, as validated by the test error and the loss landscape. The results demonstrate smoothness in high-order derivatives, and the monotonicity can be well-preserved. We believe that this work has the potential to accelerate the development and simulation process of emerging devices.

TCAD-Enabled Machine Learning—An Efficient Framework to Build Highly Accurate and Reliable Models for Semiconductor Technology Development and Fabrication

The requirements on data-driven Machine Learning models for industrial applications are often stricter, compared to those used for academic purposes, as model reliability is critical in industrial environments. Herein is introduced a framework which enables automated data generation with the goal of efficiently providing a data set sufficient to build a reliable and actionable model. Essential to this framework is the placement of the model training/testing data points, which need to be well distributed across the defined input parameter space. The framework is applied to semiconductor fabrication, wherein TCAD, a set of simulation tools that reproduce the physical processing and the final electrical performance of semiconductor devices, is a well-established capability. Transistor-level processing data is reproduced with TCAD simulations, from which the Machine Learning model is built. The framework described here assures that the resulting Machine Learning model fulfills the accuracy requirements across the parameter space. As an example application, the final Machine Learning model is then used to modify the process for a transistor, to obtain both better electrical performance and reduced variability.

Design and Implementation of an Automatic Test and Verification System for SoC

With the development of semiconductor technology in recent years, the design of SoC has become more and more complex. [1]In order to ensure the correctness of chip design and the success rate of chip taping out, the verification test of SoC becomes more and more important. This paper designs an automated test and verification system based on STM32 and analog switch matrix chips. The system has high reusability, good scalability, convenient maintenance and automated test, and can improve the efficiency of test and verification, reduce the cost and shorten the development cycle of SoC.

Quartz sand is an affordable inexpensive raw material for technologies of electronics and photovoltaics

Based on the analysis of modern methods for obtaining semiconductor silicon, critical factors influencing the prospects for the development of the industry are identified. The basic component of the production scheme for producing silicon of semiconductor quality today is the carbothermal technology for producing metallurgical silicon. The dominance of this scheme is largely dictated by economic reasons for the development of capital-intensive industries. The accumulation of objective needs over time predetermine the need to overcome the inertial barrier of evolutionary steps in the development of semiconductor quality silicon technology.
 First of all, the problems of raw material supply and high energy intensity of traditional production processes are actualized. The task is formulated in the direction of searching for a source of raw materials that removes in the time perspective the problems of ensuring a potential increase in the volume of production of semiconductor quality silicon, as well as the problems of energy supply for this growth process. As a promising solution, a method is proposed for obtaining silicon of semiconductor quality directly from quartz sand, excluding the use of expensive and scarce quartzites and charcoal. The prospects for quartz sand as a raw material replacing quartzite are objectively predetermined by the high similarity of the physicochemical characteristics of these materials. The objective prerequisites for the process of replacing quartzite are supported by the existing practice of testing the proposed technological solutions on an industrial scale.For this purpose, low energy-intensive processes for the production and purification of silanes, utilization and reversal of intermediate technological products are used. The energy efficiency of the method is ensured by the exclusion from the technology of a large-tonnage, energy-intensive process for obtaining metallurgical silicon, as well as energy-consuming methods associated with the use of low temperatures (–30 ... –80 ° C). The technological solution eliminates the need for the synthesis of hydrogen chloride and, accordingly, eliminates the explosive high-temperature process from production. The proposed solutions open up possibilities for the variable use of known technologies in relation to the current consumer requirements for the quality of polycrystalline silicon.

Integration of Self-Passivated Topological Electrodes for Advanced 2D Optoelectronic Devices.

With the rapid development of two-dimensional semiconductor technology, the inevitable chemical disorder at a typical metal-semiconductor interface has become an increasingly serious problem that degrades the performance of 2D semiconductor optoelectronic devices. Herein, defect-free van der Waals contacts have been achieved by utilizing topological Bi2 Se3 as the electrodes. Such clean and atomically sharp contacts avoid the consumption of photogenerated carriers at the interface, enabling a markedly boosted sensitivity as compared to counterpart devices with directly deposited metal electrodes. Typically, the device with 2D WSe2 channel realizes a high responsivity of 20.5AW-1 , an excellent detectivity of 2.18×1012 Jones, and a fast rise/decay time of 41.66/38.81ms. Furthermore, high-resolution visible-light imaging capability of the WSe2 device is demonstrated, indicating its promising application prospect in future optoelectronic systems. More inspiringly, the topological electrodes are universally applicable to other 2D semiconductor channels, including WS2 and InSe, suggesting its broad applicability. These results open fascinating opportunities for the development of high-performance electronics and optoelectronics.