RF Circuit Design Research Articles

Rapid EM-Driven Design of Compact RF Circuits By Means of Nested Space Mapping

A methodology for rapid design of RF circuits constituted by compact microstrip resonant-cells (CMRCs) is presented. Our approach exploits nested space mapping (NSM) technology, where the inner SM layer is used to correct the equivalent circuit model at the CMRC level, whereas the outer layer enhances the coarse model of the entire structure under design. We demonstrate that NSM dramatically improves performance of surrogate-based optimization of composite CMRC-based structures. It is validated using four examples of UWB microstrip matching transformers (MTs) and compared to previous attempts to surrogate-based compact structure design.

Next generation wireless networks - Especially the use of milli-microwave bands [Guest Editorial

The global bandwidth shortage of wireless communications has motivated the exploration of the millimeter wave (mm-wave) frequency spectrum for the next generation wireless communications. Recent advances in RF CMOS technology and high speed baseband signal processing technologies have enabled the extensive research and development of mm-wave wireless communications. The multi gigabit per second data rate of mm-wave system will lead to applications in many important scenarios, such as WPAN, WLAN, back-haul for cellular system. And the frequency bands include 28 GHz, 38 GHz, 45GHz, 60GHz, E-BAND, and even beyond 100 GHz. The propagation and the limitation of the RF circuits design in these frequency bands make the directional antennas be inevitable for mm-wave communications. So, the system design and implementation are challengeable and are much different from the lower bands. The goal of this Special Topic Issue is to explore research and developments related to mm-wave communications to further its state of art.

Wireless Power Transmission: R&D Activities Within Europe

Wireless power transmission (WPT) is an emerging technology that is gaining increased visibility in recent years. Efficient WPT circuits, systems and strategies can address a large group of applications spanning from batteryless systems, battery-free sensors, passive RF identification, near-field communications, and many others. WPT is a fundamental enabling technology of the Internet of Things concept, as well as machine-to-machine communications, since it minimizes the use of batteries and eliminates wired power connections. WPT technology brings together RF and dc circuit and system designers with different backgrounds on circuit design, novel materials and applications, and regulatory issues, forming a cross disciplinary team in order to achieve an efficient transmission of power over the air interface. This paper aims to present WPT technology in an integrated way, addressing state-of-the-art and challenges, and to discuss future R&D perspectives summarizing recent activities in Europe.

RF and Microwave Hardware Challenges for Future Radio Spectrum Access

Radio technology for future broadband wireless applications presents a remarkable research opportunity for the RF transceiver and circuit design community. A survey is presented of the low-noise amplifier, frequency conversion, filtering, and transmitter techniques that are being explored for future wireless devices that require wide tuning range, flexible modulation formats, low dc power, and low cost. In all cases, the traditional disadvantages of broadband design approaches can be mitigated by taking advantage of higher levels of integration afforded by CMOS and BiCMOS technologies and improved circuit design approaches.

(Invited) Parastic Elements in Gate Stacks and Contacts of Planar and Fin Transistors

Reduction of dimensions or scaling has reduced cost and enhanced performance of integrated circuits. These reduced dimensions have increased the importance of parasitic elements associated with the gate structure and contact structure to rf circuit design and more recently to microprocessors, standard products, and application specific integrated circuits. The net lists and compact models must account for the physical structure to enable scalability, must be efficient to enable circuit design and must be verifiable through hardware measurement. The hardware measurements can serve as a diagnostic tool for enhancing process technology of planar and FINFET field effect transistors.

RF-Noise Modeling in Advanced CMOS Technologies

RF circuit design in deep-submicrometer CMOS technologies relies heavily on accurate modeling of thermal noise. Based on Nyquist's law, predictive modeling of thermal noise in MOSFETs was possible for a long time, provided that parasitic resistances and short-channel effects were properly accounted for. In sub-100-nm technologies, however, microscopic excess noise starts to play a significant role and its incorporation in thermal noise models is unavoidable. Here, we will review several crucial ingredients for accurate RF noise modeling, with emphasis on sub-100-nm technologies. In particular, a detailed derivation and discussion are presented of our microscopic excess noise model. It is shown to qualitatively explain the observed noise (across bias and geometry) in a wide range of commercially available sub-100-nm foundry processes. Besides, the impact of excess noise on the minimum noise figure is discussed.

BSIM6: Analog and RF Compact Model for Bulk MOSFET

BSIM6 is the latest industry-standard bulk MOSFET model from the BSIM group developed specially for accurate analog and RF circuit designs. The popular real-device effects have been brought from BSIM4. The model shows excellent source-drain symmetry during both dc and small signal analysis, thus giving excellent results during analog and RF circuit simulations, e.g., harmonic balance simulation. The model is fully scalable with geometry, biases, and temperature. The model has a physical charge-based capacitance model including polydepletion and quantum-mechanical effect thereby giving accurate results in small signal and transient simulations. The BSIM6 model has been extensively validated with industry data from 40-nm technology node.

A high-bandwidth amplitude estimation technique for dynamic mode atomic force microscopy

While often overlooked, one of the prerequisites for high-speed amplitude modulation atomic force microscopy is a high-bandwidth amplitude estimation technique. Conventional techniques, such as RMS to DC conversion and the lock-in amplifier, have proven useful, but offer limited measurement bandwidth and are not suitable for high-speed imaging. Several groups have developed techniques, but many of these are either difficult to implement or lack robustness. In this contribution, we briefly outline existing amplitude estimation methods and propose a new high-bandwidth estimation technique, inspired by techniques employed in microwave and RF circuit design, which utilizes phase cancellation to significantly improve the performance of the lock-in amplifier. We conclude with the design and implementation of a custom circuit to experimentally demonstrate the improvements and discuss its application in high-speed and multifrequency atomic force microscopy.

Optimization of Inkjet Printing of Patch Antennas on Low-Cost Fibrous Substrates

In this letter, the inkjet-printing procedure is used to implement microwave circuits on low-cost fibrous substrate, cardboard. As a first step for environmentally friendly electronics applications, the high-frequency properties of the cardboard substrate are extracted using the two-transmission-line method and dielectric probe measurement. To provide an accurate model for the inkjet-printed conductors, the conductivity and thickness of the printed silver traces are analyzed. The surface of the substrate is pretreated using a dielectric ink to reduce the penetration of the conductor ink into the fibrous substrate and to diminish the conductor loss at high frequencies. As a technology demonstrator, a patch antenna is printed on a cardboard substrate, and the simulation and measurement results are compared to study the reliability of the obtained parameters. After initial experimental verification, simulation models were fine-tuned in order to provide a predictive method for design and fabrication of low-cost RF circuits. The achieved model can be used to design and fabricate low-cost RF structures on fibrous environmentally friendly substrates .

Lower Power Design for UHF RF CMOS Circuits Based on the Power Consumption Acuity

Excessive energy consumption of UHF tag is the bottleneck of energy saving in its wide range of applications. To address this issue, a lower power design for UHF RF CMOS circuits based on power consumption acuity is proposed in this paper. Through in-depth analysis of the static and dynamic power generation principle of UHF RF circuits in the work, the power consumption acuity can be calculated by using the correlation of circuit power and input vector. Subsequently, under the guide of this acuity, the UHF RF CMOS circuits with better energy saving can be designed. Furthermore, according to the performance indicators of EPC CIG2 UHF RFID in UHF identification, the corresponding circuit is designed and implemented. The test results show that the design of UHF RF circuit based on the acuity of power consumption can reduce 35%–40% power consumption.

Recent progress in CMOS RF circuit design

Recent progress in CMOS RF circuit design

Introduction to the special issue on IEEE-NEWCAS 2012

This special issue of Analog Integrated Circuits and Signal Processing (ALOG) includes the extended version of a limited number of papers that were originally presented at the IEEE International NEWCAS 2012 conference, held in Montreal (Canada) on June 18–21, 2012. Since its birth, the NEWCAS conference has consistently grown to become a premiere venue where highly innovative circuit and system techniques have been presented for the first time. The conference covers a wide variety of subjects including analog and RF circuit design, digital and mixed-signal integrated circuits, computer architecture, signal processing, sensors, encompassing a broad range of applications such as telecommunications, imaging and vision, safety, energy and biomedical. In the 2012 NEWCAS edition, the submissions reached the record number of 314 from 43 countries from all over the world. After a rigorous review process, 138 contributions were accepted for presentation. The 43 % acceptance rate is the lowest ever recorded at NEWCAS. This accomplishment fits well the general trend of high and yet increasing quality of the conference, which has been inspired this year by the vision of the NEWCAS2012 General Chairs, Prof. Mounir Boukadoum and Prof. Mohamad Sawan. Among the contributions published in the NEWCAS2012 proceedings, 22 papers were selected and invited for submission to this special issue. After the review process, 14 papers have been accepted for publication on this special issue. In this selection, many other fine contributions would have reserved publication on this issue, but the limited number of pages did not allow it. The contributions included in this special issue address various challenges that are within the scope of NEWCAS, as listed below:

Understanding Leaky-Wave Structures: A Special Form of Guided-Wave Structure

Guided-wave structures are the foundation for the design and development of RF and microwave circuits and systems. Whether it is planar or nonplanar, periodic or straight, a guided-wave structure, which consists of metallic and/or dielectric composite building blocks, is used to support signal propagation and processing. Except for free-space propagation, diffraction and scattering in an open medium or space, microwave energy is usually transferred by means of specially designed guided-wave structures with modal propagation behavior that are fundamentally characterized by a propagation constant and transmission loss with respect to specific guided-wave modes. Those modes are structure and frequency dependent, and satisfy the boundary conditions of a guided-wave structure. Guided-wave structures can be divided into two kinds, open and closed. The completely closed structures are known to support only the wave guided therein, while the open structure, including semi-open or partially open structures, are subject to a potential gradual wave leakage along the propagation path. Wave leakage is always related to wave guidance, which is very much dependent on a number of factors including structural geometry, fill materials, operating frequency and guided mode. Such leakage can be used positively to develop a leaky-wave structure called a leaky-wave antenna, which enjoys some distinctive properties such as beam-scanning with frequency. Leaky-wave radiating structures are easily fabricated at millimeter wave frequencies compared with other antennas. Although leaky-wave and guided-wave structures have similar characteristics and can be designed by common methods, the simulation and design of leaky-wave structures are usually much more complicated. This is because leaky-wave structures are not closed and their attenuation constant related to leakage needs to be considered. In this article, we focus on the presentation of basic operating principles and special features of positive leaky-wave structures (leaky-wave antennas) ranging from straight to periodic geometries.

Narrow-Width Effect on High-Frequency Performance and RF Noise of Sub-40-nm Multifinger nMOSFETs and pMOSFETs

The impact of narrow-width effects on high-frequency performance like fT, fMAX, and RF noise parameters, such as NFmin and Rn, in sub-40-nm multifinger CMOS devices is investigated in this paper. Narrow-oxide-diffusion (OD) MOSFET with smaller finger width and larger finger number can achieve lower Rg and higher fMAX. However, these narrow-OD devices suffer fT degradation and higher NFmin, even with the advantage of lower Rg. The mechanisms responsible for the tradeoff between different parameters will be presented to provide an important guideline of multifinger MOSFET layout for RF circuit design using nanoscale CMOS technology.

Metamaterials for Wireless Communications, Radiofrequency Identification, and Sensors

This paper is focused on the application of concepts derived from metamaterials to the development of novel devices, circuits, and antennas of interest in wireless communications, radiofrequency identification (RFID), and sensors. Specifically, it is shown that artificial transmission lines based (or inspired) on metamaterials exhibit interesting properties, useful for the implementation of high-performance and compact devices as well as novel functional devices. Thanks to the presence of reactive loading elements in such artificial lines, the main line parameters, that is, the characteristic impedance and the phase constant, can be engineered. This has opened new paths for RF and microwave circuit and antenna design on the basis of impedance and dispersion engineering.

High-Efficiency Harmonically Terminated Diode and Transistor Rectifiers

This paper presents a theoretical analysis of harmonically terminated high-efficiency power rectifiers and experimental validation on a class-C single Schottky-diode rectifier and a class- <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">${\hbox{F}}^{-1}$</tex></formula> GaN transistor rectifier. The theory is based on a Fourier analysis of current and voltage waveforms, which arise across the rectifying element when different harmonic terminations are presented at its terminals. An analogy to harmonically terminated power amplifier (PA) theory is discussed. From the analysis, one can obtain an optimal value for the dc load given the RF circuit design. An upper limit on rectifier efficiency is derived for each case as a function of the device on-resistance. Measured results from fundamental frequency source–pull measurement of a Schottky diode rectifier with short-circuit terminations at the second and third harmonics are presented. A maximal device rectification efficiency of 72.8% at 2.45 GHz matches the theoretical prediction. A 2.14-GHz GaN HEMT rectifier is designed based on a class- <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${\hbox{F}}^{-1}$</tex></formula> PA. The gate of the transistor is terminated in an optimal impedance for self-synchronous rectification. Measurements of conversion efficiency and output dc voltage for varying gate RF impedance, dc load, and gate bias are shown with varying input RF power at the drain. The rectifier demonstrates an efficiency of 85% for a 10-W input RF power at the transistor drain with a dc voltage of 30 V across a 98- <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\Omega$</tex></formula> resistor.

Study, Modeling and Characterization of Dual-Band LNA Amplifiers Receivers for Wireless Microwaves Communication Systems

The new current design is especially suitable for use in mu lti-standard wireless receiver fo r microwaves communicat ion systems. In recent years, there has been a growing market for dual band transceivers for various wireless standards. This work investigates a novel circuit topology of concurrent Dual-band Low No ise Amplifier (LNA) operates in the 3.9 GHz and 4.48 GHz frequency bands for WLAN applications and may be used for dual band cellular applications. RF circuit designs take two parallel LNAs with a single transistor only, and band-pass filter (BPF) networks are usually used match both the input and output ports at two different bands, are matched to 50Ω without external elements. The transistor ATF1 0136 is chosen for the purpose of high gain and low noise characteristics. Simulat ions of the operation of the amp lifier were performed with the software ADS and Ansoft software and performance of the amplifier were recorded and analyzed. Simulat ion results indicate a Noise Figure NF below 1.5dB and a gain S21 above 11 d B in all frequency bands and also input and output return loss are below -11 d B for all desired frequency band while drawing 2.5mA current fro m a 5V power supply. The chip provides a good basis for the realization of W LAN lo w-cost RF receivers for dual-band operation. These performances situate this receiver among the most competitive low cost and low power RF receivers. All the principles carry out in this work are furthermo re transposable to other frequencies and to other transmission standards.

The Design of the Sensor Node of IOT Based on SIM20

The sensor node is important component part of the Internet Of Things. The sensor node circuit based on SIM20 module was implemented in the paper. The design of the wireless RF circuit and the energy management circuit were described in detail. The reliable link between the sensors and the gate are achieved by the developed product.

A novel co-design and evaluation methodology for ESD protection in RFIC

ESD design of RFIC is a great issue due to the lack of ESD device models and the interactions between ESD protection and core circuits of RFIC. In this paper, a novel co-design methodology incorporating device-level simulation of ESD device and RF circuit design is proposed. In this methodology, the ESD protection is incorporated into RFIC core circuit design by extracting S parameters and constructing table-lookup model of the ESD matching network. By comparing the RF performances with expected targets, the parameters of matching components and ESD device structures are rectified. In addition, the critical parameters of ESD protection are obtained by simulation. The RF-ESD design of a 5.25GHz LNA is used to demonstrate the implementation of this novel approach.

A Simple Charge Model for Symmetric Double-Gate MOSFETs Adapted to Gate-Oxide-Thickness Asymmetry

Surface-potential-based compact charge models for symmetric double-gate metal-oxide-semiconductor field-effect transistors (SDG-MOSFETs) are based on the fundamental assumption of having equal oxide thicknesses for both gates. However, for practical devices, there will always be some amount of asymmetry between the gate oxide thicknesses due to process variations and uncertainties, which can affect device performance significantly. In this paper, we propose a simple surface-potential-based charge model, which is applicable for tied double-gate MOSFETs having same gate work function but could have any difference in gate oxide thickness. The proposed model utilizes the unique so-far-unexplored quasi-linear relationship between the surface potentials along the channel. In this model, the terminal charges could be computed by basic arithmetic operations from the surface potentials and applied biases, and thus, it could be implemented in any circuit simulator very easily and extendable to short-channel devices. We also propose a simple physics-based perturbation technique by which the surface potentials of an asymmetric device could be obtained just by solving the input voltage equation of SDG devices for small asymmetry cases. The proposed model, which shows excellent agreement with numerical and TCAD simulations, is implemented in a professional circuit simulator through the Verilog-A interface and demonstrated for a 101-stage ring oscillator simulation. It is also shown that the proposed model preserves the source/drain symmetry, which is essential for RF circuit design.