DC Voltage Drop Research Articles

Optimizing DFIG‐DC system performance via model predictive control: Torque ripple, DC voltage drop, and THD reduction

AbstractIn this study, two novel control methods are theoretically introduced as direct slip angle control (DSAC) and model predictive direct slip angle control (MPDSAC) for rotor side converter (RSC) of the standalone Doubly‐Fed Induction Generator (DFIG)‐DC system (S‐DFIG‐DC). The numerical analysis of the proposed methods demonstrated that the proposed DSAC method could reduce torque ripple and current harmonics, decrease the output DC voltage drop in fast changes of load condition, and have faster dynamic response. Also, the MPDSAC method could further diminish torque and flux ripple, current harmonics, and output DC voltage drop in sharp changes of load condition compared with the presented DSAC and direct torque control (DTC) methods. The sensitivity analysis of the proposed control methods is investigated at different operating conditions. The performance and usefulness of the DSAC and MPDSAC schemes are verified by various experiments and compared with the conventional DTC method.

Design and Simulation of a System-in-Package Chip for Combined Navigation.

This paper proposes a system-in-package combination navigation chip. We used wire bonding, chip stacking, surface mount, and other processes to integrate satellite navigation chips, inertial navigation chips, microprocessor chips, and separation devices. Finally, we realized the hardware requirements for combined navigation in a 20 mm × 20 mm chip. Further, we performed a multi-physics simulation analysis of the package design. For antenna signals, the insertion loss was greater than -1 dB@1 GHz and the return loss was less than -10 dB@1 GHz. The amplitude of these noises of the signal between the MCU and the IMU was approximately 20%, and the maximum value of the coupling coefficient between signal lines on the top surface was 13.4174%. The ninth mode of the power plane yielded a maximum voltage of 55 mV, and all power delivery networks had a DC voltage drop of less than 2%. The highest temperature in the microsystem was approximately 42 °C. These results show that our design performed well in terms of signal, power, and thermal performance.

A 65 nm CMOS Feedforward Transimpedance Amplifier for Optical Fibers Communications

A series of inductor loads may not be the best design criterion for improvement in circuit performance. In this work, the best compromise so far for the trade-off in power consumption, input referred noise current spectral density, with wide bandwidth, high transimpedance gain and low DC supply voltage is reported. A simulated 65 nm CMOS feedforward transimpedance amplifier is introduced with a series of single PMOS loads instead of a series of inductor loads. A bandwidth of 20.16 GHz with a transimpedance gain of 51.16 dBΩ, an input referred noise current spectral density of 34.3 p A⁄√Hz, a power consumption of 1.052 mW and with a 1V DC supply voltage are presented. In addition, an active inductor load (instead of inductor load) is introduced within the 65 nm CMOS feedforward transimpedance amplifier. A bandwidth of 3.75 GHz with a transimpedance gain of 42.7 dBΩ, an input referred noise current spectral density of 21.4 p A⁄√Hz, a power consumption of 0.66 mW and with a 1V DC supply voltage are reported. This 65 nm CMOS feedforward design process provides enough voltage headrom for gate-to-source terminals in amplifying transistors due to less DC voltage drop across PMOS loads. As a result, this design process consumes the lowest possible power consumption especially with the single PMOS loads as well as with the active inductor load.

Fault ride-through control for the sending-end AC system based on reactive power auxiliary in LCC-MMC hybrid HVDC system

The hybrid HVDC system based on line commutated converter and modular multilevel converter is a feasible method to address the common commutation failure at the receiving end of conventional HVDC systems. At present, project Gezhouba–Shanghai in China is under the demonstration scheme of the conventional receiving end upgrading, which introduces the difficulty in sending-end AC system failure riding through. For this purpose, an electromagnetic simulation model is established in the PSCAD/EMTDC simulation platform firstly, and then a transient analytical expression of DC current is deduced through the system equivalent circuit and verified through the simulation model. The expression deeply reveals the variation pattern of DC current and lays the theoretical foundation for fault ride-through control. Base on this expression, the decreasing level of MMC DC voltage after fault is deduced, however, it is difficult to realize the decreasing of MMC voltage due to the modulation index limitation of DC voltage. In order to solve this problem, this paper uses MMC to absorb reactive power from AC power grid to broaden the range of DC voltage drop. To solve this problem, the reactive power MMC absorbing from the AC power grid is used in this paper to broaden the decreasing range of DC voltage. On this basis, due to the conflict between the rapidity and stability of fault ride-through control, a current ride-through control based on reactive power auxiliary is proposed. This control strategy can dynamically regulate the reactive power transmission between MMC and AC grid according to fault states, assist to reduce the MMC DC voltage, and enable the constant current control so as to realize the sending-end AC system fault ride-through. Finally, the effectiveness of this control is verified with various simulation results. The sending-end AC system fault ride-through control method proposed in this paper has profound project application significance on upgrade transformation for the conventional receiving end.

Multiphysics Analysis and Optimal Design of Compressible Micro-Interconnect for 2.5D/3D Heterogeneous Integration

Compressible Micro-Interconnect (CMI) shows tremendous potential in 2.5D/3D heterogeneous integration due to its outstanding performance in integration, electrical isolation, and thermal management. In this work, an optimal design approach for CMIs is developed based on a coupling framework of multiphysics simulation and particle swarm optimization (PSO). In the framework, the mechanical simulation was conducted firstly to obtain the stress distributions as CMI switched from the initial state to the working position. The contact resistance between CMI and the top pad was modeled and quantitively analyzed. Subsequently, the PSO method was utilized to implement the structural optimization of CMI to improve the performance. Multiphysics simulations of both the original and optimized CMIs were carried out and compared. With the implementation of the optimized CMIs, the contact resistance dropped from 155.3 mΩ to 108.8 mΩ, which brought significant improvement in both DC voltage drop and self-heating effect. The influence of the self-heating effect on the electrical performance of CMI is also discussed qualitatively.

Fast compensation of DC bus voltage drops using modular multilevel converters

For a DC grid using modular multi-level converters (MMCs) fast control of the DC bus is an important requirement. A control design is presented where a sudden DC voltage drop is compensated without any influence on the AC side. Using a suitable pattern in the MMC internal circular currents, the DC current can be adjusted and the MMC can be brought to a new steady state with symmetrised arm energies within few milliseconds.

SQUID ratchet: Statistics of transitions in dynamical localization.

We study occupation of certain regions of phase space of an asymmetric superconducting quantum interference device (SQUID) driven by thermal noise, subjected to an external ac current and threaded by a constant magnetic flux. Thermally activated transitions between the states which reflect three deterministic attractors are analyzed in the regime of the noise induced dynamical localization of the Josephson phase velocity, i.e., there is a temperature interval in which the conditional probability of the voltage to remain in one of the states is very close to one. Implications of this phenomenon on the dc voltage drop across the SQUID are discussed. We detect the emergence of the power law tails in a residence time probability distribution of the Josephson phase velocity and discuss the role of symmetry breaking in dynamical localization induced by thermal noise. This phenomenon illustrates how deterministic-like behavior may be extracted from randomness by stochasticity itself. It reveals another face of noise.

Multi‐objective optimal design of passive power filter for aircraft starter/generator system application

A multi-objective optimisation design method for passive power filter devices is proposed to solve the input current harmonic suppression problem of the aircraft starter/generator system. The parameters of the filter device are optimised by using the particle swarm optimisation algorithm. The proposed algorithm takes harmonic parameters, DC voltage drop, total volume and weight as the optimisation target. With these optimisations, the filter has the minimal volume and weight, while the current harmonic and the DC side voltage drop are able to meet the power quality requirements. This approach improves the filter design procedure with advantages of the reduced amount of calculation. Finally, theoretical analysis and computer simulation validate the effectiveness and viability of the presented algorithm.

The BLIXER, Integrated Balun-LNA-Mixer for ZigBee Application

Objectives: The main objective of this paper is to design a Blixer using noise-cancelling technique and balun –LNA-Mixer for better performance. Methods: As studied in literature of mixers, it shows they have less bandwidth disadvantage. This paper is concentrated to realize a wide bandwidth mixer by keeping the real part of the impedance of all RF nodes low, and using this mixer there is no capacitive loading problem. Findings: By avoiding use of inductors, the on chip size of circuit will be reduced and also the bandwidth extension requirement is fulfilled. This gives less DC-voltage drop after IF filtering. The design is implemented and simulated using Advanced Design System tool in CMOS 0.18um technology. The noise figure of the final BLIXER is obtained as 0.6dB and that of LNA is less than 2dB. This results are one of the best seen for a BLIXER. Applications: This design is well suited for wideband ZigBee receiver in wireless communication systems.

Design and implementation of a rigid-flex RF front-end system-in-package

This paper presents a kind of 3D stacked system-in-package (SiP) for the minimization of the RF front-end system used in a micro base station. The RF SiP, based on a rigid-flex substrate, retains a small volume of 5 cm × 5.25 cm × 0.8 cm, which is almost 95 % reduced from the prototype board. The detail design process is presented including system-in-package design, substrate design and thermal management evaluation. Simulation is performed for the electrical characterization of the substrate and the thermal management evaluation of the package. The simulation results reveal that the insertion loss of the RF signal going through the rigid-flex substrate is controlled under 0.38 dB and the eye diagrams of the differential clock signals meet the requirements. Power distribution network is also well designed since the biggest DC voltage drop is less than 6 mV and the highest current density is 3370 A/cm2, which is much lower than the maximum current-carrying capacity of the conductors with 20 °C temperature rise according to the IPC standard. Also, thermal simulation demonstrates the reliability of this RF SiP because the highest junction temperature reaches 79.3 °C for the normal air convection environment (20 °C) and 91.1 °C for the extreme condition (60 °C) with the forced air cooling method. Junction temperatures of both conditions are below 95 °C, which indicates the proper functioning of active chips in this RF SiP.

Mitigation of commutation failures in LCC–HVDC systems based on superconducting fault current limiters

Commutation failure in line commutated converter based HVDC systems cause severe damages on the entire power grid system. For LCC–HVDC, thyristor valves are turned on by a firing signal but turn off control is governed by the external applied AC voltage from surrounding network. When the fault occurs in AC system, turn-off control of thyristor valves is unavailable due to the voltage collapse of point of common coupling (PCC), which causes the commutation failure in LCC–HVDC link. Due to the commutation failure, the power transfer interruption, dc voltage drop and severe voltage fluctuation in the AC system could be occurred. In a severe situation, it might cause the protection system to block the valves. In this paper, as a solution to prevent the voltage collapse on PCC and to limit the fault current, the application study of resistive superconducting fault current limiter (SFCL) on LCC–HVDC grid system was performed with mathematical and simulation analyses. The simulation model was designed by Matlab/Simulink considering Haenam-Jeju HVDC power grid in Korea which includes conventional AC system and onshore wind farm and resistive SFCL model. From the result, it was observed that the application of SFCL on LCC–HVDC system is an effective solution to mitigate the commutation failure. And then the process to determine optimum quench resistance of SFCL which enables the recovery of commutation failure was deeply investigated.

Polarization analysis of green sand and parameter optimization under exciting electric field

The polarization mechanism of green sand under direct current electric field was further analyzed by means of an equivalent mathematical model, and it was the absorption current that caused the polarization of green sand. However, the absorption current was essentially caused by the ions of the clay. Therefore, the clay was the source of the polarization and its content mainly determined the degree of polarization. Experiments based on the Taguchi method showed that the electrode area had the most important influence on the polarization, followed by the voltage amplitude and the frequency. The interactions of these three parameters did exist, and the interaction between the electrode area and the voltage amplitude had a bigger influence on the polarization than the frequency. The optimal exciting field parameters were that the voltage amplitude was 5V, the frequency was 1kHz and the electrode area was 2500mm2. The clay content and moisture content can be obtained by an artificial neural net according to AC voltage, DC voltage and DC voltage drop.

A Simplified Design Methodology for MOSFET-Only Wideband Mixer

A Simplified Design Methodology for MOSFET-Only Wideband MixerIn this paper we present a MOSFET-only implementation of a wideband Gilbert Cell. The circuit uses a commongate topology for a wideband input match, capable to cover the Wireless Medical Telemetry Service (WMTS) frequency bands of 600 MHz and 1.4 GHz. In this circuit the load resistors are replaced by transistors in triode region, to reduce area and cost, and minimize the effects of process and supply variations and mismatches. In addition, we obtain a higher gain for the same DC voltage drop, with a reduced impact on the noise figure (NF). The performance of this topology is compared with that of a conventional mixer with load resistors. Simulation results show that a peak gain of 20.6 dB (about 6 dB improvement) and a NF about of 11 dB for the 600 MHz band. The total power consumption is 3.6 mW from a 1.2 V supply.

Disorder-induced superconducting ratchet effect in nanowires

A dc voltage drop develops along amorphous indium oxide nanowires that are exposed to an ac bias source. This voltage is anti-symmetric with magnetic field and is characterized by sample specific quasi-periodic magneto-voltage oscillations. The voltage magnitude increases with decreasing temperature below $T_{C}$ but saturates at low T. As the disorder of the sample is decreased, the dc voltage is suppressed. We suggest that this rectification is a manifestation of the superconducting ratchet effect in which disorder and geometrical confinement play the role of asymmetric pinning centers. This effect demonstrates the importance of inherent inhomogeneity and vortex motion in the superconductor-insulator transition of disordered superconductors.

Low-Voltage Operational Active Inductor for LNA Circuit

A low voltage operational active inductor circuit is attractive for spiral-inductor-less LNA because of realizing high gain and low voltage operation simultaneously. In this paper, a simply structured low-voltage operational active inductor to enhance the amplifier gain is introduced and analyzed. This active inductor, which utilizes a transistor load operated in the triode region and a source follower, features a small DC voltage drop suitable for low voltage LNAs. An LNA using the active inductor load was designed with an input matching circuit using 90nm CMOS technology. The LNA tuned to 2.4GHz operation has 19.5dB of the internal gain. In addition, the frequency characteristics are easily varied by changing the capacitance value in the active inductor circuit. The core circuit occupies only 0.0026 mm2 and consumes 2.8mW with 1.2V supply voltage.

Dc four-point resistance of a double-barrier quantum pump

We investigate the behavior of the dc voltage drop in a periodically driven double barrier structure (DBS) sensed by voltages probes that are weakly coupled to the system. We find that the four terminal resistance R4t measured with the probes located outside the DBS results identical to the resistance measured in the same structure under a stationary bias voltage difference between left and right reservoirs. This result, valid beyond the adiabatic pumping regime, can be taken as an indication of the universal character of R4t as a measure of the resistive properties of a sample, irrespectively of the mechanism used to induce the transport.

The Blixer, a Wideband Balun-LNA-I/Q-Mixer Topology

This paper proposes to merge an I/Q current-commutating mixer with a noise-canceling balun-LNA. To realize a high bandwidth, the real part of the impedance of all RF nodes is kept low, and the voltage gain is not created at RF but in baseband where capacitive loading is no problem. Thus a high RF bandwidth is achieved without using inductors for bandwidth extension. By using an I/Q mixer with 25% duty-cycle LO waveform the output IF currents have also 25% duty-cycle, causing 2 times smaller DC-voltage drop after IF filtering. This allows for a 2 times increase in the impedance level of the IF filter, rendering more voltage gain for the same supply headroom. The implemented balun-LNA-I/Q-mixer topology achieves > 18 dB conversion gain, a flat noise figure < 5.5 dB from 500 MHz to 7 GHz, IIP2 = +20 dBm and IIP3 = -3 dBm. The core circuit consumes only 16 mW from a 1.2 V supply voltage and occupies less than 0.01 mm2 in 65 nm CMOS.

An Approach to Eliminating DC Magnetic Flux From the Series Transformer of a Dynamic Voltage Restorer

This paper proposes a control method for eliminating dc magnetic flux from the series transformer of a dynamic voltage restorer. The method is characterized by intentionally injecting no compensating voltage during a one-sixth line cycle (=3.3 ms at 50 Hz). The control method is independent of an initial phase angle of a voltage sag, thus requiring no flux detection. The period, during which no compensating voltage is injected, is one-third as short as that of an existing method. This paper confirms the effectiveness and viability of the proposed method. A 200-V 5-kW laboratory system verifies experimentally that the proposed method brings no dc magnetic flux to the series transformer. Moreover, the proposed method brings a smaller dc voltage drop to the dc load of a three-phase diode rectifier than the existing method does in the same conditions.

A VERY LOW NOISE, HIGH STABILITY, VOLTAGE REFERENCE FOR HIGH SENSITIVITY NOISE MEASUREMENTS

In this paper we demonstrate that by exploiting the non linear characteristic of low noise PN junction diodes, a very low noise, high stability voltage reference can be obtained starting from a conventional solid state series voltage reference. In order to obtain such a result, a series connection of N identical diodes is supplied in the forward region of the I-V characteristic by means of a proper resistance. While the DC voltage drop across the diodes can be a large fraction of the voltage supplied by the reference, the noise introduced by the reference itself is reduced by a much larger factor because of the low value of the small signal equivalent resistance of the diodes. In its simplest implementation, such a voltage source would suffer from a relatively high temperature dependence of the supplied voltages because of the intrinsic properties of PN junctions. However, by resorting to a proper temperature control circuit, high stability can be obtained. As an example, by employing an AD586 voltage reference and with N = 4, a 2.560 V reference has been obtained with a stability over temperature better that 50 μ V /° C and a voltage noise as low as 2 × 10−15, 6 × 10−17 and 1.5 × 10−17 V 2/ Hz at 100 mHz, 1 Hz and for frequencies larger than 10 Hz, respectively.

Vortex dynamics in spacing-graded array of defects on a niobium film

We have investigated the vortex dynamics in the niobium films having a spacing-graded array of pinning sites. The samples were fabricated by using electron beam lithography through a lift-off technique. The pinning sites of 200nm in diameter were arranged with a constant hole-defect separation in x-axis direction and graded separation in y-axis direction from 392nm to 408nm. The magnetoresistance measurements and current–voltage characteristics were explored with the external magnetic field applied perpendicular to the film plane. Dc current–voltage measured at matching field revealed two distinct curves resulted from the positive and negative applied current directions, respectively. This is believed to be due to an asymmetry pinning potential formed in the spacing-graded array of holes, giving rise to asymmetry Lorentz forces. Dc voltage drop measured with respect to the ac current applied along the x-axis of the sample showed two separated maxima, which can be explained using the dynamics of pinned vortex lattice and interstitial vortices in the asymmetry pinning landscape.