DC Voltage Drop Research Articles

Actual Capacitance Function of Nematic Liquid Crystal Cell

Liquid crystals (LCs) used in electronic displays usually contain many ions that come either from the raw material itself or from impurities during fabrication. The ions form an electrical double layer (EDL) at the surface, causes some image retention problems, and also influence the optical or electrical measurements in LC cells. The time response of the capacitance measurement in nematic LC cells under various external DC voltages is discussed. The actual applied DC voltage drop at the liquid crystal is modified by taking the EDL effect into account. To obtain a more exact solution, a constant displacement vector is applied instead of the simple assumption that the electric field intensity in the LC cell is constant. Consequently, the voltage- and time-dependent capacitance function of the nematic LC cell is expressed, and simulations with this function agree qualitatively with the measured results.

Chip-package hybrid clock distribution network and DLL for low jitter clock delivery

This paper presents a chip-package hybrid clock distribution network and delay-locked loop (DLL) with which to achieve extremely low jitter clock delivery. The proposed hybrid clock distribution network and DLL provide digital noise-free and low-jitter clock signals by utilizing lossless package layer interconnections instead of lossy on-chip global wires with cascaded repeaters. The lossless package layer interconnections become high-frequency waveguides and provide a repeater-free clock distribution network; thus, the clock signal becomes free of on-chip power supply noise. The proposed chip-package hybrid clock scheme has demonstrated a 78-ps peak-to-peak jitter at 500 MHz under a 240-mV on-chip simultaneous switching noise condition versus a conventional clock scheme, which produced a 172-ps peak-to-peak jitter under the same condition. Moreover, the proposed scheme has demonstrated an 80-ps long-term jitter with a 300-mV DC voltage drop test condition, contrasted with the 380-ps long-term jitter of a conventional clock scheme. Finally, the proposed hybrid clock scheme has a confirmed delay of 1.47 ns versus a conventional clock scheme delay of 2.85 ns.

Effects of Balanced and Unbalanced Voltage Sags on VSI-Fed Adjustable-Speed Drives

This paper analyzes the effects of voltage sags on the three-phase rectifier of a voltage-source-inverter (VSI)-fed adjustable-speed drive. These effects are dc voltage drop and ac current peaks. As rectifier behavior is univocally characterized by two parameters (which depend on the ac reactance and the dc capacitor), their influence on the dc voltage drop and the ac current peaks is studied. Diagrams in function of these two parameters are presented in order to easily predetermine the worst effects of voltage sags originated by single-phase faults. The results of the study suggest that if the trip levels are correctly adjusted, the drive can ride through the voltage sags produced by single-phase faults (assuming the drive has typical values of L and C).

RF pulse triggered superconducting switches

In recent years, we have studied the possibility of using YBCO thin films not only for passive switching, as in resistive fault current limiters, but also as actively switchable devices at high power levels and millisecond time scales. As a trigger, we previously used heat pulses which were launched from the backside of the substrate. This requires relatively high trigger power, however. More recently, we have used RF pulses which are directly applied to the superconducting strip itself. The RF magnetic field was applied by various types of coils at frequencies in the MHz range. The samples were prepared by thermal co-evaporation on sapphire substrates in the form of strips with dimensions 10 mm /spl times/ 42 mm. They were submersed in liquid nitrogen and biased by a dc current. Simultaneously with the leading edge of the RF pulse, we observe the onset of a dc voltage drop along the superconductor which continues to increase during some milliseconds until the YBCO film eventually switches into the normal state. We have measured the switching time as a function of bias current, RF field direction, and RF power. The latter is considerably less than the heat pulse power required for our previous trigger method. The optimum field direction turned out to be perpendicular to the film.

Study of the radio-frequency driven sheath in the ion cyclotron slow wave antennas

Formation of the radio-frequency driven sheath and resulting parasitic antenna loading in the ion cyclotron slow wave antennas are studied experimentally in the linear divertor plasma simulator NAGDIS-II. A phased loop antenna array with a poloidal mode of m=0 is used in the present ICRF heating experiment. A large DC voltage drop of about several hundreds volts is induced on the loop antennas with and without Faraday screen during high power RF heating and causes the additional power dissipation ( P sh) due to the heat flux to the antenna current strap of ions accelerated by the RF driven DC sheath potential. This parasitic antenna loading is measured by calorimetric method and compared with that obtained from the conventional measurement of the antenna voltage and current. When a Faraday screen is employed to reduce the antenna–plasma interaction, P sh becomes much smaller than the radiated RF power. The net antenna loading for ICRF slow wave excitation is evaluated, taking account of the RF sheath dissipation.

Evidence for unpinned magnetic flux vortices above theI ctransition in the 2223-phase high-T csuperconductor

A similarity in the dc voltage-current (V-I) curves for both direct and alternating transport currents is used to propose that unpinned flux vortices are generated above theI ctransition for dc transport currents, when Abrikosov flux vortices begin to penetrate the superconductor. Two methods can be used to give a dc voltage drop for an ac transport current: (1) if there is a slight dc offset voltage in the ac current which favors vortex loop collapse as in a traditional dcI ctest, or (2) if an asymmetric transverse magnetic field is present which favors vortex loop collapse for current in one direction over the reverse direction.

AC losses in HTSC conductor elements

AC self-field losses and DC dynamic resistivity in HTSC conductor elements have been measured. The data are discussed with reference to the relevant theory. For two very different sample types, the J/sub c/ calculated on the basis of the AC self-field loss is about an order of magnitude lower than the J/sub c/ based on the 1- mu V/cm DC voltage drop criterion often used for HTSC materials. This is attributed to the onset of resistive behavior at currents much lower than the reported J/sub c/ based on the 1- mu V/cm criterion. The J/sub c/ determined from measurements of the dynamic resistivity of a melt-textured YBCO fiber is within 15% of that determined by magnetic measurements. >

Electronic system packaging: the search for manufacturing the optimum in a sea of constraints

Manufacturing electronic systems is a multicomponent, multichip, hybrid design process which spans the life of the product. The design constraint list is not limitless, but if incomplete, can lead to economic loss for the product. Details of some of the constraints that affect system performance, reliability, materials selection, and the assembly of the product are presented. The electronic constraints include chip crossing delay, fan out (number of receivers on a driven net), crosstalk (unwanted electromagnetic coupling between independent signal lines and power supplies), DC voltage drop, the number of simultaneously switched line drives and reflections of signal waves from discontinuities in transmission line networks. The power dissipation constraints include maximum junction temperature, ambient temperature and pressure drop conditions, and component-to-component temperature variation. The cost constraints include materials, fabrication, and assembly. Some of the mathematical constraints are defined, along with the coupling between them and optimum solutions are shown graphically. The ability to resolve the system manufacturing constraints through optimization will determine the final success of a product.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Influence of ac contact impedance on high-frequency, low-temperature, or fast-transient junction measurements in semiconductors

The behavior of a semiconductor contact is usually represented by the specific contact resistance determined by a dc measurement. A copper-gold contact on p-type cadmium telluride is used to illustrate the influence of the ac contact impedance on standard semiconductor measurements such as capacitance versus voltage, admittance spectroscopy, and deep-level transient spectroscopy. These experimental results show that a semiconductor contact with negligible dc voltage drop may have a significant influence on high-frequency, low-temperature, or fast-transient measurements. Knowledge of the contact capacitance as well as the contact resistance is necessary to predict the influence of the contact.

Relaxation spectra of gramicidin dimerization in a lipid bilayer membrane

The kinetics of formation and dissociation of gramicidin dimers in a lipid bilayer membrane have been studied by pressure-jump and electric field-jump methods. The traditional AC-coupled pressure-jump apparatus has been modified so that a known DC-voltage drop is maintained across a Teflon cell divided by a septum with a hole for membrane formation. From the response of the amplified output voltage after the pressure release, information about the kinetics of channel (dimer) formation is obtained. In addition, using the same apparatus, electric field-jump measurements were performed on the gramicidin / membrane system. In asolectin / 7-dehydrocholesterol (5:1) membranes at 25 ± 0.1°C, the best fit to the pressure-jump data gives a dimer dissociation rate constant of 0.5 ± 0.3 s −1. The standard volume change for dimerization determined from the amplitude of the pressure-jump experiments is −66 ± 35 cm 3 / mol. Rate data determined by the electric field-jump method are consistent with the pressure-jump values; results obtained with either technique are compatible with other determinations of the kinetics of dimerization on gramicidin / membrane systems.

DC-controlled solid-state X-ray image converter

A thin solid-state X-ray panel of sandwich-type structure using photoconductive (PC) and semiconducting electroluminescent (EL) powder layers has been developed. The PC layer and the semiconducting EL layer are connected electrically in series. Both ac and dc voltages are applied across the combination. The X-ray sensitivity of the converter depends on the dc voltage drop across the PC powder layer and on input X-ray intensity. Gamma and input latitude of the converter performance are widely controllable by adjusting the dc voltage applied across the panel. The ac supplies excitation for the EL phosphor. The light output intensity at a low X-ray intensity level is substantially improved without deteriorating the picture resolution. For X-ray intensity of 30 mR/min, 80 kV peak, the converter produces light output about 800 times as bright as a conventional fluoroscope screen does, and Mo wire of 200-µm diameter is observed. However, seconds are required for image buildup and cutoff. Converted X-ray images using an experimental converter are also shown.

High-efficiency CW impatt operation

CW room-temperature operation of Ge Impatt diodes with efficiencies as high as 43 percent in the 400 to 1000 MHz frequency range has been achieved. In this low-frequency, high-efficiency mode, the dc voltage drop across the diode is observed to decrease significantly.

Design of Self-Limiting Transistor Sine-Wave Oscillators

By combining the describing function approach with a large signal transistor model and certain simplifying assumptions, it has been possible to develop a set of universal curves yielding selflimiting operating amplitudes for a large class of transistor sinewave oscillators. The variable parameter in this presentation is the dc voltage drop across the emitter bias resistor in the circuit with oscillations absent. Since this parameter may be easily calculated, the material presented allows the design of oscillators for any allowable operating amplitude. In a companion paper the method is extended to include collector saturation limiting and calculations of the onset of squegging.

New Mechanism for the Generation of Flicker Noise in Tubes with Oxide-Coated Cathodes

Evidence is presented which seems to indicate that a major part of the flicker noise in tubes with oxide-coated cathodes is generated in a thin surface layer of the coating. The effect is shown to be caused by the fact that a dc voltage drop and a noise voltage fluctuation are generated in the surface layer. In tubes with a porous cathode coating this noise voltage modulates the current coming out of the surface pores, thus leading to a true fluctuation in the current. In tubes with a nonporous cathode coating this noise voltage modulates the emission current, thus leading to a true fluctuation in the emission.