One of the main problems in binary logic is the high volume of connections which can increase the chip area and power consumption. By using the multi-valued logic, more information can be transmitted in parallel; therefore, the number of connections on the bus is significantly decreased. Ternary logic is a promising alternative to the binary logic. In recent years, given the high capability of nanotechnology in designing the multi-valued logic, many researchers have been concerned with designing the multi-valued logic in this field. In order to take advantage of the multi-valued logic, the use of a mixed radix system using the multi-valued and binary logic is more suitable, as compared with using only the multi-valued logic. Therefore, to perform the required conversion between multi-valued logic signaling on the bus and the binary logic processing circuits, the information must be converted from the binary state to the ternary one and vice versa. Also, computers in the future may be designed in the ternary output form. Hence, in order to match with the binary logic, information must be converted from the binary state to the ternary one and vice versa, making the design of the binary-to-ternary converter essential. In this paper, for the first time, a multi-digit binary-to-ternary converter is designed based on carbon nanotube field-effect transistors (CNTFET). The proposed converter can be extended to the desired number of bits. First, the proposed conversion theory is discussed; then the block diagram for the theory is designed and the circuit of each block is presented using CNTFETs. In addition, to implement the proposed converter algorithm and reduce the complexity, two types of half-adders and two types of full-adders as well as a new ternary positive buffer are designed. The proposed design is simulated using Synopsys HSPICE with the standard 32 nm CNTFET technology, confirming the correct operation and good performance of the proposed converter.