Characteristics Of Single-electron Transistor Research Articles

A complete set of logic gates with an identical single-stage structure based on periodic nature of single-electron devices

In this paper, a new method for implementing all two-input logic gates on an identical single-stage structure is proposed. We have used unique characteristics of single-electron transistors, which have periodic output–input relation, to design the gates and implement all two-input logic gates (symmetric/non-symmetric, monotonic/non-monotonic) by a single-stage design including only one single-electron transistor. In conventional monotonic devices, such as BJTs and MOSFETs, implementing non-monotonic logic gates such as XOR and XNOR is impossible with a single-stage circuit and a multistage design is required which leads to more complexity, more chip area and higher power consumption. We present the proposed methodology at first, and then, the details of the designs are investigated. The results are obtained analytically using a new approach named two-potential and then confirmed by numerical methods. Furthermore, important characteristics of the proposed gates such as maximum operating temperature, speed of the gates and frequency limitations, power consumption (static and dynamic) and scaling to other technologies have been investigated. Finally, a general idea has been presented about the application of the introduced approach and gate structures in the field of logic circuit and system designing.

Effect of temperature on electrical characteristics of single electron transistor

Static and transfer characteristics of single electron transistor are analytically calculated as a function of operating temperature under suitable biasing conditions. Computation is carried out assuming quantum mechanical coupling between source and drain; along with stochastic nature of tunneling process. Fermi Golden Rule is used to calculate free energy changes at both source and drain ends, and corresponding tunneling probabilities, which are governing factor for determining drain current. Result shows that significant variation is observed at lower temperature operation in terms of drain current and differential conductance. It is found out that at low horizontal bias, transfer characteristics is greatly influenced at lower temperature, whereas moderate gate voltage is required to observe meaningful fluctuations in static characteristics. Magnitudes of differential conductance and transconductance increase at higher temperature. Results have critical importance for operation of the device at different temperature conditions.

Sharp Switching Characteristics of Single Electron Transistor with Discretized Charge Input

For the low-power consumption analog and digital circuit applications based on a single-electron transistor, enhancement of its switching performance is required. Our previous works analytically and numerically demonstrated that a discretized charge input device, which comprised a tunnel junction and two capacitors, improved the gain characteristics of single-electron devices. We report the design and fabrication of an aluminum-based single-electron transistor having the discretized charge input function. Flat-plate and interdigital geometries were employed for adjusting capacitances of grounded and the coupling capacitors. The sample exhibited clear switching on input-output characteristics at the finite temperature.

A Single Electron Transistor Made From Lead Cadmium Selenide Nanocrystals

With the miniaturization of transistor size, fabrication of transistor with lithography technique is a foreseen problem. It is possible to routinely create semiconductor nanocrystals whose dimensions are much smaller than those can be realized by lithography techniques using colloidal chemistry. The size of the nanocrystals can be varied easily by varying the process parameters to study the quantum confinement effect. Here we present the simple synthesis method of Pb-CdSe and characterization of the same with XRD, UV-VIS spectroscopy and AFM. Also we present the I-V characteristics of Single Electron Transistor, by applying different values of Gate voltage. Decrease in the size of the nanoparticles will result in increase in charging energy and hence leads to more prominent Coulomb Blockade phenomena. Gate voltage controls the movement of electron from the blockade region and hence can be used in charge sensing application as they detect the motion of single electron.

Electrical characteristics and modelling of multi-island single-electron transistor using SIMON simulator

In this paper, we present a multi-island single-electron transistor (MISET) model based on the orthodox theory and solving the master equation. Using SIMON simulator, we investigate the electrical characteristics of single-electron transistors (SETs) based on multiple islands and show the temperature dependence of the Coulomb oscillation of the SET with one to six islands as a function of gate voltage Vg in the temperature range from T=5 to 50K. Values of current tend to increase proportionally with temperature. For a high drain voltage, the MISET behaved as a single-island device. This is probably because the multiple islands were electrically enlarged and merged into a single island owing to the high applied drain voltage. Finally, we compare the advantages of MISET face to single-island SETs with identical dimensions of islands.

Transport properties of nanoscale Nb and NbN Josephson junctions fabricated by focused-ion-beam milling

We have studied low-temperature electrical transport properties of nanoscale Nb∕(Al–)Al2O3∕Nb and NbN∕AlN∕NbN Josephson junctions (JJs) fabricated by focused-ion-beam (FIB) milling. This FIB fabrication process yields high-quality JJs whose superconducting gap energy agrees with the bulk value. In this paper, we report the improvement in the precision of the fabrication technology by employing a weaker ion beam current and by introducing a step of XeF2-gas-assisted milling, which allowed us to reduce the anodization voltage. For Nb JJs, we measured the current-voltage (I-V) characteristics of single-electron transistors (SETs) and examined the current observed within the superconducting energy gap. At finite voltages, we observed current peaks due to the Josephson-quasiparticle (JQP) cycle. Based on the JQP-peak positions, we estimated the charging energy Ec of the SETs. For all SETs, Ec∕kB is larger than 1K, which is consistent with 0.1×0.1μm2 junctions. We also analyzed the superconducting critical current at zero voltage. The ratio Ic∕Ic0 depended on the junction size, where Ic is the measured critical current and Ic0 is the theoretical one. The I-V curves of NbN single Josephson junctions also depended on the junction size, and they were qualitatively different, especially around the energy gap. We will discuss the possible origins for the junction-size dependence.

Assembling ferromagnetic single-electron transistors by atomic force microscopy

We demonstrate the assembly of nanoscale ferromagnetic single-electron transistors usingatomic force microscopy for imaging as well as for nanoscale manipulation. A single 30 nmAu disc, forming the central island of the transistor, is manipulated with angstromprecision into the gap between a plasma-oxidized Ni source and drain electrodes. Thetunnel resistances can be tuned in real time during the device fabrication by repositioningthe Au disc. Transport measurements reveal long-term stable single-electron transistorcharacteristics at 4.2 K. The well-controlled devices with very small central islands facilitatefuture in-depth studies of the interplay between Coulomb blockade, spin-dependenttunnelling and spin accumulation in ferromagnetic single-electron transistors at elevatedtemperatures.

Electrical properties of ferromagnetic semiconducting single-walled carbon nanotubes

Electrical properties of single-walled carbon nanotubes (SWCNTs) filled with Fe are studied by fabricating them as the channels of field-effect transistor devices. The synthesis of Fe-filled SWCNTs is realized by using ferrocene as the starting material. Our results reveal that ferrocene-filled SWCNTs show the interesting ambipolar behavior. In contrast, Fe-filled SWCNTs can exhibit high performance unipolar n-type semiconducting characteristics, suggesting the possibility of creating ferromagnetic semiconducting SWCNTs. Moreover, Coulomb blockade oscillations are significantly observed on Fe-filled SWCNTs, which indicates that they exhibit excellent single-electron transistor characteristics at low temperatures.

Metal−Semiconductor Transition in Single-Walled Carbon Nanotubes Induced by Low-Energy Electron Irradiation

We report the effect of low-energy (1 keV) electron beam irradiation on gated, three-terminal devices constructed from metallic single-walled carbon nanotubes. Pristine devices, which exhibited negligible gate voltage response at room temperature and metallic single-electron transistor characteristics at low temperatures, when exposed to an electron beam, exhibited ambipolar field effect transistor (room temperature) and single-electron transistor (low temperature) characteristics. This metal-semiconductor transition is attributed to inhomogeneous electric fields arising from charging during electron irradiation.

Proximity effect of electron beam lithography for single-electron transistor fabrication

In this letter, we shall describe a method, utilizing the proximity effect in electron beam lithography, suitable for fabricating silicon dots and devices, and demonstrate the electronic characteristics of the Si single-electron transistor. The drain current (Id) of the device oscillates against gate voltage. The electrical characteristics of the single-electron transistor were observed to be consistent with the expected behavior of electron transport through gated quantum dots, at up to 150K. The dependence of the electrical characteristics on the dot size reveals that the Id oscillation follows from the Coulomb blockade by poly-Si grains in the poly-Si dot. The method of fabrication of this device is completely compatible with complementary metal–oxide–semiconductor technology, raising the possibility of manufacturing large-scale integrated nanoelectronic systems.

Theoretical study of characteristics of a molecular single-electron transistor

A technique for the calculation of current-to-voltage curves and control curves of a molecular single-electron transistor with a discrete energy spectrum has been developed. The effective recursive methods for quick computation of the Gibbs canonical distribution of electrons between energy levels, as well as techniques for the fast calculation of the distribution function for a slow relaxation process have been found. Characteristics of the single-electron transistor in the cases of different types of molecule's energy spectrum, fast and slow energy relaxations have been compared.

Single-electron transistors in electromagnetic environments

The current--voltage $(I--V)$ characteristics of single-electron transistors (SETs) have been measured in various electromagnetic environments. Some SETs were biased with one-dimensional arrays of dc superconducting quantum interference devices (SQUIDs). The purpose was to provide the SETs with a magnetic-field-tunable environment in the superconducting state, and a high-impedance environment in the normal state. The comparison of SETs with SQUID arrays and those without arrays in the normal state confirmed that the effective charging energy of SETs in the normal state becomes larger in the high-impedance environment, as expected theoretically. In SETs with SQUID arrays in the superconducting state, as the zero-bias resistance of the SQUID arrays was increased to be much larger than the quantum resistance ${R}_{K}\ensuremath{\equiv}{h/e}^{2}\ensuremath{\approx}26\mathrm{k}\ensuremath{\Omega},$ a sharp Coulomb blockade was induced, and the current modulation by the gate-induced charge was changed from e periodic to $2e$ periodic at a bias point $0<|V|<2{\ensuremath{\Delta}}_{0}/e,$ where ${\ensuremath{\Delta}}_{0}$ is the superconducting energy gap. The author discusses the Coulomb blockade and its dependence on the gate-induced charge in terms of the single Josephson junction with gate-tunable junction capacitance.

Fabrication of mesoscopic superconducting Nb wires using conventional electron-beam lithographic techniques

Conventional electron-beam lithography has been used to fabricate mesoscopic Nb wires. Nb was deposited in an ultrahigh vacuum evaporation chamber using electron gun heating. The typical linewidth and the thickness were 200 and 50 nm, respectively. The transition temperatures were above 7 K. They increased with thickness and linewidth. To demonstrate the feasibility of two angle evaporation techniques, we also fabricated Nb/(Al–)AlOx/Nb tunnel junctions showing superconducting single-electron transistor characteristics.

Consideration of the “island” background charge in single-electron transistor simulation

Three approximations of the “island” background charge are described within the proposed 2D numerical model of the metal single-electron transistor. These approximations fit the experimental data well when calculating I–V characteristics of single-electron transistors according to the model developed in many cases. The validity of these approximations is exemplified by specific calculations of I–V characteristics.

Reliability of Single Electron Transistor Circuits Based on Eb/N0-Bit Error Rate Characteristics

Bit error rate (BER) characteristics of single electron transistor (SET) circuits have been evaluated using the Monte Carlo simulation. It has been confirmed from the simulation results that the reliability of the complementary-SET (CSET) inverter is dominated by the universal Eb/N0-BER characteristics, where Eb is the bit energy, N0 the noise power per unit frequency, and BER the bit error rate. In this paper it is determined from the Eb/N0-BER characteristics of the CSET circuit, that the CSET system based on the conventional circuit building method cannot be implemented for room temperature operations.

Single electron tunneling in single junctions and multi-junction systems

Experimental dc I-V curves of single ultra-small (∼ 50 × 50nm 2) Al/AlO x/Al tunnel junctions were used to model characteristics of single-electron transistors using similar junctions, within the framework of the “orthodox” theory of correlated tunneling. We have found that results from the simulations are very similar to experimental I-V curves of the transistors measured over a wide range of temperature.