Characteristics Of Insulated Gate Bipolar Transistor Research Articles

Effects of Current Filaments on IGBT Avalanche Robustness: A Simulation Study

With the increase in voltage level and current capacity of the insulated gate bipolar transistor (IGBT), the avalanche effect has become an important factor limiting the safe operating area (SOA) of the device. The hole injection into the p/n junction on the backside of the IGBT after avalanche is the main feature that distinguishes the avalanche effect from other devices. In this paper, the avalanche breakdown characteristics of IGBT and the nature of current filament are investigated using theoretical analysis and numerical simulation, and the underlying physical mechanism controlling the nature of current filaments is revealed. The results show that the hole injection on the backside of the IGBT leads to an additional negative differential resistance (NDR) branch on the avalanche breakdown curve. The device’s common-base current gain, αpnp, is a crucial factor in determining the current filament. As αpnp increases, the avalanche-induced current filament becomes stronger and slower, resulting in weaker avalanche robustness of the device.

Simulation study on total ionizing dose effect of IGBT gamma irradiation

The insulated gate bipolar transistor (IGBT) has emerged as a prominent high-power semiconductor device due to its excellent overall performance. It is widely utilized in various fields, including aerospace. Due to prolonged operation in complex irradiation environments, the performance of IGBTs is susceptible to degradation and damage. Therefore, conducting research on the variation of IGBT characteristics under irradiation environments is crucial to ensuring their long-term functionality in extended space missions. To evaluate and analyze the total ionizing dose (TID) effect of IGBTs during operation, this study adopts a trench IGBT as the device model. Utilizing the finite element method, technology computer-aided design (TCAD) is employed to simulate and analyze the electrical characteristic changes of IGBTs under different total radiation doses. The simulation results are subsequently validated through theoretical analysis. The simulation results indicate that gamma radiation significantly affects the overall electrical characteristics of IGBTs.

Simulation study on the influence of metal contact and MOS interface trap states on the electrical characteristics of SiC IGBT

A 13 kV class n-channel 4H–SiC trench gate insulated gate bipolar transistor (IGBT) structure is designed based on Silvaco TCAD device simulator tool. The influence of metal/SiC and SiC MOS interface trap states on the static and dynamic characteristics of SiC IGBT devices are systematically studied. It is found that the electrical properties of SiC IGBTs are insensitive to the donor or acceptor traps at the interface of metal/SiC and the donor traps at the SiC/SiO2 interface. However, the acceptor traps at the SiC/SiO2 interface affect the electrical properties of SiC IGBTs greatly. When the acceptor trap density at the SiC/SiO2 interface (Dita) is up to the level of 1012 cm−2·eV−1, the turn-on voltage drop (VCEON) is increased gradually with the augmentation of Dita. The breakdown voltage (VBR) of the device is increased slightly. Further study of the device’s turn-off characteristics shows that the turn-off loss (EOFF) is decreased with the increase in Dita but a large tail current is formed. The mechanism may be that when the electrons are injected from the N+ source region into the N− drift region, the SiC/SiO2 interfacial acceptor traps at the side wall of trench gate capture a large number of electrons. As a result, the minority carrier concentration is decreased, and the conductance modulation effect on the N− drift region is weakened.

Evaluation of the Degradation in Electrothermal Characteristics of IGBTs During Thermal Cycling Cocaused by Solder Cracking and Al-Wires Lifting-Off Based on Iterative Looping

The evaluation of dynamic degradation in electrothermal characteristics of insulated gate bipolar transistors (IGBTs) caused by package fatiguing is critical to the operating safe and reliable application of IGBTs under their long-term servicing. In the present work, the degradation mechanism in electro thermal characteristics of IGBTs caused by package fatiguing (die-attach solder cracking and Al-wires lifting-off) was analyzed, first. An iterative looping consisting of the electrothermal simulation, fatigue damage calculation, and degradation of electrothermal characteristics in IGBTs was proposed based on the physics of failure. Based on that, the degradation in electrothermal characteristics of IGBTs during power cycling (PC) caused by the two fatigue modes was investigated. PC tests were carried out to 1700 V/3600 A IGBT modules under various conditions for verifications. Under six various PC conditions, the maximum of errors is lower than 7%. It indicates well consistence with experiments. The proposed iterative looping directly simulates the degradation of electrothermal characteristics of IGBTs during thermal cycling. It may provide a possibility of evaluating offline or online the important electrothermal parameters of IGBTs (such as <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T_j</i> and <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V_CEsat</i> ) during operating, which is meaningful for diagnosing the safe operating area of IGBTs after long-term servicing.

Temporal and Spatial Differences in Thermal Transfer Behavior of IGBTs Caused by the Baseplate and Die-Attach Solder Cracking

Solder cracking hinders the thermal dissipation of insulated gate bipolar transistors (IGBTs) during their long-term servicing. In this work, the evolution of micro-cracks in the baseplate and die-attach solder layers under thermal cycling was first investigated by a proposed finite-element analysis-fatigue damage calculation (FEA-FDC) iterative simulation method. Based on that, a series of 3-D electrothermal coupling IGBT models with various cracked solder layers were obtained. Dynamic degradation in thermal characteristics of IGBTs during solder cracking was quantitatively evaluated. Temporal and spatial differences in thermal transfer behavior of IGBTs caused by baseplate and die-attach solder cracking were comparably discussed under the short circuit (SC), pulse high current (PHC), and pulsewidth modulating (PWM) operating conditions. The results show some significant differences in thermal transfer behavior of IGBT when the baseplate and die-attach solder fatigue. The die-attach solder fatigue remarkably hinders the thermal transfer of IGBTs at a smaller time scale of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$500 ~ \mu \text{s}$ </tex-math></inline-formula> and severely aggravates the non-uniformity in temperature distribution inside IGBT chips. To some extent, the die-attach solder fatigue is a more adverse failure mode of IGBTs compared with the baseplate solder fatigue under various conditions.

Research on the Influence of Bond Wire Lift-Off Position on the Electro-Thermal Characteristics of IGBT

Based on the actual packaging structure of insulated gate bipolar transistor (IGBT) module, this article establishes the power loss model, and analyzes the influence of the position of the lift-off bond wire on the module. Through the theoretical analysis, it is found that the position of the lift-off bond wire is an important factor affecting the aging of the modules. And then the electrothermal coupling model of IGBT is established for simulation, and an experimental platform is built for verification. The results show that the distribution of bond wire lift-off position is one of the characteristics of bond wire failure. When the bond wire lift-off failure is concentrated on a single IGBT chip, it will accelerate the aging process of the modules. Therefore, this article considers that the position of the lift-off bond wire is a significant factor in the aging process of the modules, which should be fully considered in the bond wire state evaluation. In addition, the research results of this article can also provide theoretical reference for the optimization of IGBT module packaging structure.

Scaling Design Effects on Surface Buffer IGBT Characteristics

Scaling design effects on surface buffer (SB) insulated gate bipolar transistor (IGBT) is analyzed not only for power loss reduction but also for switching controllability and robustness using TCAD simulation. Although the scaling design improves turn-off loss and on-state voltage drop <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{V}_{ce(sat)}$ </tex-math></inline-formula> trade-off due to injection enhancement (IE) effect, turn-on surge current is increased by the enhancement of negative gate capacitance due to thin gate oxide. Dual gate control improves turn-on switching controllability by hole current path control. Short circuit robustness is improved by the scaling design, because the saturation current is decreased with the scaling design due to pinch-off of the n-MOS channel. From these results, the scaling design is effective in improving the SB-IGBT characteristics including high robustness.

Modelling and solving of IGBT's transient analysis model based on the finite state machine

AbstractTo accurately obtain the switching characteristics of insulated gate bipolar transistors (IGBT), this paper proposes an IGBT's transient analysis model (TAM) based on the finite state machine (FSM). Firstly, the IGBT switching process in the basic converter unit is segmented in the time domain, and the circuit equations among the variables are obtained based on Kirchhoff's law. Then, the switching mechanism and parameters of the IGBT are decoupled based on time segmentation, and clarifying state equations and the transition events for each stage. Subsequently, all the stages and events are modeled in an FSM, thus establishing the IGBT's TAM, and it was realized the Stateflow toolbox of Matlab/Simulink. Finally, some experiments were performed on IGBTs with different current and voltage. The results show that the TAM can accurately describe the switching characteristics of IGBT and is suitable for different voltage and current levels.

Analysis of base characteristics of trench gate field termination IGBT

Trench gate structure represents the latest structure of Insulated Gate Bipolar Transistor(IGBT). Because there are great differences in model analysis coordinate system and carrier transport between trench gate structure and planar gate structure, the modeling method using planar gate structure will inevitably have great deviation. Based on the characteristics of trench gate structure and model analysis coordinate system, the base region is divided into PNP and PIN by considering the two-dimensional effect of carriers. According to whether the trench of PIN part can be covered by depletion layer of PNP part, the specific base region current is analyzed. Finally, simulation and experimental verification are carried out.

A Fusion Algorithm for Online Reliability Evaluation of Microgrid Inverter IGBT

Due to the diversity of distributed generation sources, microgrid inverters work under complex and changeable conditions. The core device of inverters, an insulated gate bipolar transistor (IGBT), bears a large amount of thermal stress impact, so its reliability is related to the stable operation of the microgrid. The effect of the IGBT aging process cannot be considered adequately with the existing reliability evaluation methods, which have not yet reached the requirements of online evaluation. This paper proposes a fusion algorithm for online reliability evaluation of microgrid inverter IGBT, which combines condition monitoring and reliability evaluation. Firstly, based on the microgrid inverter topology and IGBT characteristics, an electrothermal coupling model is established to obtain junction temperature data. Secondly, the segmented long short-term memory (LSTM) algorithm is studied, which can accurately predict the aging process of the IGBT and judge the aging state via the limited monitoring data. Then, the parameters of the electrothermal coupling model are corrected according to the aging process. Besides, the fusion algorithm is applied to the practical case. Finally, the data comparison verifies the feasibility of the fusion algorithm, whose cumulative damage degree and estimated life error are 5.10% and 5.83%, respectively.

Wide-Range Prediction of Ultra-High Voltage SiC IGBT Static Performance Using Calibrated TCAD Model

In this paper, a technology computer-aided design (TCAD) model of a silicon carbide (SiC) insulated-gate bipolar transistor (IGBT) has been calibrated against previously reported experimental data. The calibrated TCAD model has been used to predict the static performance of theoretical SiC IGBTs with ultra-high blocking voltage capabilities in the range of 20-50 kV. The simulation results of transfer characteristics, IC-VGE, forward characteristics, IC-VCE, and blocking voltage characteristics are studied. The threshold voltage is approximately 5 V, and the forward voltage drop is ranging from VF = 4.2-10.0 V at IC = 20 A, using a charge carrier lifetime of τA = 20 μs. Furthermore, the forward voltage drop impact for different process dependent parameters (i.e., carrier lifetimes, mobility/scattering and trap related defects) and junction temperature are investigated in a parametric sensitivity analysis. The wide-range simulation results may be used as an input to facilitate high power converter design and evaluation. In this case, the TCAD simulated static characteristics of SiC IGBTs is compared to silicon (Si) IGBTs in a modular multilevel converter in a general high-power application. The results indicate several benefits and lower conduction energy losses using ultra-high voltage SiC IGBTs compared to Si IGBTs.

Bipolar Transistor Test Structures for Extracting Minority Carrier Lifetime in IGBTs

Vertical PNP bipolar transistor test structures were fabricated and measured, attempting to electrically obtain information on carrier lifetime in the voltage-supporting base region of Insulated Gate Bipolar Transistors (IGBTs). Owing to the structural similarity, the test structures and functional IGBTs can be integrated on the same wafers, making it possible to directly correlate lifetime data and IGBT characteristics. To solve a problem of leaky backside PN junction, common base current gain of the test devices was measured without applying a reverse bias between the collector and base terminals, which suppressed the leakage to an acceptable level. A simple analytical formula to convert the current gain to hole lifetime in the N-type base region was proposed and used, that takes into account the existence of a commonly used N-buffer layer adjacent to the backside P-collector layer. The validity of the formula was confirmed using TCAD simulations. This method was applied to IGBT wafers with two different wafer thicknesses (i.e., base lengths): $120~{{\mu }}\text{m}$ and $360~{{\mu }}\text{m}$ . Consistent lifetime values extracted in spite of the largely different thicknesses supports the validity of the proposed lifetime estimation method.

Fabrication of IGBTs using 300 mm magnetic Czochralski substrates

Up to now the vast majority of insulated gate bipolar transistors (IGBTs) has been produced on silicon (Si) wafers out of the float-zone (FZ) process. FZ crystals can easily be used for this application, but are only available with a diameter of up to 200 mm. However, the use of wafer substrates with a diameter of 300 mm offers a significant increase in productivity and is therefore the diameter of choice for the high-volume production of CMOS devices. In order to benefit from this advantage also for the manufacturing of IGBTs, material out of the magnetic Czochralski process, which is available in 300 mm, had to be adapted. Key issues include crystal originated particles, dopant segregation along the crystal axis, and the higher concentration of oxygen. In particular, the implementation of the field-stop zone by the implantation of protons will lead to the additional formation of hydrogen-decorated C I O I complexes which can act electrically as donors. However, by an appropriate adjustment of the processing parameters the electrical characteristics of IGBTs on FZ substrates can be well reproduced.

An ON-State Voltage Calculation Scheme of MMC Submodule IGBT

The degradation of submodule (SM) insulated gate bipolar transistors (IGBTs) in a modular multilevel converter (MMC) can be monitored through their on -state voltages. This paper proposes a scheme to calculate the IGBT on -state voltages at rated current and normal junction temperature. The equations of on -state resistances are established based on Kirchhoff voltage laws (KVL) in one MMC arm for positive and negative current directions separately. The arm current, arm voltage, capacitor voltages, gate signals, and junction temperatures are utilized in the equations, and most of the signals are known for the control system. The dimension of the equation set is reduced to make it solvable based on an assumption that all the on -state resistances of diodes remain equal. In addition, the Kalman filter (KF) is used to improve the stability and accuracy of the calculation results. The calculated results are converted to the normal condition based on the current-voltage ( I–V ) and resistance-temperature ( R–T ) characteristics of SM IGBTs and diodes. The scheme is verified by using the simulation of a five-level three-phase MMC model. The errors of the calculated V CE are within 0.3%, and the calculation accuracy is good enough for the estimation of IGBT degradation. Furthermore, the influences of the measurement accuracy and the equal diode voltage assumption on the calculation accuracy are analyzed. The proposed scheme is expected to be applicable in online condition monitoring of SM IGBTs.

Impact of Solder Degradation on V CE of IGBT Module: Experiments and Modeling

Solder degradation is one of the main packaging failure modes in insulated gate bipolar transistor (IGBT) modules, which is usually evaluated through the change of thermal resistance. However, due to the strong electrothermal coupling in the IGBT module, solder degradation also affects electrical characteristics, such as ON-state voltage <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{\mathrm {CE}}$ </tex-math></inline-formula> . The impact mechanism of solder degradation on <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{\mathrm {CE}}$ </tex-math></inline-formula> is analyzed in this paper first. For the study of the solder degradation independently, a press-packing setup is designed for the accelerated aging test, which can remove the influence of bond wires degradation and significantly improve the experimental efficiency. Then, the IGBT equivalent resistance is defined, which conforms to Ohm’s law in the calculation and can respond to the real-time dynamic current. So, it could be conveniently used in the finite element method (FEM)-based simulation. Meanwhile, a realistic 3-D degradation model of the solder layer is constructed by an image processing method. Furthermore, an electrothermal coupling model based on the finite element is constructed to study the impact of solder degradation on the electrical and thermal characteristics of IGBT. Finally, the proposed degradation mechanism is verified by simulation and experimental results.

Design and fabrication of 10-kV silicon–carbide p-channel IGBTs with hexagonal cells and step space modulated junction termination extension**Project supported by the National Basic Research Program of China (Grant No. 2015CB759600), the Science Challenge Project, China (Grant No. TZ2018003), the National Natural Science Foundation of China (Grant Nos. 61474113, 61574140, and 61804149), the Beijing NOVA Program, China (Grant Nos. 2016071 and

10-kV 4H–SiC p-channel insulated gate bipolar transistors (IGBTs) are designed, fabricated, and characterized in this paper. The IGBTs have an active area of 2.25 mm2 with a die size of 3 mm × 3 mm. A step space modulated junction termination extension (SSM-JTE) structure is introduced and fabricated to improve the blocking performance of the IGBTs. The SiC p-channel IGBTs with SSM-JTE termination exhibit a leakage current of only 50 nA at −10 kV. To improve the on-state characteristics of SiC IGBTs, the hexagonal cell (H-cell) structure is designed and compared with the conventional interdigital cell (I-cell) structure. At an on-state current of 50 A/cm2, the voltage drops of I-cell IGBT and H-cell IGBT are 10.1 V and 8.3 V respectively. Meanwhile, on the assumption that the package power density is 300 W/cm2, the maximum permissible current densities of the I-cell IGBT and H-cell IGBT are determined to be 34.2 A/cm2 and 38.9 A/cm2 with forward voltage drops of 8.8 V and 7.8 V, respectively. The differential specific on-resistance of I-cell structure and H-cell structure IGBT are and , respectively. These results demonstrate that H-cell structure silicon carbide IGBT with SSM-JTE is a promising candidate for high power applications.

Analysis of the novel Si/SiC heterojunction IGBT characteristics by TCAD simulation

In this paper, a novel insulated gate bipolar transistor (IGBT) structure with a wide bandgap semiconductor material heterojunction is proposed for the first time. The main feature of the new IGBT structure device is the combine of the wide bandgap material SiC and the Si material to form a heterojunction, which utilizes the high critical breakdown electric field of SiC materials. When the proposed device breaks down, the innovative terminal technology of Breakdown Point Transfer which elevates device longitudinal electric field peak begins to play a role, while introducing a high electric field peak near the gate of the IGBT device into the SiC material and making the device can bear a higher breakdown voltage (BV). The analysis results show that the BV of the Si/SiC IGBT is 3–4 times higher than that of the Si IGBT. The switching characteristics of the Si/SiC IGBT can be improved due to the low minority carrier lifetime of SiC materials compared with the Si IGBT. The interfacial effect of the Si/SiC is analyzed to guide the preparation of the Si/SiC IGBT.

Modeling Inductive Switching Characteristics of High-Speed Buffer Layer IGBT

In this study, a physics-based compact model for high-speed buffer layer insulated gate bipolar transistor (IGBT) is proposed. The model utilizes the 1-D Fourier-based solution of ambipolar diffusion equation (ADE) implemented in MATLAB and Simulink. Based on the improved understanding on the inductive switching behavior of a high-speed buffer layer IGBT, the ADE is solved for all injection levels instead of high-level injection only as usually done. Assuming high-level injection condition in the buffer layer, the excess carrier transport, redistribution and recombination in the buffer layer are redescribed. Moreover, some physical characteristics such as the low conductivity of N-base at turn-on transient and free holes appeared in the depletion layer during turn-off process are also considered in the model. Finally, the double-pulse switching tests for a commercial field stop IGBT and a light punch-through carrier-stored trench bipolar transistor are used to validate the proposed model. The simulation results are compared with experiment results and good agreement is obtained.

New Modeling of Switching Devices Considering Power Loss in Electromagnetic Transients Program Simulation

This paper presents the modeling of insulated-gate bipolar transistor (IGBT) in electromagnetic transients program (EMTP) simulation for the reliable calculation of switching and conduction losses. The conventional approach considering the physical property of switching devices requires many attribute parameters and large computation efforts. In contrast, the proposed method uses the curve fitting and interpolation techniques based on typical switching waveforms and a userdefined component with variable resistances to capture the dynamic characteristics of IGBTs. Therefore, the simulation time can be efficiently reduced without losing the accuracy while avoiding the extremely small time step, which is required in simulation by the conventional method. The EMTP based simulation includes turn-on and turn-off transients of IGBT, saturation state, forward voltage of free-wheeling diode, and reverse recovery characteristics, etc. The effectiveness of proposed modeling for the EMTP simulation is verified by the comparison with experimental results obtained from practical implementation in hardware.

Analysis and discussion of false triggering of V ce desaturation protection circuit in a T‐type neutral point clamped inverter and its solutions

IGBT in a T-type inverter delivers unusual performance when accommodated with the conventional collector-emitter voltage ( V ce ) desaturation protection circuit. By analysing the switching behaviours in the corresponding control sequence, this study presents a false triggering failure phenomenon on the protection circuit. The phenomenon is theoretically analysed. It is aggravated at a larger load current and influenced by the capacitive effects in the antiparallel diode. Analysis done by the authors is validated in a three-phase 15 kW T-type inverter prototype. A false triggering of the protection circuit occurs when the current commutes among the insulated gate bipolar transistors (IGBTs) as a result of the IGBT characteristics being influenced. This study also puts forward a logic algorithm to provide guidance on hardware drive circuit or digital signal processor design depending on the analysis.