Abstract

Solder cracking hinders the thermal dissipation of insulated gate bipolar transistors (IGBTs) during their long-term servicing. In this work, the evolution of micro-cracks in the baseplate and die-attach solder layers under thermal cycling was first investigated by a proposed finite-element analysis-fatigue damage calculation (FEA-FDC) iterative simulation method. Based on that, a series of 3-D electrothermal coupling IGBT models with various cracked solder layers were obtained. Dynamic degradation in thermal characteristics of IGBTs during solder cracking was quantitatively evaluated. Temporal and spatial differences in thermal transfer behavior of IGBTs caused by baseplate and die-attach solder cracking were comparably discussed under the short circuit (SC), pulse high current (PHC), and pulsewidth modulating (PWM) operating conditions. The results show some significant differences in thermal transfer behavior of IGBT when the baseplate and die-attach solder fatigue. The die-attach solder fatigue remarkably hinders the thermal transfer of IGBTs at a smaller time scale of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$500 ~ \mu \text{s}$ </tex-math></inline-formula> and severely aggravates the non-uniformity in temperature distribution inside IGBT chips. To some extent, the die-attach solder fatigue is a more adverse failure mode of IGBTs compared with the baseplate solder fatigue under various conditions.

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