Scaling Design Effects on Surface Buffer IGBT Characteristics

Shin-Ichi Nishizawa,Wataru Saito

doi:10.1109/jeds.2021.3129162

Abstract

Scaling design effects on surface buffer (SB) insulated gate bipolar transistor (IGBT) is analyzed not only for power loss reduction but also for switching controllability and robustness using TCAD simulation. Although the scaling design improves turn-off loss and on-state voltage drop <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{V}_{ce(sat)}$ </tex-math></inline-formula> trade-off due to injection enhancement (IE) effect, turn-on surge current is increased by the enhancement of negative gate capacitance due to thin gate oxide. Dual gate control improves turn-on switching controllability by hole current path control. Short circuit robustness is improved by the scaling design, because the saturation current is decreased with the scaling design due to pinch-off of the n-MOS channel. From these results, the scaling design is effective in improving the SB-IGBT characteristics including high robustness.

Highlights

Insulated Gate Bipolar Transistor (IGBT) is a key component in power electronics applications today
This paper shows a scaling design impact on surface buffer (SB)-IGBT characteristics by TCAD simulation results
Injection Enhancement (IE) effect is enhanced by the scaling design the same as the conventional IGBT, and Eoff Vce(sat) trade-off is improved

Summary

INTRODUCTION

Insulated Gate Bipolar Transistor (IGBT) is a key component in power electronics applications today. As the most popular design, narrow mesa structure has been studied and demonstrated to improve turn-off loss Eoff and on-state voltage drop Vce(sat) trade-off [2]–[5]. As another design direction for high performance, scaling design in IGBT was proposed to enhance the IE effect and CMOS process technology [10]–[11], and the demonstration results have been reported from several groups [12]–[15]. The scaling design arrangement and theoretical analysis using TCAD simulation have been reported [16]–[19], the scaling design impact on total performance low power loss and low EMI noise and robustness have not been discussed sufficiently. Eoff Vce(sat) trade-off, switching performance and short circuit robustness are discussed

DEVICE STRUCTURE AND DESIGN CONCEPT

SHORT CIRCUIT ROBUSTNESS

CONCLUSION