Breakdown Spots Research Articles

Impact of conductivity and size of the breakdown spot on the progressive-breakdown of thin SiO 2 gate oxides

In this work, for the first time, a conductive atomic force microscope has been used to electrically characterize the progressiveness of the breakdown phenomenon of stressed thin (2.9 and 4.2 nm) SiO 2 films at a nanometer scale. The extremely high lateral resolution of the technique allows to analyse independently the role of the oxide conductivity and the area of the breakdown (BD) spot. In particular, the results show that the gradual increase of the overall current that flows through the broken down oxide area is the consequence of the progressive growth of both parameters: the oxide conductivity at the location where BD was initially triggered and the size of the BD spot.

Statistical model for radiation-induced wear-out of ultra-thin gate oxides after exposure to heavy ion irradiation

In this work, we present an original model to explain the accelerated wear-out behavior of irradiated ultra-thin oxides. The model uses a statistical approach to the breakdown occurrences based on a nonhomogeneous Poisson process. By means of our model, we can estimate the number and the time evolution of those damaged regions produced by ion hits that generate breakdown spots during high field stresses after irradiation, including the dependence on the oxide field. Also, by using the proposed model, we have studied the wear-out dependence on the stress voltage, gate area, and ion fluence. In particular, by studying the stress voltage dependence of wear-out acceleration, it is feasible to extrapolate the device lifetime even at low operating voltage.

Breakdown transients in ultrathin gate oxides: transition in the degradation rate.

We report a sharp threshold at 4 V in the growth rate of breakdown spots in thin films of SiO2 on silicon. This provides some of the first information concerning the electronic structure of the breakdown spot.

Electrical characterization and fabrication of SiO2based metal–oxide–semiconductor nanoelectronic devices with atomic forcemicroscopy

Atomic force microscopy (AFM) has been used to fabricate and electrically characterize SiO2films as gate dielectrics of metal–oxide–semiconductor (MOS) electronic devices.The electrical properties of the AFM grown oxide (3 nm thick) have beendetermined at a nanometric scale and compared to those of thermal gate oxides(GOXs). The results show a similar electrical behaviour of both kinds ofoxide. Furthermore, the broken down GOX locations (breakdown spots)induced in microelectronic-sized devices have been located and electricallycharacterized with AFM. The results indicate that AFM is a suitable tool for thefabrication and reliability analysis of present and future Si/SiO2based MOS nanoelectronic devices.

Imaging breakdown spots in SiO/sub 2/ films and MOS devices with a conductive atomic force microscope

Conductive atomic force microscopy (C-AFM) was used to study the dielectric breakdown of SiO/sub 2/ layers at a nanometric scale. First, bare oxide regions were stressed and broken down using the tip as the metal electrode of a MOS structure. The results show that the initial breakdown is electrically propagated to neighbor regions, affecting their dielectric strength. Moreover, the area affected by the initial breakdown depends on the breakdown hardness. In particular, it is shown that this area is smaller when the current through the structure is limited during the experiments. The effect of the current limitation is analyzed in detail. Based on the results, a qualitative picture of the breakdown process is presented, which accounts for this effect. Finally, for the first time, the breakdown spots in standard MOS devices (with poly-Si gate) are electrically imaged with C-AFM. The areas of the observed spots are in agreement with those obtained on bare oxides.

Active photometry of atmospheric compositions by microwave breakdown plasma spectroscopy

A laboratory technique of pulsed microwave breakdown plasma spectroscopy (MBS) has been developed for simultaneous, quantitative, in situ, and remote diagnostics of atmospheric compositions. This technique, based upon a concept proposed by Papadopoulos et al. [1994], enables for remote photometry of the atomic/molecular spectra emitted from the microwave breakdown plasma of the atmosphere mixed with various kinds of trace gases and air pollutants at relevant breakdown spots in open space. Two different breakdown methods, the single beam method and the dual beam intersection method, have been tested using a small test chamber, a pulsed 9.4 GHz/100 kW magnetron tube, and a high‐resolution wavelength/time resolution spectroscopy system. Major 50 lines of atomic/molecular spectra emitted from N2, O2, Cl, F, CN, and OH radical in the plasma of model/real atmosphere have been assigned and compared with the emission candidates in the stratosphere predicted by Papadopoulos et al. Very many strong emission lines including, for example, 837.6 nm (4p4D07/2 → 4s4P5/2) of Cl(I) and 777.4 nm (3p5P1,2,3 → 3s5S02) of O(I) can be observed, most of which have not been expected yet in their theoretical approach. Also, the controllability of the pulsed microwave breakdown power as well as the quantitative detection limit of trace gases has been examined both experimentally and theoretically.

Analysis of the electrical breakdown in hydrogenated amorphous silicon thin-film transistors

Electrical breakdown induced by systematic electrostatic discharge (ESD) stress of thin-film transistors used as switches in active matrix addressed liquid crystal displays has been studied using electrical measurements, electrical simulations, electrothermal simulations, and postbreakdown observations. Breakdown due to very short pulses (up to 1 /spl mu/s) shows a clear dependence on the channel length. A hypothesis that electrical breakdown in the case of short channel TFTs is due to the punch-through is built on this dependence and is proved by means of electrical simulations. Further, the presence of avalanche breakdown in amorphous silicon thin-film transistors is simulated and confirmed. It is finally assumed that the breakdown is a thermal process. Three-dimensional (3-D) electrothermal simulations are performed in the static and transient regime, confirming the location of the breakdown spot within the TFT from the electrical simulations and postbreakdown observations.

Charge Transport after Hard Breakdown in Gate Oxides

We show measurement results and simulations of current–voltage characteristics of Metal-Oxide-Semiconductor capacitors after hard breakdown. The devices exhibit either point contact or diode behaviour, depending on electrode and substrate characteristics and the bias regime. The charge transport characteristics were reproduced in device simulations, including the dependence on the gate dimensions and breakdown spot size.

Reliability limits for the gate insulator in CMOS technology

Aggressive scaling of the thickness of the gate insulator in CMOS transistors has caused the quality and reliability of ultrathin dielectrics to assume greater importance. This paper reviews the physics and statistics of dielectric wearout and breakdown in ultrathin SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> -based gate dielectrics. Estimating reliability requires an extrapolation from the measeurment conditions (e.g., higher voltage) to normal operation conditions. To reduce the error in this extrapolation, long-term (>1 year) stress experiments have been used to measure the wearout and breakdown of ultrathin (<2 nm) dielectric films as close as possible to operating conditions. Measured over a sufficiently wide range of stress conditions, the time to breakdown (T <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BD</inf> ) does not obey any simple “law” such as exponential dependence on electric field or voltage, as has been commonly assumed in reliability extrapolations. Thus, the interpretation of T <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BD</inf> data remains somewhat controver sial. Present research is aimed at better understanding the nature of the electrical conduction through a breakdown spot, and the effect of the oxide breakdown on device and circuit performance. In some cases an oxide breakdown may not lead to immediate circuit failure, so more research is needed in order to develop a quantitative methodology for predicting the reliability of circuits.

Origin of substrate hole current after gate oxide breakdown

The origin of the substrate hole currents after gate oxide breakdown in metal-oxide-semiconductor field-effect transistor (nMosFET) devices is investigated, using spectroscopic and conventional photon emission microscopy. Spectral analysis of light from the breakdown locations, under positive gate bias, indicates that hot electrons mediate the light emitted from the breakdown spots. These hot electrons are generated by the high electric fields at the location of the breakdown. Furthermore, light emission due to substrate hole recombination with electrons injected from the gate through the leakage path (breakdown location) dominates the light emission spectrum under negative gate bias. This finding is further verified using carrier separation measurements. In these measurements, minority carrier currents induced by the light emitted at the breakdown location and measured at a remote pn junction are compared with the substrate hole currents before and after oxide breakdown. These measurements prove that under positive gate bias, the substrate hole current and the light emission from the breakdown locations, are dominated by hot electron impact ionization mechanism in the substrate.

Initial images of complete breakdown of liquid nitrogen/polymer film

This paper describes an experimental study,on the prebreakdown phenomena in a liquid-nitrogen/polymer-film composite subjected to dc ramp and step voltages under point-plane electrode system. In order to clarify the formative process of the complete breakdown of the composite, photographic observation was carried out using a long image guide scope and an image intensifier with high speed gate in the nanosecond region. When a negative-plane electrode was covered by a polymer film (N-cover arrangement), a luminous region on the initial image of the complete breakdown was located near the negative-plane under both the ramp and the step voltages. These results suggested that the complete breakdown of the composite in the N-cover arrangement was caused by the film breakdown due to positive charges deposition and subsequent electron emission from the film breakdown spot. When a positive-plane electrode was covered by the film (P-cover arrangement), film breakdown could not trigger the complete breakdown under the ramp voltage because the film breakdown occurred at a low applied voltage. However, intense light near the positive-plane was observed at the initial stage of the complete breakdown under the relatively high step voltage. This was because the film breakdown under the high applied voltage induced the positive streamer propagation from the film breakdown spot.

Soft breakdown at all positions along the N-MOSFET

We observe soft breakdowns at all positions along the gates of N-MOSFETs when testing is performed at low voltage or with low current compliance. Devices whose breakdown spots are at or near the gate–drain overlap region have the highest off-currents, although not high enough to be fatal to device operation.

Carrier transport properties of thin gate oxides after soft and hard breakdown

This paper presents the experimental results of the carrier conduction mechanism in thin gate oxides after soft and hard breakdowns, obtained from the carrier separation technique. This technique allows the identification of the dominant carrier type on the gate leakage current, which is shown to be an important factor for clarifying the physical picture of breakdown spots. The carrier conduction after hard breakdown is shown to be dominated by the majority carrier in the poly Si gate, meaning that the poly Si gate is directly contacting a Si substrate after hard breakdown. It is found, on the other hand, that hole current becomes dominant on the leakage path after soft breakdown. This difference in dominant carrier type between soft and hard breakdown suggests that the ultrathin oxide region still remains in the leakage path after soft breakdown. The dominance of hole current is attributable to larger tunneling probability of holes than that of electrons through the extremely-thin oxide region remaining after soft breakdown.

Breakdown Modes and Breakdown Statistics of Ultrathin SiO2 Gate Oxides

The dielectric breakdown of ultra-thin silicon dioxide films used as gate insulator in MOSFETs is one of the most important reliability issues in CMOS technology. In this paper, two main aspects of oxide breakdown are considered: the modeling of the breakdown statistics and the properties of the two main breakdown modes, namely Soft Breakdown and Hard Breakdown. The most invoked models for the breakdown statistics that relate defect generation and breakdown are reviewed. Particular attention is paid to the percolation models and to a recent cell-based analytic picture. The scaling of the breakdown distribution with oxide thickness is considered and it is shown that both pictures are equivalent for ultra-thin oxides. It is shown that soft and hard breakdown show coincident statistics and this is used to conclude that both breakdown models are triggered by the formation of the same kind of defect-related conduction paths. The big differences in the post-breakdown conduction properties are attributed to phenomena occurring during the very fast breakdown current runaway that determine the area of the final breakdown spot. The properties of soft and hard breakdown are explained within the common framework of a model based on quantum-point-contact conduction. This mesoscopic approach to the post-breakdown conduction is shown to explain the main experimental results including conductance quantization after hard breakdown, the area and thickness independence of the soft-breakdown I(V) characteristics and the statistical correlation between current level and normalized conductance. Finally, we deal with some open questions and relevant issues that are now subject of intensive investigations. The fact that some breakdown events can be tolerated for some digital applications is considered. In this regard, the distinction between breakdown and device failure distributions is made and some implications for device reliability are discussed. It is argued that energy dissipation during the breakdown runaway can determine the breakdown efficiency, the prevalence ratio of soft to hard breakdown, and their variations with stress conditions, experimental setup (series impedance) and sample characteristics.

BREAKDOWN MODES AND BREAKDOWN STATISTICS OF ULTRATHIN SiO2 GATE OXIDES

The dielectric breakdown of ultra-thin silicon dioxide films used as gate insulator in MOSFETs is one of the most important reliability issues in CMOS technology. In this paper, two main aspects of oxide breakdown are considered: the modeling of the breakdown statistics and the properties of the two main breakdown modes, namely Soft Breakdown and Hard Breakdown. The most invoked models for the breakdown statistics that relate defect generation and breakdown are reviewed. Particular attention is paid to the percolation models and to a recent cell-based analytic picture. The scaling of the breakdown distribution with oxide thickness is considered and it is shown that both pictures are equivalent for ultra-thin oxides. It is shown that soft and hard breakdown show coincident statistics and this is used to conclude that both breakdown models are triggered by the formation of the same kind of defect-related conduction paths. The big differences in the post-breakdown conduction properties are attributed to phenomena occurring during the very fast breakdown current runaway that determine the area of the final breakdown spot. The properties of soft and hard breakdown are explained within the common framework of a model based on quantum-point-contact conduction. This mesoscopic approach to the post-breakdown conduction is shown to explain the main experimental results including conductance quantization after hard breakdown, the area and thickness independence of the soft-breakdown I(V) characteristics and the statistical correlation between current level and normalized conductance. Finally, we deal with some open questions and relevant issues that are now subject of intensive investigations. The fact that some breakdown events can be tolerated for some digital applications is considered. In this regard, the distinction between breakdown and device failure distributions is made and some implications for device reliability are discussed. It is argued that energy dissipation during the breakdown runaway can determine the breakdown efficiency, the prevalence ratio of soft to hard breakdown, and their variations with stress conditions, experimental setup (series impedance) and sample characteristics.

Breakdown and anti-breakdown events in high-field stressed ultrathin gate oxides

As a high-field voltage sweep proceeds, the post-breakdown I–V characteristic of an ultrathin gate oxide shows abrupt upward and downward steps which are a clear manifestation of the local area character of the associated conduction mechanism. Moreover, the leakage current through the breakdown spots exhibits conductance values very similar to those found in quantum point contacts, indicating that the conductive paths connecting both electrodes have atomic-scale dimensions. In this work, we propose that some of these jumps in the I–V characteristic might be caused by a local rearrangement of atoms or defects due to the high current density forced to flow through the breakdown path. This is a well-known effect in point contacts where the so-called electron wind force encourages the atomic motion.

Local current fluctuations before and after breakdown of thin SiO 2 films observed with conductive atomic force microscope

Very thin SiO 2 films (3–6 nm) have been characterized with a conductive atomic force microscope (C-AFM). The set-up allows the electrical characterization of 30–50 nm 2 areas, which are of the order of single breakdown spots. Voltage ramps have been repeatedly applied to induce the degradation. On these spots, the phenomenology observed is quite similar to that during conventional electrical tests. In particular, on–off fluctuations before and after breakdown are reported on single breakdown spots. The results confirm the C-AFM as a suitable tool for the analysis of the gate oxide electrical properties and degradation dynamics at a nanometer scale.

Pre- andpost-breakdown switching behaviour inultrathin SiO2 layers detected by C-AFM

Ultrathin SiO2 films (3-6 nm) have beenelectrically characterized with a conductive atomic forcemicroscope. This technique allows the electricalcharacterization of areas of ~100 nm2, whichare comparable to the area of breakdown spots. Sequences ofvoltage ramps on fixed oxide locations have been applied toinduce the oxide degradation and its conduction properties havebeen analysed within the nanometre scale range. In particular, on-offfluctuations before and after breakdown are reported on singlebreakdown spots.

Physical and predictive models of ultrathin oxide reliability in CMOS devices and circuits

The microelectronics industry owes its considerable success largely to the existence of the thermal oxide of silicon. However, recently there is concern that the reliability of ultra-thin dielectrics will limit further scaling to slightly thinner than 2 mm. This paper will review the physics and statistics of dielectric wearout and breakdown in ultrathin SiO/sub 2/-based gate dielectrics. Electrons or holes tunneling through the gate oxide generate defects until a critical density is reached and the oxide breaks down. The critical defect density is explained by the formation of a percolation path of defects across the oxide. Only <1% of these paths ultimately lead to destructive breakdown, and the microscopic nature of these defects is not known. The rate of defect generation decreases approximately exponentially with supply voltage, below a threshold voltage of about 5 V for hot electron-induced hydrogen release. However, the tunnel current also increases exponentially with decreasing oxide thickness, leading to a decreasing time-to-breakdown and a diminishing margin for reliability as device dimensions are scaled. Estimating the reliability of the dielectric requires an extrapolation from the measurement conditions (e.g., higher voltage) to operation conditions. Because of the diminished reliability margin. it has become imperative to try to reduce the error in this extrapolation, Long-term (>1 year) stress experiments are now being used to measure the wearout and breakdown of ultrathin (<2 nm) dielectric films as close as possible to operating conditions. These measurements have revealed the details of the voltage dependence of the defect generation rate and critical defect density, allowing better modeling of the voltage dependence of the time-to-breakdown, Such measurements are used to guide the technology development prior to the manufacturing stage. We then discuss the nature of the electrical conduction through a breakdown spot and the effect of the oxide breakdown on device and circuit performance. In some cases, an oxide breakdown does not lead to immediate circuit failure, so more research is needed in order to develop a quantitative methodology for predicting the reliability of circuits.

Feasibility of the electrical characterization of single SiO 2 breakdown spots using C-AFM

Due to the progressive scaling down of MOS devices, new methods are required to study the failure mechanisms of the gate oxide in a nanometer range. In this work, an atomic force microscope equipped with a conductive tip and a sensitive preamplifier has been used to study the electrical properties and degradation dynamics of single breakdown spots of 3–6 nm SiO 2 films on a nanometer scale. With this purpose, voltage ramps over areas of 30–50 nm 2 (of the order of the breakdown spot area) have been repeatedly applied to induce the degradation of the SiO 2 films. Similar results to those observed with conventional tests (such as the switching between two states of well-defined conductivity) have been measured with this technique. As a conclusion, our results point out the conductive atomic force microscope as a tool for the analysis of the electrical properties and degradation of single breakdown spots.