Abstract

Conductive atomic force microscopy (C-AFM) was used to study the dielectric breakdown of SiO/sub 2/ layers at a nanometric scale. First, bare oxide regions were stressed and broken down using the tip as the metal electrode of a MOS structure. The results show that the initial breakdown is electrically propagated to neighbor regions, affecting their dielectric strength. Moreover, the area affected by the initial breakdown depends on the breakdown hardness. In particular, it is shown that this area is smaller when the current through the structure is limited during the experiments. The effect of the current limitation is analyzed in detail. Based on the results, a qualitative picture of the breakdown process is presented, which accounts for this effect. Finally, for the first time, the breakdown spots in standard MOS devices (with poly-Si gate) are electrically imaged with C-AFM. The areas of the observed spots are in agreement with those obtained on bare oxides.

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