Basic Logic Operations Research Articles

Modeling cyber-physical attacks based on probabilistic colored Petri nets and mixed-strategy game theory

Cyber-physical attacks are posing great threats to the safety and security of cyber-physical systems. Modeling cyber-physical attacks reasonably and efficiently is the basis for defending cyber-physical systems effectively, which requires the development of quantitative analysis and modeling approaches for expressing threat propagation in cyber-physical systems. This paper extends the colored Petri net model by defining a probabilistic colored Petri net model that comprises basic models, rules, logical operators and transitions that describe threat propagation between nodes. Basic cyber-physical attack models based on probabilistic colored Petri nets are presented. Furthermore, a systematic modeling approach is presented for constructing a quantitative cyber-physical attack model for a cyber-physical system. The weights of the cyber-physical attack model connections are computed using a mixed-strategy attack-defense game model for each node and solving the Nash equilibrium. Additionally, a hierarchical method of division and integration is proposed to efficiently model complex, large-scale cyber-physical systems. Finally, the systematic cyber-physical attack modeling approach is applied to a case study involving a thermal power plant.

Reconfigurable Magnetic Logic Combined with Nonvolatile Memory Writing.

In magnetic logic, four basic Boolean logic operations can be programmed by a magnetic bit at room temperature with a high output ratio (>103 %). In the same clock cycle, benefiting from the built-in spin Hall effect, logic results can be directly written into magnetic bits using an all-electric method.

Compact transformable acoustic logic gates for broadband complex Boolean operations based on density-near-zero metamaterials

The extraordinary transmission in density-near-zero (DNZ) acoustic metamaterials (AMs) provides possibilities to manipulate acoustic signals with extremely large effective phase velocity and wavelength. Here, we report compact transformable acoustic logic gates with a subwavelength size as small as 0.82λ based on DNZ AMs. The basic acoustic logic gates, composed of a tri-port structure filled with space-coiling DNZ AMs, enable precise direct linear interference of input signals with considerably small phase lag and wavefront distortion. We demonstrate both theoretically and experimentally the basic Boolean logic operations such as OR, AND, XOR, and NOT with wide operational frequency ranges and controllability, by adjusting the phase difference between two input signals. More complex logic calculus, such as “I1 + I2 × I3,” are also realized by cascading of the basic logic gates. Our proposal provides diverse routes to construct devices for acoustic signal computing and manipulations.

Extremely Large Magnetoresistance at Low Magnetic Field by Coupling the Nonlinear Transport Effect and the Anomalous Hall Effect.

The anomalous Hall effect of a magnetic material is coupled to the nonlinear transport effect of a semiconductor material in a simple structure to achieve a large geometric magnetoresistance (MR) based on a diode-assisted mechanism. An extremely large MR (>10(4) %) at low magnetic fields (1 mT) is observed at room temperature. This MR device shows potential for use as a logic gate for the four basic Boolean logic operations.

Reconfigurable logic via gate controlled domain wall trajectory in magnetic network structure.

An all-magnetic logic scheme has the advantages of being non-volatile and energy efficient over the conventional transistor based logic devices. In this work, we present a reconfigurable magnetic logic device which is capable of performing all basic logic operations in a single device. The device exploits the deterministic trajectory of domain wall (DW) in ferromagnetic asymmetric branch structure for obtaining different output combinations. The programmability of the device is achieved by using a current-controlled magnetic gate, which generates a local Oersted field. The field generated at the magnetic gate influences the trajectory of the DW within the structure by exploiting its inherent transverse charge distribution. DW transformation from vortex to transverse configuration close to the output branch plays a pivotal role in governing the DW chirality and hence the output. By simply switching the current direction through the magnetic gate, two universal logic gate functionalities can be obtained in this device. Using magnetic force microscopy imaging and magnetoresistance measurements, all basic logic functionalities are demonstrated.

Inverted Fuzzy Implications in Approximate Reasoning

In 1973 Lotfi Zadeh introduced the theory of fuzzy logic [17]. Fuzzy logic was an extension of Boolean logic so that it allowed using not only Boolean values to express reality. One kind of basic logical operations in fuzzy logic are so-called fuzzy implications. From over eight decades a number of different fuzzy implications have been described [3] - [16]. In the family of all fuzzy implications the partial order induced from [0,1] interval exists. Pairs of incomparable fuzzy implications can generate new fuzzy implications by using min(inf) and max(sup) operations. As a result the structure of lattice is created ([1], page 186). This leads to the following question: how to choose the correct functions among basic fuzzy implications and other generated as described above. In our paper, we propose a new method for choosing implications. Our method allows to compare two fuzzy implications. If the truth value of the antecedent and the truth value of the implication are given, by means of inverse fuzzy implications we can easily optimize the truth value of the implication consequent. In other words, we can choose the fuzzy implication, which has the greatest or the smallest truth value of the implication consequent or which has greater or smaller truth value than another implication. Primary results regarding this problem are included in the paper [14].

THE INFLUENCE OF METHODICS USED IN SCHOOL LESSONS ON THE LEVEL OF PUPIL´S LOGICAL THINKING

It is observed that children age period between of 10–12 years which is critical in terms of both dimensional structures and of logical considerations also influences the ability of abstraction which correlates with a pupil’s ability to work with the basic logical operators. It is this assumption that leads to the question what logical reasoning in terms of understanding logical connections and general and existential quantifier are pupils of primary school capable of and what impact different approaches or methods in teaching have on this ability. It is necessary to describe the target group in terms of cognitive, verbal and also neurological development in relation to cognitive functions and logical thinking. Also discussed were the issues of the possibility of defining and measuring the logical thinking level, of the effect of gender on the level of logical thinking or of influence of its level on a pupil’s assessment in mathematics. The testing was carried out on 420 respondents attending the fourth and fifth year of primary schools in the Czech Republic. About half of these respondents attend schools that use conventional methods and about half attend schools with other methods. It is interesting that pupils thought, for example, according to methodologies based on the principles of constructivism reached a higher score in the test focusing on the level of logical thinking than pupils that are taught according to conventional values. However, the survey of statistical significance showed that this difference is not statistically significant. In contrast, the influence of ability to understand basic logical connections on school assessment seems to be significant. The issue of gender influence or other intervening variables on a pupil’s ability to work with the basic logical operators is further discussed in the article. Keywords: abstraction, logical thinking, logical connections

An IEC 61131-3-based PLC implemented by means of an FPGA

The paper discusses the design process of a programmable logic controller implemented by means of an FPGA device. The PLC implements on the machine language level a subset of the instruction set defined in the EN 61131-3 norm. Different aspects of instruction list and hardware architecture design are presented, however two aspects are the most important: Central Processing Unit (CPU) and the Arithmetic and Logic Unit (ALU). The ALU can execute 34 operations, which include the basic logic operations, comparators, and the four basic arithmetic operations. The operations can be performed for fixed-point and floating-point numbers. All the operations are implemented fully in hardware, so the solution is fast. The developed PLC is implemented using an FPGA device; however, the HDL models used for synthesis can be easily ported to an ASIC.

The universal magnetic tunnel junction logic gates representing 16 binary Boolean logic operations

The novel devices are expected to shift the paradigm of a logic operation by their own nature, replacing the conventional devices. In this study, the nature of our fabricated magnetic tunnel junction (MTJ) that responds to the two external inputs, magnetic field and voltage bias, demonstrated seven basic logic operations. The seven operations were obtained by the electric-field-assisted switching characteristics, where the surface magnetoelectric effect occurs due to a sufficiently thin free layer. The MTJ was transformed as a universal logic gate combined with three supplementary circuits: A multiplexer (MUX), a Wheatstone bridge, and a comparator. With these circuits, the universal logic gates demonstrated 16 binary Boolean logic operations in one logic stage. A possible further approach is parallel computations through a complimentary of MUX and comparator, capable of driving multiple logic gates. A reconfigurable property can also be realized when different logic operations are produced from different level of voltages applying to the same configuration of the logic gate.

A Complementary Resistive Switch-Based Crossbar Array Adder

Redox-based resistive switching devices (ReRAM) are an emerging class of non-volatile storage elements suited for nanoscale memory applications. In terms of logic operations, ReRAM devices were suggested to be used as programmable interconnects, large-scale look-up tables or for sequential logic operations. However, without additional selector devices these approaches are not suited for use in large scale nanocrossbar memory arrays, which is the preferred architecture for ReRAM devices due to the minimum area consumption. To overcome this issue for the sequential logic approach, we recently introduced a novel concept, which is suited for passive crossbar arrays using complementary resistive switches (CRSs). CRS cells offer two high resistive storage states, and thus, parasitic sneak currents are efficiently avoided. However, until now the CRS-based logic-in-memory approach was only shown to be able to perform basic Boolean logic operations using a single CRS cell. In this paper, we introduce two multi-bit adder schemes using the CRS-based logic-in-memory approach. We proof the concepts by means of SPICE simulations using a dynamical memristive device model of a ReRAM cell. Finally, we show the advantages of our novel adder concept in terms of step count and number of devices in comparison to a recently published adder approach, which applies the conventional ReRAM-based sequential logic concept introduced by Borghetti et al.

A three-valued photoelectrochemical logic device realising accept anything and consensus operations.

A new application of a hybrid material exhibiting the photoelectrochemical photocurrent switching (peps) effect in a three-valued logic device is reported. In contrast to other similar peps-based systems, the one described here is capable of performing basic ternary logic operations: gullibility and consensus.

A Hardware Implementation of Arithmetic Operations for an FPGA-based Programmable Logic Controller

The paper presents the Arithmetic and Logic Unit (ALU) of a prototype Programmable Logic Controller (PLC), implemented in an FPGA device. The PLC implements on the machine language level a subset of the instruction set defined in the EN 61131-3 norm. The design was prepared as a set of synthesizable Verilog, and VHDL models. The ALU can execute 32 operations, which include the basic logic operations, comparators, and the four basic arithmetic operations. The operations can be performed for fixed-point, and floating-point numbers. All the operations are implemented fully in hardware, so the solution is fast. The HDL models used for synthesis can be easily ported to other FPGA architectures, or to an ASIC.

물의 흐름을 이용한 논리 게이트 기반 융합형 중등 정보과학 영재 교수·학습 자료 개발

우리나라 영재교육은 2002년 시작된 이후 이제 교육지원체계가 확립되었고, 양적 측면에서 충분한 성장을 이루었다. 반면에 교육의 질적인 측면에서는 미흡한 점이 있다는 보고가 많다. 즉, 대부분의 영재교육이 선행학습에 의한 단순 지식확대 위주로 이루어진다는 것이다. 영재 교육의 질을 높이기 위해서는 간학문적 원리와 현상을 문제해결에 적용할 수 있는 비판적 사고력 및 창의력 배양 교육이 되어야 한다. 이 연구에서는 통합교육 개념에 근거하여 AND/OR/XOR 등의 기본 논리 연산이 컴퓨터의 세포 역할을 하게 되는 과정을 탐구하는 융합형 교수 학습 자료를 설계하고 개발하였다. 설문 조사 결과 기존의 다른 학습 주제보다 학생들의 만족도(유익성, 이해도, 흥미도)가 크게 높은 것으로 평가되어 설계 취지에 부합된 것으로 나타났다. Since the start of gifted education in 2002, educational support system has now been established, and sufficient growth in quantitative aspects has been achieved in Korea. On the other hand, they report that there are insufficient points in terms of education quality. In other words, most of the gifted education simply expands knowledge by prior-learning. In order to improve the quality of gifted education, they should enhance critical-thinking and creativity able to apply interdisciplinary principles or phenomena for solving problems. In this study, we designed and developed a convergent teaching-learning materials based on the concept of integrated education, which explore the process that basic logic operations such as AND, OR, XOR do the role of computer cells. A survey result showed that student satisfaction(usefulness, understanding, interest) of the materials is significantly higher than that of other traditional learning topics, and the design intent was met.

Pixel‐parallel feature detection on vision chip

Pixel-parallel FAST and SIFT feature detection algorithms are proposed, which are suitable for the vision chip architecture. The proposed algorithms can execute the FAST and SIFT feature detections on the vision chip in a pixel-parallel manner. The Feature detection utilising the proposed algorithms can be realised by basic logic and arithmetic operations. Experiments and detailed analysis show that the proposed algorithms can perform feature detection on the vision chip at a higher speed compared with that on a general processor or an application-specific circuit.

Quantum morphology operations based on quantum representation model

Quantum morphology operations are proposed based on the novel enhanced quantum representation model. Two kinds of quantum morphology operations are included: quantum binary and grayscale morphology operations. Dilation and erosion operations are fundamental to morphological operations. Consequently, we focus on quantum binary and flat grayscale dilation and erosion operations and their corresponding circuits. As the basis of designing of binary morphology operations, three basic quantum logic operations AND, OR, and NOT involving two binary images are presented. Thus, quantum binary dilation and erosion operations can be realized based on these logic operations supplemented by quantum measurement operations. As to the design of flat grayscale dilation and erosion operations, the searching for maxima or minima in a certain space is involved; here, we use Grover's search algorithm to get these maxima and minima. With respect that the grayscale is represented by quantum bit string, the quantum bit string comparator is used as an oracle in Grover's search algorithm. In these quantum morphology operations, quantum parallelism is well utilized. The time complexity analysis shows that quantum morphology operations' time complexity is much lower or equal to the classical morphology operations.

Differential and integral calculus for logical operations. A matrix-vector approach

A variety of problems emerged investigating electronic circuits, computer devices and cellular automata motivated a number of attempts to create a differential and integral calculus for Boolean functions. In the present article, we extend this kind of calculus in order to include the semantic of classical logical operations. We show that this extension to logics is strongly helped if we submerge the elementary logical calculus in a matrix-vector formalism that naturally includes a kind of fuzzy-logic. In this way, guided by the laws of matrix algebra, we can construct compact representations for the derivatives and the integrals of logical functions. Inside this semantic-algebraic calculus, we obtain expressions for the derivatives of some of the basic logical operations and show the general way to obtain the derivatives of any well-formed formula of propositional calculus. We show that some of the basic tautologies (Excluded middle, Modus ponens, Hypothetical syllogism) are members of a kind of hierarchical system linked by the differentiation algorithm. In addition using the logical derivatives we show that relatively complex formulas can collapse in simple expressions that reveal clearly their hidden logical meaning. The search for the antiderivatives produces naturally an integral calculus. Within this logical formalism an indefinite integral can always be found for any logical expression. Moreover, particular integrals can be constructed based on detachment properties that lead to logical expressions of growing complexity. We show that these particular integrals have some similarities with the 'generalizing deduction' procedures investigated by Lukasiewicz.

Compact modeling of perpendicular nanomagnetic logic based on threshold gates

In this work, we show that physical-based compact modeling of perpendicular Nanomagnetic Logic is crucial for the design and simulation of complex circuitry. A compact model for field-coupled nanomagnets based on an Arrhenius switching model and finite element calculations is introduced. As physical parameters have an enormous influence on the behavior of the circuit, their modeling is of great importance. Exemplarily, a 1-bit full adder based on threshold logic gates is analyzed due to its reliability. The obtained findings are used to design a pure magnetic arithmetic logic unit, which can be used for basic Boolean and logic operations.

Constructing DNA-based Parallel Adder with Basic Logic Operations in the Adleman-Liption Model

It is shown first by Adleman that deoxyribonucleic acid (DNA) strands could be employed towards calculating solution to an instance of The NP-complete Hamiltonian Path Problem (HPP). Lipton also demonstrated that Adleman's techniques could be used to solve the satisfiability (SAT) problem. In this paper, it is demonstrated how the DNA operations presented by Adleman and Lipton can be used to construct bio-molecular parallel adder with basic logic operations in the Adleman-Lipton model.

Design of quaternary logic circuit using quantum dot gate-quantum dot channel FET (QDG–QDCFET)

This paper presents the implementation of quaternary logic circuits based on quantum dot gate–quantum dot channel field effect transistor (QDG–QDCFET). The super lattice structure in the quantum dot channel region of QDG–QDCFET and the electron tunnelling from inversion channel to the quantum dot layer in the gate region of a QDG–QDCFET change the threshold voltage of this device which produces two intermediate states between its ON and OFF states. This property of QDG–QDCFET is used to implement multi-valued logic for future multi-valued logic circuit. This paper presents the design of basic quaternary logic operation such as inverter, AND and OR operation based on QDG–QDCFET.

Compact modeling of CRS devices based on ECM cells for memory, logic and neuromorphic applications

Dynamic physics-based models of resistive switching devices are of great interest for the realization of complex circuits required for memory, logic and neuromorphic applications. Here, we apply such a model of an electrochemical metallization (ECM) cell to complementary resistive switches (CRSs), which are favorable devices to realize ultra-dense passive crossbar arrays. Since a CRS consists of two resistive switching devices, it is straightforward to apply the dynamic ECM model for CRS simulation with MATLAB and SPICE, enabling study of the device behavior in terms of sweep rate and series resistance variations. Furthermore, typical memory access operations as well as basic implication logic operations can be analyzed, revealing requirements for proper spike and level read operations. This basic understanding facilitates applications of massively parallel computing paradigms required for neuromorphic applications.