Base Collector Research Articles

On bistable behavior and open-base breakdown of bipolar transistors in the avalanche regime-modeling and applications

In the presence of carrier multiplication in the base collector diode the I/sub c/(I/sub b/, V/sub ce/) characteristics of bipolar transistors show a bistable region of operation. This phenomenon is investigated experimentally and theoretically with the help of the extended Gummel/Poon model. Analysis of the output characteristics yields two breakdown voltages which mark the boundaries of the bistable regime on the V/sub ec/ axis. A generalization of Miller's formula is used to model the decrease of the multiplication factor with increasing transfer current, required for proper description of the input characteristics in the bistable regime. The input characteristics in the bistable regime are used for a discussion of a special BiCMOS SRAM cell that only employs two devices. Formulas for LO and HI level, as well as the switching point, are derived and used for a discussion of power dissipation, area requirements, and noise immunity of the cell. >

Effects of base-emitter junction on the resonant tunneling bipolar transistor with double barriers in teh emitter

A resonant-tunneling bipolar transistor with a series of double barriers (DBs) in the emitter grown by molecular beam epitaxy was studied. The current-voltage characteristics exhibiting S-shaped negative differential resistance (NDR) but not N-shaped NDR behavior were observed. Due to the influence of the base-emitter junction which cannot reach a flatband condition at the resonant situation, the subband level of the DB is smaller than the electrostatic potential of the base-emitter (B-E) junction. Thus the N-type NDR cannot be observed. With further increasing bias, avalanche breakdown occurs in the base-collector (B-C) junction to produce electron-hole pairs. Multiple S-shaped NDR behavior is observed in the collector current-voltage ( I C- V CE) characteristics from holes sequentially accumulated at the valence band maxima of teh base region and a series of DB heterostructures in the emitter. Transistor behavior is observed for high-level base injection (e.g. 1 mA/step) while the switching characteristics of a thyristor are observed for low-level base injection (e.g. 50 μA/step). The multistate operation of the new phenomenon opens up opportunities for digital and analog circuits with greatly reduced complexity and multiple valued logic.

Transistor design for predictable power gain at maximum frequency

Equations which define the neutral base width, collector doping, and epitaxial collector thickness of a bipolar transistor giving a specified unilateral power gain at the highest frequency, possible are derived. Emitter-base capacitance, emitter delay, emitter stripe width, base doping, and the operating base-collector voltage are assumed to be known and fixed. The hybrid- pi equivalent circuit is assumed valid up to the transition frequency f/sub t/. Peak f/sub max/ (maximum oscillation frequency) is examined as a function of the collector doping. Maximizing f/sub max/ at all costs leads to a design with an f/sub t/ which approaches zero. In designing a transistor, the two figures of merit must be traded off against each other. A simple expression giving maximum f/sub max//f/sub t/ is derived and used to define the transistor design which gives some specified power gain at the highest possible frequency. >

Stability of carbon and beryllium-doped base GaAs/AlGaAs heterojunction bipolar transistors

GaAs/AlGaAs heterojunction bipolar transitors (HBTs) utilizing highly Be-doped base layers display a rapid degradation of dc current gain and junction ideality factors during bias application at elevated temperature. For example, the gain of a 2×10 μm2 device with a 4×1019 cm−3 Be-doped base layer operated at 200 °C with a collector current of 2.5×104 A cm−2 falls from 16 to 1.5 within 2 h. Both the base emitter and base collector junction ideality factors also rise rapidly during device operation, and this current-induced degradation is consistent with recombination-enhanced diffusion of Be interstitials producing graded junctions. By sharp contrast, devices with highly C-doped (p=7×1019 cm−3) base layers operated under the same conditions show no measurable degradation over much longer periods (12 h). This high degree of stability is most likely a result of the fact that C occupies the As sublattice, rather than the Ga sublattice as in the case of Be, and also has a higher solubility than Be. The effect of nearby implant isolated regions in promoting Be diffusion is also reported.

Hot-carrier-induced photovoltage in silicon bipolar junction transistors

As bipolar junction transistors (BJTs) are scaled down, the current density increases and base pushout may happen. To prevent base widening, the collector doping concentration is increased; therefore, this increases the electric field in the base-collector junction. In the active operation of BJTs, impact ionization happens and impact-ionization-induced photon emission is created in the base-collector (BC) junction and photon absorption happens in the base-emitter (BE) junction. This makes the carrier injection from the BE junction to the BC junction with avalanche different from that without avalanche. Similarly, the avalanche-induced light emission in the BE junction will induce photocarriers in the BC junction diode. In this paper, we report observation of the photovoltage in the BC junction resulting from hot-carrier electroluminence in the BE junction on a conventional low-power n- p- n bipolar transistor. We found a photovoltage of 0.36 V and a collector current reversal in the inverse active operation.

InGaAs/InP double-heterojunction bipolar transistors with step graded InGaAsP between InGaAs base and InP collector grown by metalorganic chemical vapor deposition

We have fabricated InGaAs/InP double-heterojunction bipolar transistors (DHBTs) grown by metalorganic chemical vapor deposition (MOCVD). By inserting step graded InGaAsP layers between p+-InGaAs base and n−-InP collector, the current gain of DHBTs with the graded layers was about twice as large as that without the graded layers, and the dependence of collector current on collector/emitter voltage was smaller than that without graded layers. The current gain was measured up to 2300 with 25×25 μm2 emitter area at a collector current density of 1×104 A/cm2.

Effect of collector-base valence-band discontinuity on Kirk effect in double-heterojunction bipolar transistors

The effect of valence-band discontinuity at the collector base heterojunction on the current gain and base charge storage is modeled. It is shown that the onset of the Kirk effect is accompanied by a sharp drop in the current gain and ft due to the formation of a potential barrier. The variation of barrier height with collector current density is determined and its effect on current gain and base transit time described. The results discussed here are applicable to Si/SiGe double-heterojunction bipolar transistors.

121 GHz resonant-tunnelling hot electron transistors having new collector barrier structure

This Letter describes a study of the DC and microwave characteristics of resonant-tunnelling hot electron transistors (RHETs) fabricated using a new (i-InAlGaAs/i-GaAs collector barrier structure. The current gain at a low collector–base voltages was improved, enabling the RHETs to operate at low collector–emitter voltages and to decrease the transit time. A cutoff frequency fT of 121 GHz was achieved at a temperature below 77 K with an emitter current density of 6.7×104 A/cm2. This is the highest value yet reported for either hot electron transistors or the quantum-effect devices.

Analysis of cut-off frequency roll-off at high currents in SiGe double-heterojunction bipolar transistors

Roll-off of the current gain cut-off frequency in NpN double-heterojunction bipolar transistors for large collector currents has been analyzed. The analysis includes such effects as the electron barrier formed at the collector base junction due to electron accumulation. Included in this investigation is also lateral electron diffusion before injection into the collector space-charge region at the base-collector heterointerface once the barrier is formed. The available data obtained in SiGe heterojunction bipolar transistors are in good agreement with this model.

Multiply-graded InGaAlAs heterojunction bipolar transistors

InGaAlAs/InP double heterojunction bipolar transistors with continuously graded base–emitter and base–collector junctions were successively fabricated, and their DC characteristics measured. The devices exhibited a lower offset voltage (Voffset <20 mV), lower output conductance and higher collector–emitter breakdown voltage (BVCEO >13 V, BVCBO > 20V) than are typically achieved in single heterojunction InGaAlAs devices.

Uniform junction temperature AlGaAs/GaAs power heterojunction bipolar transistors on silicon substrates

AlGaAs/GaAs power heterojunction bipolar transistors on Si substrates exhibiting uniform junction temperature distribution are reported. Owing to a unique device design, the temperature spread across the entire device area is about 1 °C. The device exhibits a common emitter current gain of 20, a maximum collector current of 0.6 A, and a collector base junction breakdown voltage of 25 V.

Collector-emitter offset voltage in heterojunction bipolar transistors

Collector-emitter offset voltage in heterojunction bipolar transistors is studied in detail. Based on an in-depth analysis of junction characteristics at zero collector current, a general model for offset voltage applicable to homojunction, single heterojunction and double heterojunction bipolar transistors is obtained. For an abrupt SHBT, the conduction band discontinuity at emitter-base heterojunction is found to be the main cause of large offset voltages. For DHBT's it is found that even when emitter and collector base junctions are identical in all respects, they will have an offset voltage with a magnitude dependent on the current gain of the transistor. Appropriate grading of emitter-base junction is shown to reduce the offset voltage in HBT's to values obtained in homojunction bipolar transistors.

Characteristics of Be+ and O+ or H+ co-implantation in GaAs/AlGaAs heterojunction bipolar transistor structures

The simultaneous formation of buried external collector and extrinsic base regions in GaAs/AlGaAs heterojunction bipolar transistor (HBT) structures by co-implantation of Be+ together with O+ or H+ ions is described. Oxygen implants at doses of ≥ 1012 cm−2, or proton implants at doses ≥ 1014 cm−2, followed by annealing at 500–550 °C, create fully depleted collector regions, while similar anneals lead to significant Be activation and lowered base resistance. Higher annealing temperatures improve this Be activation but restore the initial doping level in the implanted collector region. For Be+ ion doses ≤ 5≤5× 1014 cm−2 there are no defects visible by transmission electron microscopy in the HBT structure for annealing temperatures below 800 °C.

Reconciliation of methods for estimating f/sub max/ for microwave heterojunction transistors

An attempt is made to reconcile the various approaches that have recently been used to estimate the maximum frequency of oscillation f/sub max/ in high-performance AlGaAs/GaAs HBTs. f/sub max/ is computed numerically from the full expression for Mason's invariant gain using y-parameters derived from the different approaches, i.e., the hybrid- pi equivalent circuit, the T-equivalent circuit, and the drift-diffusion equations. It is shown that the results for f/sub max/ are essentially the same, irrespective of the source of the y-parameters, provided that the phase delays due to transit of carriers across the base and the collector-base depletion region are properly accounted for. It is also shown, for the particular device studied, that the widely used analytical expression for f/sub max/, involving f/sub T/ and effective base resistance and collector capacitance, is remarkably accurate for frequencies below those at which transit-time effects become important. >

The implementation of a reduced-field profile design for high-performance bipolar transistors

The first realization of a reduced-field design concept for advanced bipolar devices using the low-temperature epitaxial (LTE) technique to form the base layer is described. By inserting a lightly doped collector (LDC) spacer layer between the heavily doped base and collector regions, it is successfully demonstrated that the collector-base (CB) junction avalanche multiplication can be reduced substantially while maintaining high collector doping for current density consideration. Similar applications of the LDS technique to the emitter-base (EB) junction also results in a lower electric field, thus less EB junction reverse leakage. The feasibility of the reduced-field profile design concept is demonstrated using a LTE-base device structure. >

AlGaAs/Ge/GaAs heterojunction bipolar transistors grown by molecular beam epitaxy

An N-Al/sub 0.22/Ga/sub 0.78/As emitter, p-Ge base, and n-GaAs collector (AlGaAs/Ge/GaAs) heterojunction bipolar transistor (HBT) in the emitter-up configuration grown by molecular beam epitaxy is discussed. Devices exhibited common-emitter current gains of as high as 300 at a collector current density of 2000 A/cm/sup 2/ and a collector voltage of 4 V. As the device area is reduced from 50*50 to 10*40 mu m, the current gain did not show significant changes, suggesting a low surface recombination velocity in the Ge base.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Carrier multiplication and avalanche breakdown in self-aligned bipolar transistors

The extraction of the multiplication factor characterizing impact ionization in bipolar transistors is investigated in detail. In particular two d.c. measurement methods, superior in measurement accuracy in comparison with any method published previously, are presented. These methods clearly separate the voltage dependence of the multiplication factor from the voltage dependence of the base Gummel number. The methods presented are shown to yield consistent results and are verified by a comparison with multiplication data derived from breakdown measurements. They allow easy experimental characterization of carrier multiplication effects in bipolar transistors, and provide a valuable tool for the on-chip investigation of inhomogeneities in space charge layers and for the identification of failure mechanisms. The analytical approximation for the multiplication factor due to Miller is found to provide a good description of carrier multiplication in epitaxial base collector junctions in the low-level multiplication regime if BU cbo is substituted by the value BU cbo, m < BU cbo. The methods are applied but not restricted to self-aligned configurations and are of general interest for the precise characterization of impact ionization phenomena in reverse biased pn junctions.

FURTHER DEVELOPMENT OF A V-TROUGH SOLAR CONCENTRATOR

An experimental-theoretical investigation into the performance of a modified arrangement of a V-trough concentrator is carried out. To minimize the heat losses due to convection and radiation a V-trough complex consisting of 12 modules in parallel has been built. The overall dimensions of the collector base is (1m x 2m). Each module has a tubeless receiver base with 4cm in width and concentration ratio of 2. The side wall reflectors are plane mirrors of perspective reflectance inclined 120° to the receiver plate. The cover and receiver plate temperatures are estimated analytically with the help of a proposed mathematical model. Their variation along the axial direction is investigated as well. An attempt to relate the thermal variation inside the V-trough collector and the hot-water storage tank is presented. A set of experimental runs where the efficiency, receiver plate temperature, cover temperature and useful heat gain are measured on different days during summer is carried out. It has been found according to the experimental investigation supported by the analytical predictions that the proposed modified arrangement of the V-trough concentrator will be of improved thermal performance. The good agreement between the experimental and analytical approaches indicates the validity of the theoretical model and justification of the assumptions associated with it. In addition, the experimental arrangement is rendered to be of potential for further extension and development.

On the narrow-emitter effect of advanced shallow-profile bipolar transistors

A methodology is established to assess the physical mechanisms behind both the base current and collector current modifications. It is shown that, in addition to a reduction in the active device area due to the lateral encroachment of extrinsic base into the intrinsic base area, the emitter polysilicon-single-crystal interface (bulk property of the polysilicon emitter) and the emitter/extrinsic-base overlap (perimeter property) also play important roles in determining the current gain for narrow-emitter bipolar transistors. The slopes of the collector saturation current density (J/sub cs/) and the base saturation current density (J/sub bs/) with respect to the perimeter-to-area (P/A) ratio are shown to be useful monitoring parameters for the lateral encroachment and the emitter polysilicon-single-crystal interface. The implications on the device and process design for future scaled-down devices are discussed.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Optical detection up to 2.5 Gbit/s with a standard high-speed self-aligned silicon bipolar transistor

Recent progress in optical fibre communication has encouraged the development of fast and sensitive photodetectors. The photoresponse of the base-collector (BC) diode of a standard high-speed self-aligned silicon bipolar transistor was investigated, showing optical detection capabilities up to 2.5 Gbit/s.