Abstract
A methodology is established to assess the physical mechanisms behind both the base current and collector current modifications. It is shown that, in addition to a reduction in the active device area due to the lateral encroachment of extrinsic base into the intrinsic base area, the emitter polysilicon-single-crystal interface (bulk property of the polysilicon emitter) and the emitter/extrinsic-base overlap (perimeter property) also play important roles in determining the current gain for narrow-emitter bipolar transistors. The slopes of the collector saturation current density (J/sub cs/) and the base saturation current density (J/sub bs/) with respect to the perimeter-to-area (P/A) ratio are shown to be useful monitoring parameters for the lateral encroachment and the emitter polysilicon-single-crystal interface. The implications on the device and process design for future scaled-down devices are discussed.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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