Anti-parallel Diode Pair Research Articles

Analysis and design of compact third‐order intermodulation generation circuits

AbstractIn this article, we analyzed and designed miniaturized third‐order intermodulation distortion (IM3) generation circuits. An antiparallel Schottky diode pair was adopted for nonlinearity generation. A reflective configuration using a 90° hybrid coupler was employed to acquire a pure IM3 signal at the output. The fundamental signal at the output was automatically suppressed below the IM3 level using a reflective load optimized for the fundamental impedance of the antiparallel diode pair. The IM3 generation characteristics were fully analyzed using the Volterra series under a weak nonlinear assumption. A new optimum matching condition of the reflective load for the perfect fundamental cancellation was derived. A miniaturized 12 × 14 mm2 IM3 generator was designed and implemented for the 2.16 GHz band, based on the analysis results. The output performance measured for the implemented IM3 generator matched the calculated results. The IM3 generator showed excellent fundamental cancellation characteristics and had a wide operational range for the input signal level. © 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 2137–2140, 2009; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24535

Highly Integrated Ka-Band Sub-Harmonic Image-Reject Down-Converter MMIC

An integrated compact down-converter monolithic microwave integrated circuit chip is presented. It is designed using anti-parallel diode pair sub-harmonic image reject mixer and RF low noise amplifier. The quasi-lumped circuit components are employed in circuit design for the compact chip size. The conversion gain of the chip is 10-14 dB, image rejection above 20 dBc, and noise figure of 3.5-4.5 dB for the RF frequency of 29-36 GHz. The chip size is as compact as 2.24 mm2 on a 100 mum GaAs substrate thickness.

Design of Submillimeter Schottky Mixers Under Flat-Band Conditions Using an Improved Drift-Diffusion Model

Minimum conversion loss in millimeter and submillimeter-wave Schottky mixers is achieved when the diodes are slightly pushed into the flat-band regime. The discrepancies found between experimental results and physics-based harmonic balance simulations for a 330 GHz antiparallel diode pair subharmonic Schottky mixer showed that traditional drift-diffusion models with conventional boundary conditions at the Schottky contact do not correctly predict the behavior of the Schottky-based mixers working under flat-band conditions. In this work, we employ Monte Carlo simulations to get physical insight of the Schottky diodes working in the flat band regime. New boundary conditions obtained from this analysis have been included in our drift-diffusion simulator which has resulted in an improvement of our circuit simulator to predict mixer operation under flat band regime.

Process-Dependence of the Even-Order Nonlinearity in Anti-Parallel Diode Pair Mixers

Diode mismatch in an anti-parallel diode mixer can generate a product at the second-harmonic of the local oscillator frequency. This product is referred to as the virtual local oscillator leakage. Variability in the fabrication process results in diode mismatch and is noticeable as an asymmetry in the current-voltage characteristics. Its impact on the virtual local oscillator leakage is analyzed by studying two populations of circuits with different diode sizes, fabricated using a six inch Gallium Arsenide heterojunction bipolar transistor process. Each population contained thirty circuits, within the same quarter-wafer.

NUMERICAL STUDY OF BEHAVIOURAL SUB-HARMONICALLY PUMPED MIXER IN A NOVEL STRUCTURE

A Sub Harmonically Pumped (SHP) mixer suitable for direct conversion receiver in 3G mobile frequency band is presented. This mixer is realized with N anti-parallel diode pairs (APDPs) and designed in self-biased structure to obtain minimum noise flgure and conversion loss. In this paper, a simultaneous signal and noise analysis CAD routine to analyze a circuit consists of Arbitrary Number of anti- parallel diode pairs in self-biased structure is proposed. Then the results of this CAD routine are conflrmed with other method. The mixer is optimized to obtain a maximally ∞at conversion gain and minimum Noise Figure over various LO powers. The proposed CAD is used to obtain the optimum number of APDPs. Also the optimum self-biased resistance and output load are calculated.

INTEGRATED COMPACT BROAD KA-BAND SUB-HARMONIC SINGLE SIDEBAND UP-CONVERTER MMIC

Design, simulation and measurement results of the integrated compact up-converter MMICs (microwave monolithic integrated circuits) are presented and discussed. The design is performed to achieve low cost and high performance transmitter system for the Ka-band frequency applications. It is designed using anti- parallel diode pair sub-harmonic single sideband mixer and three stage RF (radio frequency) amplifler. Microstrip lines and lumped elements are used together to achieve a compact chip size. The layouts of the circuits are designed with careful EM (electromagnetic) simulations to avoid inter-component couplings and efiect of the microstrip bending discontinuities. The chip is operated for the wide bandwidth of the RF frequency from 22{38GHz. Due to sub-harmonic mixing the required local oscillator frequency (LO) is reduced to half (10{19GHz) to that of the RF frequency. The conversion gain of the chip is 9{ 15dB and Pi1dB output power is 7{12dBm. The single sideband and anti-parallel diode pair suppress the in-band unwanted sideband and second harmonic of the local oscillator (2LO), respectively. The suppression of sideband and 2LO signals is typically 20{35dB and 20{ 30dB, respectively. The size of the chip is as compact as 4.2mm 2 on a 100m-thick GaAs substrate.

A Novel Circuit Architecture for High Performance of High-order Subharmonic Mixers

A novel circuit architecture for high performance of high-order subharmonic (SH) mixers is proposed in this paper. According to the specified harmonic mixing order, one or more mixer diodes sub-arrays and corresponding power divider as well as phase shift network for RF and LO signals are arranged in the circuit. This proposed SH mixer circuit has improved conversion loss, wide dynamic range and high port isolation for high-order SH mixers. By phase cancellation of idle frequencies, the proposed SH mixer circuit can eliminate complicated design procedure of idle frequency circuits; by phase cancellation of leakage LO power to RF and IF port, and leakage RF power to LO port, the mixer circuit can get high port isolation in LO-IF/RF and RF-LO. The increased antiparallel diode pairs in each sub-array will also lead to well performance by lowering effective series resistance. The proposed SH mixer circuit can be easily realized with power divider and phase shift network for RF and LO signals.

Complementary Antiparallel Schottky Barrier Diode Pair in a 0.13- $\mu \hbox{m}$ Logic CMOS Technology

A shunt-connected complementary antiparallel diode pair (C-APDP) using n- and p-type Schottky barrier diodes (SBDs) in a 0.13-mum CMOS logic process is demonstrated. The structure eliminates the deleterious effects of parasitic capacitance to substrate and reduces the substrate resistance effects. The extrapolated cutoff frequency of C-APDP is above 470 GHz, which demonstrates the potential as a millimeter-wave frequency component. The harmonic power measurements indicate that C-APDPs can generate more than 25 dB higher third harmonic powers than n-type SBDs. The C-APDPs can be integrated with the other devices in CMOS technologies to enable generation and processing of millimeter- and submillimeter-wave signals.

A 26–38 GHz millimeter‐wave band APDP sub‐harmonic mixer

AbstractA 26–38 GHz millimeter‐wave (MMW) band sub‐harmonic mixer has been designed using a 0.15‐μm GaAs pseudomorphic high‐electron‐mobility transistor (pHEMT) technology. The anti‐parallel diode pair (APDP) configuration as the basic unit in this sub‐harmonic mixer design to suppress the fundamental frequency signals is used. The radio‐frequency (RF) and the local oscillator (LO) signals are imported by two Lange couplers in the proposed design, with four pairs of APDPs connected in a ring structure. Superior RF/LO‐to‐IF (intermediate‐frequency) and 2LO‐to‐RF/IF isolations have been achieved. The sub‐harmonic mixer circuit has also exhibited excellent conversion loss of 13.7 dB with LO power of 13 dBm. © 2008 Wiley Periodicals, Inc. Microwave Opt Technol Lett 50: 2135–2138, 2008; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.23595

Integrated VCO With Up/Down Converter for Si-Based 60 GHz WPAN Applications

This letter presents the design and implementation of the largest reported bandwidth of a 60 GHz up/down converter with an integrated voltage controlled oscillator (VCO) in a low-cost 0.18 mum silicon-germanium process. The up/down conversion is achieved using the 2X sub-harmonic passive mixing with anti-parallel diode pairs. A 30 GHz cross-coupled VCO is designed, optimized and integrated with the sub-harmonic mixer through a cascode amplifier to meet the local oscillator power requirements. The fully integrated chip takes only 1.5 mm2 of silicon die area and consumes only 40 mW of dc power for a measured conversion loss of 12 dB at 61.5 GHz. The integrated up/down converter is measured to have greater than 9 GHz double-sided 3-dB RF bandwidth suitable for wideband high data-rate WPAN transceiver requirements. The VCO and VCO-amplifier test structures are separately fabricated and measured to have a phase noise as low as -105 dBc/Hz at 1 MHz offset with a tuning range of 2.3 GHz.

NOVEL EVEN HARMONIC MIXER FOR 3G MOBILE RECEIVERS

This paper reports a high IIP3 even harmonic mixer with a new circuit configuration. This mixer employs an antiparallel diode pair, open and short circuited stubs and a radial stub as filters to separate RF input signal, baseband output signal and LO power. This mixer is used for down converting 3G mobile downlink signal at 2140 MHz to baseband by using a local oscillator at 1070 MHz in direct conversion configuration. This mixer must comply with the requirements specified by 3G UMTS: 3rd order input intercept point=14.466 dBm ges 11 dBm, noise figure=9 dB and conversion loss=11 dB.

A 23–37 GHz Miniature MMIC Subharmonic Mixer

A novel configuration of subharmonic mixer using an anti-parallel diode pair is presented for operating over the 23-37 GHz band. The monolithic microwave integrated circuit is implemented by GaAs 0.15 mum PHEMT technology with the compact size of 0.85 times 0.85 mm2. This mixer employs a directional coupler, LC low-pass filter, and a short stub for isolating three ports corresponding to radio frequency (RF), local oscillation (LO) input, and intermediate frequency (IF) output ports. The directional coupler also provides impedance transformation between the diode pair, RF, and LO ports. This makes the subharmonic mixer more compact and flexible. The best conversion loss of the subharmonic mixer is 9.4 dB, and the LO-to-RF and LO-to-IF isolations are better than 22 and 31 dB, respectively.

A Miniature $Q$-Band Balanced Sub-Harmonically Pumped Image Rejection Mixer

This work presents a miniature Q-band balanced single side-band sub-harmonically pumped image rejection diode mixer (SHIRM) using a compact Marchand dual balun design. The SHIRM is realized employing four anti-parallel diode pairs for frequency mixing, a Lange coupler for radio frequency (RF) signal input, and a reduced size three-conductor-line Marchand dual balun for local oscillator pumping. The length of three-conductor-line dual balun is reduced by 81% after shunting two lumped capacitors at the center conductor. The measured results exhibit a minimum conversion loss of 8.6 dB, a maximum image rejection ratio of 22 dB, all ports isolation better than 37 dB, and an input 1-dB compression point of 2.5 dBm at RF bandwidth of 40.5 to 43.5 GHz and fixed intermediate frequency of 2.4 GHz. The chip area is very compact, only 1 times 0.84mm2

Direct Conversion EHM Transceivers Design for Millimeter-Wave Wireless Applications

A direct conversion modulator-demodulator with even harmonic mixers for fixed wireless applications is presented. The circuits consist of even harmonic mixers (EHMs) realized with antiparallel diode pairs (APDPs). A communication link is set up to examine the overall performance of proposed modulator-demodulator. The transmission of 16-QAM signal with 110 Mbps data rate over fixed wireless link has been examined. We also evaluate the different levels of I/Q imbalances and DC offsets and use signal space concepts to analyze the bit error rate (BER) of the proposed transceiver using M-ary QAM schemes. The results show that this structure can be efficiently used for fixed wireless applications in Ka band.

A Balanced Even Harmonic Quadrature Mixer Using Anti Parallel Diode Pairs

An even harmonic quadrature mixer (EH-QMIX) with a balanced configuration is proposed for a direct conversion receiver. The unit even harmonic mixer (EHMIX) used for I/Q paths consists of two anti parallel diode pairs (APDPs) and a pair of diplexers. When the second harmonic of LO (2LO) from the LO section is applied to the LO port as a spurious component, a conventional single-ended EHMIX using APDP converts the 2LO leakage from the LO section into the baseband and the d.c. offset and the self-detected LO noise arise at the baseband degrade the sensitivity. This proposed balanced EHMIX configuration can cancel out the 2LO leakage in itself. Therefore, the d.c. offset and the LO noise are significantly suppressed and the degradation of the sensitivity can be avoided. The suppression characteristic of the d.c. offset and the LO noise are verified by the simulation and the measurements. By using this balanced configuration, the fabricated EH-QMIX achieves wider frequency band characteristic than that of the single-ended EH-QMIX, and it shows 20% relative bandwidth at L-band.

Design of a frequency tripler using a novel bandpass filter for Ku‐band application

AbstractThis study presents a frequency tripler using APDP (anti‐parallel diode pair) in which a new structure of bandpass filter (BPF) with low insertion loss and small size is adopted instead of a conventional coupled line BPF. The tripler using the proposed filter is measured and compared with the one using a conventional coupled line BPF. This BPF shows the insertion loss of less than 0.7 dB within the bandwidth of 16.41–19.23 GHz. The conversion loss of the tripler is about 16.6–18.5 dB with flatness of less than ±1 dB at the fundamental frequency of 5.72–6.28 GHz. The suppression characteristics for the first and fifth harmonic signals at 6.1 GHz are −32.16 and −44.6 dBc, respectively, and its phase noise attenuation is about 9.5 dB at 100 kHz offset. © 2006 Wiley Periodicals, Inc. Microwave Opt Technol Lett 48: 1770–1773, 2006; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.21787

A Fully Integrated V-Band PLL MMIC Using 0.15-<tex>$muhbox m$</tex>GaAs pHEMT Technology

A fully integrated V-band phase-locked loop (PLL) MMIC with good phase noise and low-power consumption is developed using 0.15-/spl mu/m GaAs pHEMTs. For V-band frequency division,a wideband divide-by-3 frequency divider is proposed using cascode FET-based harmonic injection locking. The fourth subharmonic mixer using anti-parallel diode pair is employed as a high-frequency phase detector. In this way, the required frequency of the reference oscillator is lowered to one twelfth of V-band output signal. An RC low-pass filter and DC amplifier are also integrated to effectively suppress the spurious and harmonic signals, and to increase the loop gain. To reduce the circuit interactions and frequency pulling effect, buffer amplifiers are used at the output of VCO and frequency divider. The fabricated V-band PLL MMIC shows the locking range of 840 MHz around 60.1GHz under a very low power dissipation of 370 mW. Good phase noise of -95.5 dBc/Hz is measured at 100 kHz offset. The chip size is as small as 2.35/spl times/1.80 mm/sup 2/. To the best of our knowledge, the PLL MMIC of this work is one of the highest frequency monolithic PLLs that integrates all the required elements on a single chip.

Adaptive power controllable retrodirective array system for wireless sensor server applications

An adaptive power controllable retrodirective array system is presented. It is able to conserve battery power in an idle mode and wake up only when it needs to operate, extending the array system's lifetime. One application of this technology is for use as wireless sensor servers, which act as a relay point between wireless sensors and remote data collectors. The proposed retrodirective array is fabricated and tested at 5.8 GHz and uses an integrated rectenna and an analog switch, which controls a battery power source. When an RF signal is received by the antenna array, it is split between a rectenna and receiver (RX), where most power is sent to a rectenna. The collected dc voltage wakes up the system by activating a switch connected to a battery and the RX. When there is no interrogation, the switch turns off. Furthermore, the second and third harmonic rejection characteristic of a circular sector antenna is introduced so that it makes the system simpler by eliminating a low-pass filter in the rectenna. For the phase-conjugation retrodirective array, second subharmonic mixers are used by employing antiparallel diode pairs, which enables avoiding expensive high-frequency oscillators. It is experimentally demonstrated that the retrodirective array system with the proposed power management can retransmit the received signal toward the source when the received power is greater than -8.5dBm. Application of the retrodirective array system as a multifunctional RX array is also investigated.

Development of terahertz mixers and a study of their characteristics

We develop terahertz mixers with monolithic integrated circuits containing balanced, series and antiparallel pairs of Schottky diodes. The designs of these mixers and a method for studying their parameters are described. The best results are obtained for the antiparallel diode pair. In this case, the double-sideband noise temperature of the receiver amounts to 5600–7500 K when operating at the second heterodyne-oscillator harmonic near the frequency 0.71 THz.

Design of patch antenna with switchable circular polarization using a branched feed circuit

A reconfigurable circularly polarized antenna is presented. The proposed antenna consists of a microstrip feed line, a ground plane with two slots, and a radiation patch. Bifurcating the microstrip feed line into two branches allows the polarization to be switched by opening and shorting the termination of the line using an anti-parallel diode pair. The design of the proposed feed structure for polarization-diversity operation is discussed, and switching between right- and left-handed circular polarization (CP) is demonstrated with cross-polarization discrimination of greater than 30 dB. © 2005 Wiley Periodicals, Inc. Microwave Opt Technol Lett 48: 1–4, 2006; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.21246