Anti-parallel Diode Pair Research Articles

Self-Dynamic and Static Biasing for Output Power and Efficiency Enhancement of Complementary Antiparallel Diode Pair Frequency Tripler

A 157-GHz complementary antiparallel diode pair (CAPDP) frequency tripler using a combination of self-dynamic and static dc biasing to enhance output power and conversion efficiency is demonstrated in 130-nm complementary metal-oxide-semiconductor. The self-dynamic biasing expands the off-zone of CAPDP to reduce the output power roll-off at high input levels. A negative static dc bias tunes the off-zone to enhance the nonlinearity to increase the output power at low input levels. The frequency tripler generates -18.6 dBm maximum output power (POUT) at 157.5 GHz at the input power (PIN) of 13.4 dBm. At PIN of 11 dBm, POUT is 2.7-dB higher or conversion loss (CL) is 2.7-dB lower than the tripler with a cathode-tied CAPDP. At PIN greater than 13.4 dBm, POUT should be more than 4.3-dB higher and CL is more than 4.3-dB lower.

A compact D-band monolithic APDP-based sub-harmonic mixer

The paper presents a compact D-band monolithic sub-harmonic mixer (SHM) with 3μm planar hyperabrupt schottky-varactor diodes offered by 70nm GaAs mHEMT technology. According to empirical equivalent-circuit models, a wide-band large signal equivalent circuit model of the diode is proposed. Based on the extracted model, the mixer is implemented and optimized with a shunt-mounted anti-parallel diode pair (APDP) to fulfill the sub-harmonic mixing mechanism. Furthermore, a modified asymmetric three-transmission-line coupler is devised to achieve high-level coupling and minimize the chip size. The measured results show that the conversion gain varies between −13.9dB and −17.5dB from 110GHz to 145GHz, with a local oscillator (LO) power level of 14dBm and an intermediate frequency (IF) of 1GHz. The total chip size including probe GSG pads is 0.57×0.68mm2. In conclusion, the mixer exhibits outstanding figure-of-merits.

A 110–140 GHz Monolithic Sub-Harmonic Mixer with an Anti-Parallel Diode Pair Topology

A 110–140 GHz Monolithic Sub-Harmonic Mixer with an Anti-Parallel Diode Pair Topology

Multistability induced by two symmetric stable node-foci in modified canonical Chua’s circuit

This paper proposes a modified canonical Chua’s circuit using an one-stage op-amp-based negative impedance converter and an anti-parallel diode pair. Unlike the conventional Chua’s circuit, this modified canonical Chua’s circuit has one unstable zero node-focus and two stable nonzero node-foci, but complex dynamical behaviors including period, chaos, stable point, and coexisting bifurcation modes are numerically revealed and experimentally verified. Up to six kinds of coexisting multiple attractors, i.e., left-right limit cycles, left-right chaotic spiral attractors and left-right point attractors, are numerically depicted and physically captured. Furthermore, with dimensionless Chua’s equations, dynamical properties of the Chua’s system are investigated, and two symmetric stable nonzero node-foci are validated to exist in the selected parameter regions thus resulting in the emergence of multistability. Specially, multistability with six different steady states is revealed in a narrow parameter range. Within this parameter region, three bifurcation routes are displayed under different initial conditions, and three sets of topologically different and disconnected attractors are observed.

Self‐biased anti‐parallel diode pair in 130‐nm CMOS

This Letter presents a self-biased anti-parallel diode pair (APDP) in a 130-nm standard digital CMOS process. The proposed device employs complementary polysilicon-gate-separated Schottky barrier diodes (SBDs). A parallel RC network in series with the n-well of n-type SBD connected in shunt is used to build-up the self-bias voltage that depends on the input power level. The device exhibits less roll-off in output harmonic power generation at a high input power level due to the automatic adjustment of the I–V curve. The measured cutoff frequency of the device reaches ∼530 GHz at zero-bias. Harmonic power measurements indicate that use of the self-biasing reduces saturation at high input power levels. The self-biased complementary-APDP (C-APDP) generates up to 5.7 dB higher third harmonic power than the cathode-tied C-APDP.

A compact broadband MMIC sub-harmonic mixer using quasi-lumped transmission lines

A compact broadband monolithic microwave integrated circuit (MMIC) sub-harmonic mixer using an OMMIC 70nm GaAs mHEMT technology is demonstrated for 60GHz down-converter applications. The present mixer employs an anti-parallel diode pair (APDP) to fulfill a sub-harmonic mixing mechanism. Quasi-lumped components are employed to broaden the operational bandwidth and minimize the chip size to 1.5×0.77mm2. The conversion gain is optimized by a quasi-lumped 90° phase shift stub. Experimental results show that from 50GHz to 70GHz, the conversion gain varies between −12.1dB and −15.2dB with a LO power level of 10dBm and 1GHz IF. The LO-to-RF, LO-to-IF and RF-to-IF isolations are found to be greater than 19.5dB, 21.3dB and 25.8dB, respectively. The second harmonic component of the LO signal is suppressed. The proposed mixer has an input 1dB compression point of -2dBm and exhibits outstanding figure-of-merits.

A High-Sensitivity Fully Passive Neurosensing System for Wireless Brain Signal Monitoring

A high-sensitivity, fully passive neurosensing system is presented for wireless brain signal monitoring. The proposed system is able to detect very low-power brain-like signals, viz. as low as $-$ 82 dBm (50 $\mu\hbox{V}_{\rm pp}$ ) at ${\rm f}_{\rm neuro}>\hbox{ 1 kHz}$ . It is also able to read emulated neural signals as low as $-$ 70 dBm (200 $\mu\hbox{V}_{\rm pp}$ ) at ${\rm f}_{\rm neuro}>\hbox{ 100 Hz}$ . This is an improvement of up to 22 dB in sensitivity as compared with previously reported neural signals. The system is comprised of an implanted neurosensor and an exterior interrogator. The neurosensor receives an external carrier signal and mixes it with the neural signals prior to retransmitting to the interrogator. Of importance is that the implanted neurosensor is fully passive and does not require a battery nor rectifier/regulator but is concurrently wireless for unobtrusive neurosensing with minimal impact to the individual's activity. To achieve this remarkable high sensitivity, the sensing system employed: 1) a subharmonic mixer using an anti-parallel diode pair; 2) a pair of implanted/interrogator antennas with high transmission coefficient $\vert{S}_{21}\vert$ ;and 3) a matching circuit between the implanted antenna and the mixer. This neurosensing system brings forward a new possibility of wireless neural signal detection using passive brain implants.

Design of 340 GHz 2× and 4× Sub-Harmonic Mixers Using Schottky Barrier Diodes in Silicon-Based Technology

This paper presents the design of terahertz 2× and 4× sub-harmonic down-mixers using Schottky Barrier Diodes fabricated in standard 0.13 μm SiGe BiCMOS technology. The 340 GHz sub-harmonic mixers (SHMs) are designed based on anti-parallel-diode-pairs (APDPs). With the 2nd and 4th harmonic, local oscillator (LO) frequencies of 170 GHz and 85 GHz are used to pump the two 340 GHz SHMs. With LO power of 7 dBm, the 2× SHM exhibits a conversion loss of 34.5–37 dB in the lower band (320–340 GHz) and 35.5–41 dB in the upper band (340–360 GHz); with LO power of 9 dBm, the 4× SHM exhibits a conversion loss of 39–43 dB in the lower band (320–340 GHz) and 40–48 dB in the upper band (340–360 GHz). The measured input 1-dB conversion gain compression point for the 2× and 4× SHMs are −8 dBm and −10 dBm at 325 GHz, respectively. The simulated LO-IF (intermediate frequency) isolation of the 2× SHM is 21.5 dB, and the measured LO-IF isolation of the 4× SHM is 32 dB. The chip areas of the 2× and 4× SHMs are 330 μm × 580 μm and 550 μm × 610 μm, respectively, including the testing pads.

A 24–44 GHz Broadband Subharmonic Mixer With Novel Isolation-Enhanced Circuit

A 24 to 44 GHz upconversion broadband subharmonic mixer with a novel isolation-enhanced architecture is presented through a 0.15 μm GaAs pHEMT process. Total chip size including probe pads is less than 1.33 × 0.82 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The isolation-enhanced circuit is constructed from two directional couple lines both formed with three microstrip lines. They are used to enhance the isolation between IF/LO-to-RF and LO-to-IF. IF and RF pre-amplifiers are employed to achieve high conversion gain for subharmonic mixing of anti-parallel diode pairs. Based on the unilateral characteristics of an IF pre-amplifier, the LO/RF-to-IF isolations exhibit substantial improvement. From the measured results, the conversion gain of the mixer is 6.0 to 10.5 dB operating at RF frequency of 24 to 44 GHz. The IF-to-RF, LO-to-IF, LO-to-RF, and 2LO-to-RF isolations are 24.5 to 27.1 dB, 32.4 to 39.6 dB, 20.6 to 24.6 dB, and 48.4 to 65 dB, respectively.

Compact Wideband Antiparallel Diode Frequency Triplers Utilizing Planar Transitions

Two designs of frequency triplers, which use planar transitions as baluns and an antiparallel diode pair to achieve wide bandwidth, are presented. The ultrawideband transitions are utilized for input and output impedance matching of the frequency triplers. The design process and operation principles are described in this paper. The implemented frequency triplers exhibit flat response over wide frequency range of 3 to 9 GHz. The proposed Type A frequency tripler shows conversion loss of ~18 dB with above 30 dB even harmonics suppression. With Type B frequency tripler, conversion loss of ~17 dB and above 25 dB even harmonic suppression are achieved.

Analysis of Three-Conductor Coupled-Line 180&lt;formula formulatype="inline"&gt;&lt;tex Notation="TeX"&gt;$^{\circ}$&lt;/tex&gt;&lt;/formula&gt; Hybrid for Single-Balanced Subharmonic Mixer Design in 0.15-&lt;formula formulatype="inline"&gt; &lt;tex Notation="TeX"&gt;$\mu{\hbox {m}}$&lt;/tex&gt;&lt;/formula&gt; pHEMT Technology

A novel 180 ° hybrid with two λ/4 sections of three-conductor coupled-line structure inhered different operating frequencies with overlapped characteristic and perfect isolation between the Σ-port and Δ-port is employed to implement a Ka- to M-band single-balanced subharmonic mixer (SHM) in a 0.15- μm GaAs pHEMT process with a compact die size of less than 0.82 × 0.83 mm 2 . The thorough analysis based on the scattering matrix of the 180 ° hybrid is also presented. Incorporating the inherent features of the 180 ° hybrid with an antiparallel diode pair configuration, the proposed SHM achieved a wide operating bandwidth from 37 to 85 GHz with low conversion loss from 9 to 14 dB, enhanced local oscillation (LO)-to-RF isolation and 2LO-to-RF isolation under 10-dBm LO power level. This proposed architecture is really attractive to SHM design in modern millimeter-wave territory.

Design of a Ka-Band 4th Sub-Harmonic Image Rejection Mixer

This paper presents the designing and realization of a Ka-band 4th sub-harmonic image rejection mixer using anti-parallel diode pair (APDP). Measured performance is as follow: RF:29.4~31GHz, IF is 100MHz, Conversion loss is11.2~12.3dB and image rejection is larger than 20.2dB with the LO power 11dBm and RF power-30dBm. Both RF-IF isolation and LO-IF isolation are larger than 34.4dB.

An Ultra-Broadband Subharmonic Mixer With Distributed Amplifier Using 90-nm CMOS Technology

This paper presents a Ka- to F-band ultra-broadband subharmonic mixer (SHM) using the standard 90-nm CMOS process. The proposed SHM employs a distributed amplifier and antiparallel diode pair configuration to realize wide operation bandwidth from 33 to 103 GHz, low conversion loss from 0.52 to 3.35 dB, good local oscillation (LO)-to-RF isolation greater than 27.7 dB, and high 2LO-to-RF isolation better than 60 dB with a miniature chip dimension of 0.49 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> at a 10-dBm LO power level. Using the distributed amplifier technique, the proposed SHM offers significant advantages, such as broad operation bandwidth, good flatness, high port-to-port isolation, and good conversion loss.

An Adjustable Linearization for RF Power Amplifier

This paper presented an adjustable analog predistortion linearization method for RF power amplifier. The linearization includes an attenuator, a phase shifter and an anti-parallel Schottky diode pair with DC bias, through adjusting these components, we can adjust predistortion characteristic of the linearization to be complementary to distortion characteristic of RF power amplifier. By cascading this linearization with power amplifier, we can improve linearity of amplifier. Firstly, we simulated the proposed predistortion linearization with software ADS, then the linearization was manufactured and tested together with RF power amplifier PTF080551. Experimental results show that we can adjust predistortion characteristic of the linearization to be closely complementary to distrotion characteristic of power amplifier PTF080551 as desired. After cascading the linearization with power amplifier PTF080551, more than 10dB improvement in IMD3 of the amplifier can be achieved. Furthermore, the linerarizaion is flexible and can be adjusted to linearize different amplifiers.

60-GHz Dual-Conversion Down-/Up-Converters Using Schottky Diode in 0.18 $\mu{\hbox {m}}$ Foundry CMOS Technology

Due to the benefits of Schottky diodes, 0.18-μm CMOS technology is being promoted for millimeter wave applications. In this paper, 60-GHz dual-conversion down-/up-converters using Schottky diodes are realized by using 0.18-μm foundry CMOS technology. A CoSi <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -Si Schottky diode, fabricated on a lower doped N-well by blocking the threshold voltage adjustment implant, has a lower reverse leakage current and a better ideality factor. Thus, it is ideal for the 60-GHz sub-harmonic mixer design. Two new types of Schottky-diode mixers, a down-conversion sub-harmonic mixer with a dual-band lump-distributed phase-inverter rat-race coupler and an up-conversion sub-harmonic mixer with a trifilar transformer, are realized and employed at the high-frequency conversion stage of the dual-conversion architecture to achieve small size and broadband isolations. The silicon-based Schottky diode with a low turn-on voltage offers great advantage in LO pumping power, especially for an antiparallel diode pair structure. In our Schottky-diode sub-harmonic mixers, the required LO power is only 1 dBm. The dual-conversion down-converter achieves 5-dB conversion gain and 19 dB noise figure under <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Vdd</i> =2.5 V and <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Idd</i> =22 mA, and the dual-conversion up-converter, with <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Vdd</i> =2.5 V and <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Idd</i> =26 mA, attains greater than 40-dB sideband rejection and -1 dB conversion gain over the whole 60-GHz bandwidth.

3 mm sub-harmonic mixer

A sub-harmonic mixer is presented with micro-strip at 3 mm wave length.The key device of the mixer is a pair of GaAs beam lead anti-parallel Schottky diode(type MS8251).According to the request of the local oscillator(LO),radio frequency(RF) and intermediate frequency(IF) networks of sub-harmonic mixer,the large signal impedance of anti-parallel diode pair,which is stimulated with the LO signal alone,is simulated by harmonic balance method firstly.The LO network is designed based on the result above.Then the small signal impedance of anti-parallel diode pair with LO stimulation is simulated and the RF network is designed.A 3 mm waveguide to micro-strip translation is also designed in the paper,and the sub-harmonic mixer is fabricated on the RF-Duroid 5880 with 0.127 mm thick and dielectric constant er of 2.22.According to the measurement result,the conversion loss which is lower than 15 dB is achieved with the RF ranged from 90 GHz to 95 GHz and the LO frequency of 46.3 GHz.

A 122 GHz Sub-Harmonic Mixer With a Modified APDP Topology for IC Integration

This letter presents a modified passive subharmonic mixer (SHM) topology based on an anti-parallel-diode-pair (APDP). It features a differential intermediate frequency output facilitating IC integration and improving common-mode noise rejection. An example 122 GHz SHM has been designed and tested in a 0.13 μm SiGe BiCMOS technology for a 122 GHz radar IC. SiGe HBT transistors have been diode-connected to form the APDP. The example SHM exhibits a conversion loss of 8 dB with a 5 dBm LO pumping power. The measured bandwidth extends from 117 to 124 GHz, adequately covering the 122-123 GHz ISM band, while the input 1 dB compression point and noise figure were measured to be -5 dBm and 8.5 dB respectively. Due to its superior 1/f noise performance and high linearity, the mixer is especially well suited to zero intermediate frequency radars.

A K-band balanced subharmonically pumped image rejection mixer using 0.15-μm GaAs pHEMT technology

This work presents a K-band balance single side-band subharmonically pumped image rejection diode mixer (SHIRM).It uses lumped elements and three-conductor-line quadrature couplers and is fabricated in a 0.15-μm GaAs process. The SHIRM is realized in size reduction by using two antiparallel diode pairs for frequency mixing. The three-conductor-line bending coupler is 55% reduction in size compared to the nonbending one for radio frequency port, and lumped elements realization is 62% smaller in size than the quarter-wavelength line for local oscillator port. The proposed circuit with a symmetric layout provides good matches on amplitude and phase performances. The measured results exhibit a minimum conversion loss of 13 dB, a maximum image rejection ratio of 19 dB. All ports isolations are better than 10 dB. The chip area is only 1.5 × 1 mm2. © 2011 Wiley Periodicals, Inc. Microwave Opt Technol Lett 53:485–488, 2011; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.25781

A Miniaturized Monolithic 18–40 GHz Sub-harmonic Mixer

In this paper, a miniaturized 18–40 GHz sub-harmonic mixer is designed and implemented with 0.15 μm GaAs pHEMT process. The proposed mixer employs anti-parallel diode pair with parallel to ground configuration, and a novel coupler structure to feed RF and LO signals, resulting in broadband performance and compact chip size. The measured conversion loss is 10.3–13.5 dB in a wide operation frequency band of 18–40 GHz. The chip size is 0.66 mm2.

V-BAND HIGH ISOLATION SUBHARMONIC MONOLITHIC MIXER WITH HAIRPIN DIPLEXER

A 54{66GHz sub-harmonic monolithic passive mixer using the standard 0.15m pHEMT process is demonstrated. The proposed mixer is composed of a hairpin diplexer, an open stub, and a low-pass fllter. The mixer also utilizes a pair of anti-parallel diodes to achieve a subharmonic mixing mechanism. The hairpin diplexer formed with two parallel-coupled line band-pass fllters is used to improve the isolation between the radio frequency (RF) and local oscillation (LO) ports. The low-pass fllter supports an intermediate frequency (IF) ranging from dc to 1GHz. This proposed conflguration leads to a die size of less than 1.5mm 2 . With a conversion loss of 15.2{18.3dB, the 2LO- to-RF isolation is found to be better than 27.5dB. A high LO-to-RF isolation of 23.5{45dB over 54{66GHz RF bandwidth, as well as 1dB compression power of 8dBm, can be achieved.