A Fully Integrated V-Band PLL MMIC Using 0.15-<tex>$muhbox m$</tex>GaAs pHEMT Technology

Abstract

A fully integrated V-band phase-locked loop (PLL) MMIC with good phase noise and low-power consumption is developed using 0.15-/spl mu/m GaAs pHEMTs. For V-band frequency division,a wideband divide-by-3 frequency divider is proposed using cascode FET-based harmonic injection locking. The fourth subharmonic mixer using anti-parallel diode pair is employed as a high-frequency phase detector. In this way, the required frequency of the reference oscillator is lowered to one twelfth of V-band output signal. An RC low-pass filter and DC amplifier are also integrated to effectively suppress the spurious and harmonic signals, and to increase the loop gain. To reduce the circuit interactions and frequency pulling effect, buffer amplifiers are used at the output of VCO and frequency divider. The fabricated V-band PLL MMIC shows the locking range of 840 MHz around 60.1GHz under a very low power dissipation of 370 mW. Good phase noise of -95.5 dBc/Hz is measured at 100 kHz offset. The chip size is as small as 2.35/spl times/1.80 mm/sup 2/. To the best of our knowledge, the PLL MMIC of this work is one of the highest frequency monolithic PLLs that integrates all the required elements on a single chip.