Abstract

The use of programmable logic cells in VLSI design allows the terminals on these cells to be interchanged since their geometrics are programmable. Recently, many exact algorithms and heuristics have been proposed for channel routing with interchangeable terminals [18, 25, 4, 11, 12, 20, 17, 3]. Various optimization problems have also been shown to be NP—hard [25, 23]. In this paper, we consider channels with exits. Let m, D be the number of terminals in the channel and the maximum number of terminals on a net, respectively. We present an O(m) algorithm that obtains optimal density for channels with exits that have one cell on each side. The existing algorithm for this problem [5] guarantees only an approximate density. Moreover, if one of the two cells has fixed terminals, we show that the density minimization problem is NP‐hard. The latter problem was introduced in [5]. For instances with any number of cells we present an O(m) time algorithm for the via minimization problem, an O(m2 · D) algorithm for the problem of finding a maximum planar subset of nets in a channel, and an O(m) algorithm to determine whether the channel adopts external‐internal layout. Also for the special case where there exists one cell per side, we present an alternative algorithm that finds a maximum planar set of nets in O(m) time.

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