Using Ultra-high Vacuum Chemical Vapor Deposition Research Articles

Low Threshold Light Emission from Reverse-Rib n+ Ge Cavity Made by P Diffusion

Strain-tensile n+ Ge is an enabler of monolithically integrated light sources on a Si chip. The challenges are (1) high lasing thresholds and (2) n+ doping methods. (1) The threshold currents reported for electrically pumped Ge lasers are 280 and 510 kA/cm2 [1, 2]; much higher than III-V lasers (less than 1 kA/cm2) and even theoretical prediction of the Ge laser (~6 kA/cm2) [3]. (2) Ge can be used as photodetectors (PDs) and modulators (MODs), which need different in-depth dopant profiles. Ge epitaxy cannot control in-plane P concentration locally unless otherwise one performs multiple epitaxy. In the present study we tried to reduce the threshold using specific epi-structures and to diffuse Phosphorus (P) to make n+ Ge, and successfully observed a threshold in light emission using P diffusion for the first time. We have reported that a reverse-rib structure can be made using the epitaxial lateral overgrowth (ELO) technique [4], and can effectively isolate light modes from Si substrate. It further reduces light scattering at the Ge/SiO2 sidewall formed by dry etching as shown in Fig. 1 [5], some of which should decrease the optical net gain. In addition, our group reported that the Ge/Si interfaces if located in the pn junction enhance significantly non-radiative recombination [6]. Thus, n+ Ge was grown on n+ Si. P diffusion was employed to achieve 1 × 1019 P/cm3 both in the reverse-rib and the blanket Ge epilayers using a well-controlled diffusion method [7]. Optical pumping was used to excite the structure. 40-nm thick SiO2 was formed by thermal oxidation on an n+ Si wafer and patterned in line-and-space shape along [110] orientation by electron beam lithography followed by a wet etching. Epitaxial Ge layers were grown on the wafer using ultra high vacuum chemical vapor deposition (UHVCVD) at 700 ˚C. The epilayers were 1 µm thick at reverse-rib areas, while 1.8 µm thick at blanket areas. P diffusion was performed at 850 ˚C for 5 minutes, which achieves uniform P concentration of 1 × 1019 /cm3 through these Ge epilayers. Schematic of the measurement system is shown in Fig. 2. A continuous wave YAG:Nd laser (wavelength: 1.07 µm, power: ~kW/cm2) was used for optical pumping and a Ge PD was used to measure the relation of light emission and optical pumping. The effective input power density should be actually smaller than the set value since the reverse-rib Ge epilayer (300 µm wide and 3 mm long) is wider than the pumping laser (30 µm wide and 4 mm long), causing out-diffusion of photo-excited minority carriers (holes) to non-pumped areas. The measurements were carried out at room temperature. Figure 3 shows a cross sectional TEM image of the as-grown reverse-rib Ge. The air semi-cylinders are observed over the SiO2 masks (invisible in this image) since Ge will not grow on SiO2 in this condition. The air semi-cylinders are 150 nm high and 450 nm wide, which is big enough to isolate light modes from the Si substrate according to a mode solver simulation. Raman scattering spectroscopy reveals 0.17 % tensile strain at the top surface of the reverse-rib Ge while there should be strain relaxation around the air semi-cylinders. The results of the optical pumping measurements are summarized in Fig. 4. Light emission from the reverse-rib Ge shows a sharp threshold at the input power density of 8 kW/cm2 (set value). The results can be understood as either amplified spontaneous emission (ASE) or lasing. We will soon report the spectra to identify the results. Assuming lasing, the threshold of 8 kW/cm2 is very small compared to the value reported (30 kW/cm2) [8].

Embedded-Ge source and drain in InGaAs/GaAs dual channel MESFET

We report the first demonstration of n-type III–V metal-semiconductor field-effect transistors (nMESFETs) with IV group material hetero-junction source and drain (S/D) technology. A selective epitaxial growth of germanium (Ge) in the recessed gallium arsenide (GaAs) S/D regions is successfully developed using ultra-high vacuum chemical vapor deposition (UHVCVD) system. The dual channel structure includes an additional 10-nm higher mobility n-In0.2Ga0.8As layer on n-GaAs channel and is introduced to further improve the device performance. The n-MESFET, combining embedded-Ge S/D with In0.2Ga0.8As/GaAs channel, exhibits good transfer properties with a drain current on/off ratio of approximately 103. Due to the small barrier height of Ti/In0.2Ga0.8As Schottky contact, a lattice-matched wide bandgap In0.49Ga0.51P dielectric layer is also integrated into the device architecture to build a higher electron Schottky barrier height (SBH) for gate leakage current reduction. The Ti/In0.49Ga0.51P/n-In0.2Ga0.8As Schottky diode shows a comparable leakage level to Ti/n-GaAs with 2 × 10−2 A/cm2 at a gate voltage of −2.0 V.

The Integration of Ge and III-V Materials on GaAs and Si for Post CMOS Applications

In the study, the growth of InAs on Si is demonstrated using "interface blocking" technique with SiGe layers as buffer layer. And the growth of high quality Ge film on GaAs is demonstrated using ultra high vacuum chemical vapor deposition (UHVCVD). Both Ge film grown on GaAs and InAs film grown on Si substrate demonstrate high crystallinity and good surface morphology as observed by XRD and AFM. Furthermore, the fabrication process and electric characteristics of Ge/GaAs and InAs/Si is discussed in the study. The developed epitaxial materials systems and device fabrication including InAs on Si, Ge on GaAs are useful for future III-V and Ge integration on Si substrate for next generation high speed low power CMOS as well as for RF/digital mixed signal circuit applications in the future.

Evaluating nanotribological behavior of annealing Si 0.8Ge 0.2/Si films

In this study, the SiGe epilayers were created on silicon substrate by using ultra-high vacuum chemical vapor deposition (UHV/CVD) and followed by annealing procedures. The frictional behaviors of SiGe epilayers were subjected to nanoscratch techniques under a ramping load. Damage caused by scratching was examined by atomic force microscopy (AFM); the results showed that the pile-up phenomena were significant on both sides of the scratch in the case of SiGe epilayers, suggesting that the dynamic deformation behavior was dominated by cracking as ploughing occurred during scratching. In addition, the SiGe epilayers films with different annealed conditions exhibited the decrease in coefficient of friction (COF), indicating the higher shear resistance exist in annealed SiGe epilayers, which probably affect the film uniformity and device yield under IC process integration.

Wafer-Scale High-Throughput Ordered Arrays of Si and Coaxial Si/Si1–xGex Wires: Fabrication, Characterization, and Photovoltaic Application

We have developed a method combining lithography and catalytic etching to fabricate large-area (uniform coverage over an entire 5-in. wafer) arrays of vertically aligned single-crystal Si nanowires with high throughput. Coaxial n-Si/p-SiGe wire arrays are also fabricated by further coating single-crystal epitaxial SiGe layers on the Si wires using ultrahigh vacuum chemical vapor deposition (UHVCVD). This method allows precise control over the diameter, length, density, spacing, orientation, shape, pattern and location of the Si and Si/SiGe nanowire arrays, making it possible to fabricate an array of devices based on rationally designed nanowire arrays. A proposed fabrication mechanism of the etching process is presented. Inspired by the excellent antireflection properties of the Si/SiGe wire arrays, we built solar cells based on the arrays of these wires containing radial junctions, an example of which exhibits an open circuit voltage (V(oc)) of 650 mV, a short-circuit current density (J(sc)) of 8.38 mA/cm(2), a fill factor of 0.60, and an energy conversion efficiency (η) of 3.26%. Such a p-n radial structure will have a great potential application for cost-efficient photovoltaic (PV) solar energy conversion.

Optical properties of Si 0.8Ge 0.2/Si multiple quantum wells

The optical property was studied on the Si 0.8Ge 0.2/Si strained multiple quantum well (MQW) structure grown using ultra-high vacuum chemical vapor deposition (UHV-CVD). Three peaks are observed in Raman spectrum, which are located at about 510, 410, and 300 cm −1, corresponding to the vibration of Si–Si, Si–Ge, and Ge–Ge phonons, respectively. The photoluminescence (PL) spectrum originates from the radiative recombinations both from the Si substrate and the Si 0.8Ge 0.2/Si MQW. For Si 0.8Ge 0.2/Si strained MQW, the transition peaks related to the MQW region observed in the photocurrent (PC) spectrum were preliminarily assigned to electron–heavy hole (e–hh) and electron–light hole (e–lh) fundamental excitonic transitions.

A SiGe/Si multiple quantum well avalanche photodetector

The present work investigates the performance of APDs with a SiGe/Si multi-quantum well (MQW) structure, which was fabricated using ultrahigh-vacuum chemical vapor deposition (UHV/CVD). Absorption of radiation and avalanche multiplication occur in both SiGe/Si MQW and the i-SiGe layer. Intense photoluminescence (PL) from strained, epitaxial SiGe alloys grown using UHV/CVD was reported with multiple SiGe/Si MQW and i-SiGe layer. It was found that the avalanche multiplication occurred at about 7 V, when exceeding 7 V, the responsiveness and quantum efficiency rapidly increased. An APD consisting of an epitaxial SiGe/Si MQW as the active absorption layer with intense response in the 800–1500 nm wavelength range is also demonstrated.

Fabrication of PIN photo-diode from Si0.2Ge0.8/Si strained MQWs

A pin photo-diode was fabricated from the Si0.2Ge0.8/Si strained multiple quantum-well (MQW) structure grown by using ultra high vacuum chemical vapor deposition (UHV-CVD). The structural properties of the Si0.2Ge0.8/Si strained MQW were investigated using high-resolution X-ray diffraction (HRXRD). Specifically, the recent advances in the dry etching of Si0.2Ge0.8Si strained MQW have been used to define pin photo-diode active layer mesas. The current-voltage (I-V) characteristic of pin photodiodes fabricated from these MQWs was measured. Also, the spectral response spectrum of pin photodiodes was measured at room temperature.

Zero biased Ge-on-Si photodetector with a bandwidth of 4.72 GHz at 1550 nm

High quality Ge was epitaxially grown on Si using ultrahigh vacuum/chemical vapor deposition (UHV/CVD). This paper demonstrates efficient germanium-on-silicon p-i-n photodetectors with 0.8 μm Ge, with responsivities as high as 0.38 and 0.21 A/W at 1.31 and 1.55 μm, respectively. The dark current density is 0.37 mA/cm2 and 29.4 mA/cm2 at 0 V and a reverse bias of 0.5 V. The detector with a diameter of 30 μm, a 3 dB-bandwidth of 4.72 GHz at an incident wavelength of 1550 nm and zero external bias has been measured. At a reverse bias of 3 V, the bandwidth is 6.28 GHz.

Photocurrent of SiGe/Si Strained Multiple Quantum-Wells Grown by UHV-CVD

The optical property was studied for the Si0.8Ge0.2/Si strained multiple quantum-well (MQW) structure grown by using ultra high vacuum chemical vapor deposition (UHV-CVD). The structural properties of the Si0.8Ge0.2/Si strained MQW were investigated using high-resolution X-ray diffraction (HR-XRD). The photocurrent spectrum of a Si0.8Ge0.2/Si strained MQW was measured at the room-temperature and the liquid-nitrogen temperature. For Si0.8Ge0.2/Si strained MQW, the transition peaks related to the MQW region observed in the photocurrent spectrum were preliminarily assigned to electron-heavy hole (e-hh) and electron-light hole (e-lh) fundamental excitionic transitions.

Effect of annealing temperature for Si 0.8Ge 0.2 epitaxial thin films

This study investigates the effect of annealing temperature on the Si 0.8Ge 0.2 epitaxial layers. The Si 0.8Ge 0.2 epitaxial layers were deposited by using ultrahigh vacuum chemical vapor deposition (UHVCVD) with different annealing temperatures (400–1000 °C). Various measurement technologies, including high-resolution X-ray diffraction (HRXRD), atomic force microscopy (AFM) and interfacial adhesion tester, were used to characterize the materials properties of the SiGe epilayers. The experimental results showed that the SiGe epilayers gradually reduced lattice-mismatch to the underlying substrate as annealing temperature increased (from 400 to 800 °C), which resulted from a high temperature enhancing interdiffusion between the epilayers and the underlying substrate. In addition, the average grain size of the SiGe films increased from 53.3 to 58 nm with increasing annealing temperature. The surface roughness in thin film annealed at 800 °C was 0.46 nm. Moreover, the interfacial adhesion strength increased from 476 ± 9 to 578 ± 12 kg/cm 2 with increasing the annealing temperature.

Ultra-Thin Si1−x Ge x Dislocation Blocking Layers for Ge/Strained Si CMOS Devices

We demonstrate ultra-thin (<150 nm) Si1−x Ge x dislocation blocking layers on Si substrates used for the fabrication of tensile-strained Si N channel metal oxide semiconductor (NMOS) and Ge P channel metal oxide semiconductor (PMOS) devices. These layers were grown using ultra high vacuum chemical vapor deposition (UHVCVD). The Ge mole fraction was varied in rapid, but distinct steps during the epitaxial layer growth. This results in several Si1−x Ge x interfaces in the epitaxially grown material with significant strain fields at these interfaces. The strain fields enable a dislocation blocking mechanism at the Si1−x Ge x interfaces on which we were able to deposit very smooth, atomically flat, tensile-strained Si and relaxed Ge layers for the fabrication of high mobility N and P channel metal oxide semiconductor (MOS) devices, respectively. Both N and P channel metal oxide semiconductor field effect transister (MOSFETs) were successfully fabricated using high-k dielectric and metal gates on these layers, demonstrating that this technique of using ultra-thin dislocation blocking layers might be ideal for incorporating high mobility channel materials in a conventional CMOS process.

Growth of high-quality relaxed SiGe films with an intermediate Si 1− yC y layer for strained Si n-MOSFETs

High quality and thin relaxed SiGe films were grown on Si (0 0 1) using ultra high vacuum chemical vapor deposition (UHV/CVD) by employing an intermediate Si 1− y C y layer. The Si 1− y C y /SiGe bilayer was found to change mechanism of relaxation in the SiGe overlayer. Compared with the samples with a Si layer, the equilibrium critical thickness of top SiGe films with rough surface by introducing an intermediate Si 0.986C 0.014 layer are drastically reduced; this result was attributed to larger tensile stress in the inserted Si 0.986C 0.014 layer. With a 210-nm-thick Si 0.8Ge 0.2 overlayer, this Si 0.8Ge 0.2/Si 0.986C 0.014/Si 0.8Ge 0.2 heterostructure has a threading dislocation density (TDs) less than 1 × 10 5 cm −2 and a residual strain of 30%. The root mean square (RMS) of surface roughness for this sample was measured to be about 1.8 nm. In this SiGe/Si 1− y C y /SiGe structure, C atoms in the intermediate Si layer will improve the relaxation of thin SiGe overlayer, however, the relaxation for the 700-nm-thick SiGe overlayer is independent of the addition of C. The point defects rich Si 0.986C 0.014 layer plays the role to confine the misfit dislocations, which formed at the interface of the top Si 0.8Ge 0.2 and the Si 0.986C 0.014 layer, and blocked the propagation of TDs. Strained-Si n-channel metal-oxide-semiconductor transistors ( n-MOSFETs) with a 210-nm-thick Si 0.8Ge 0.2 overlayers as buffer were fabricated and examined. Drain current and effective electron mobility for the strained-Si device with this novel substrate technology was found to be 100 and 63% higher than that of control Si device. Our results show that thin relaxed Si 0.8Ge 0.2 films with the intermediate Si 0.986C 0.014 layer serve as good candidates for high-speed strained-Si devices.

Fabrication of thick, high-quality strained SiGe layer on ultra-thin silicon-on-insulator and modeling of film strain

Fabrication of a thick strained SiGe layer on bulk silicon is hampered by the lattice mismatch and difference in the thermal expansion coefficients between Si and SiGe, and a high Ge content leads to severe strain in the SiGe film. When the thickness of the SiGe film is above a critical value (90 nm for 18% Ge), drastic deterioration of the film properties as well as dislocations will result. In comparison, a silicon-on-insulator (SOI) substrate with a thin top Si layer can mitigate the problems and so a thick SiGe layer with high Ge concentration can conceivably be synthesized. In the work reported here, a 110 nm thick high-quality strained Si 0.82Ge 0.18 layer was fabricated on an ultra-thin SOI substrate with a 30 nm top silicon layer using ultra-high vacuum chemical vapor deposition (UHVCVD). The thickness of the SiGe layer is larger than the critical thickness on bulk Si. Cross-sectional transmission electron microscopy (XTEM) reveals that the SiGe layer is dislocation-free and the atoms at the SiGe/Si interface are well aligned, even though X-ray diffraction (XRD) data indicate that the SiGe film is highly strained. The strain factors determined from the XRD and Raman results agree well.

Relaxed silicon-germanium on insulator substrate by layer transfer

The fabrication of 4 in, relaxed Si1−xGex-on-insulator (SGOI) substrates by layer transfer was demonstrated. A high-quality relaxed Si1−xGex layer was grown using ultrahigh vacuum chemical vapor deposition (UHVCVD) on 4 in. Si donor wafers. Thin Si−xGex film (x=0.2 or 0.25) was then transferred onto an oxidized Si handle wafer by bonding and wafer splitting using hydrogen implantation. The resulting relaxed SGOI structures were characterized by transmission electron microscopy (TEM) and atomic force microscopy (AFM).

Bandgap and Strain Engineering in SiGeC Heterojunction Bipolar Transistors

The incorporation of C into Si1-xGex alloys contributes to enlarging the critical layer thickness and to improving the thermal budget. It also realizes a narrower bandgap with compensated strain. These effects would introduce good performance at high frequency in the devices. We fabricate heterojunction bipolar transistors (HBTs) with an Si1-x-yGexCy base layer using ultrahigh-vacuum chemical vapor deposition (UHV-CVD) technology. The bandgaps of Si1-x-yGexCy base layers are measured by the evaluation of the collector current dependence on temperature. The strain of the pseudomorphic Si1-x-yGexCy layer is also extracted by an analysis of the X-ray diffraction spectra. Good flexibility of Si1-x-yGexCy alloy is shown for the bandgap and strain engineering. The devices using the excellent characteristics of Si1-x-yGexCy alloy have numerous applications for wireless telecommunications.

Relaxed Silicon-Germanium on Insulator (SGOI)

AbstractWe have fabricated high quality SGOI substrates and demonstrated high mobility enhancement in strained-Si MOSFET's fabricated on the relaxed SGOI substrates with a Ge content of 25%. The substrates were fabricated by wafer bonding. The initial relaxed Si1−xGex layers were grown on Si donor substrates by a graded epitaxial growth technology using ultrahigh vacuum chemical vapor deposition (UHVCVD). The SiGe wafers were then bonded to oxidized silicon handle wafers. Two different approaches have been developed to fabricate SGOI substrates: an etch-back process utilizing a 20% Ge layer as a natural etch stop, and a hydrogen-induced wafer delamination process using H+ implantion. The resultant SiGe film quality was compared among the different approaches. Large-area strained-Si MOSFET's were then fabricated on the SGOI substrates. Epitaxial regrowth was used to produce the upper portion of the relaxed SiGe and the surface strained Si layer. The measured electron mobility shows significant enhancement over both the universal mobility and that of co-processed bulk-Si MOSFET's. This SGOI process has a low thermal budget and thus is compatible with a wide range of Ge contents in Si1−xGex layer.

Growth and Characterization of High Quality Si1-x-yGexCy Alloy Grown by Ultra-High Vacuum Chemical Vapor Deposition

High quality Si1-x-yGexCy alloy with 2.2% C is grown at a relatively high temperature (760°C) on Si(100) using ultra-high vacuum/chemical vapor deposition (UHV/CVD) system. The samples are investigated with high resolution cross-sectional transmission electron microscope and x-ray diffraction. Compared with Si1-xGex alloys, Si1-x-yGexCy alloys with small amounts of C have much less strain and larger critical layer thickness. The quality of interface is also improved. Relatively flat growing profiles of the film are confirmed by secondary ion mass spectroscopy. Fourier transform infrared spectroscopy is also used to testify that the carbon atoms are on the substitutional sites. It is proved that the UHV/CVD system is an efficient method of growing Si1-x-yGexCy alloys.

Development of Surface Morphology of Epitaxial Al2O3 on Silicon by Controlling Reaction between Oxygen and Silicon Surface

Epitaxial growth of Al2O3 on Si has been investigated using ultrahigh-vacuum chemical vapor deposition (UHV-CVD). The uniformity of Al2O3 growth in a wafer was improved by UHV-CVD with a hot-wall heating system, but the surface morphology of grown films was degraded compared with that of films grown by low-pressure chemical vapor deposition (LP-CVD) with a cold-wall heating system. Using oxygen for Al2O3 growth instead of N2O, crystalline quality and electrical properties of Al2O3 films were improved, but microroughness still exist at the Al2O3 surface. A new Al2O3 growth method is proposed taking into account thermochemical considerations. The growth temperature of Al2O3 was lowered at a temperature below 780°C to improve the surface morphology. Although the surface morphology of Al2O3 film was improved, its crystalline structure was degraded by the low-temperature growth. Then, a high-temperature growth was performed on the Al2O3 layer grown at the low temperature, to recover the crystalline structure of the grown films. Using two complementary growth steps with different temperatures, the surface morphology and electrical properties of epitaxial Al2O3 films on Si substrates were improved.

The Effect of Oxidation Source Gas on Epitaxial Al 2O 3 Films on Si

Epitaxial growth of Al2O3 on Si has been investigated by using ultrahigh-vacuum chemical vapor deposition (UHV-CVD). Film thickness uniformity in a wafer was progressed by UHV-CVD method with a hot wall heating system, but the film surface morphology of grown films was worse than that grown by low-pressure chemical vapor deposition (LP-CVD) with a cold wall heating system. Reaction between Si surface and N2O was carried out by LP-CVD and UHV-CVD, and it is supposed that N2O gas etches the Si surface rather than O2 gas at the initial growth stage in UHV-CVD. High crystalline quality of Al2O3 films was obtained at 1000°C by changing the oxidation source gas from N2O to O2. Al2O3 film crystalline quality and electrical property were improved by using O2 gas.