Strong physical unclonable function (PUF) transcends the limitations of legacy secure key storage methods as emerging security primitive for cryptography and device identification/authentication. In this paper, a new low power and reliable mono-stable strong PUF is proposed. Its primary entropy is derived from the process variations of the parallel diode-clamped single inverter ring working in the subthreshold region. Due to manufacturing process variations, the mono-stable state of the output voltage of single inverter ring is Gaussian distributed around the half $V_{\text {dd}}$ point. The spread of the Gaussian is broadened by mixing it with another Gaussian distributed trip point obtained from a diode-clamped parallel inverter stage. As the main entropy of the raw response bits is derived from a mono-stable circuit, it has greater immunity to perturbances introduced by operating environments. In addition, as the mono-stable state for the output voltage is a non-linear combination of individual inverter rings, the resilience against machine learning attacks can be improved. The prototype chip was fabricated using a commercial 40-nm CMOS technology. The measurement results show that the power consumption of the 64-bit mono-stable PUF is merely $3.85~\mu \text{W}$ . The native bit error rate is $36{\times}$ and $75{\times}$ , respectively, over that of arbiter PUF.