Oxide Trap Generation Research Articles

The field, time and fluence dependencies of trap generation insilicon oxides between 5 and 13.5 nm thick

Trap generation in oxides between 5 and 13.5 nm thick hasbeen measured as a function of the oxide electric field, stresstime and electron fluence during constant-voltage stresses. Itwas found that the trap generation measured under all stressconditions and for all thicknesses of oxides could be describedby a single Eyring equation independent of stress polarity orsubstrate type. This Eyring formulation for the trap generationwas used to support the electric field (E-model) of oxidebreakdown. The field-dependent activation energy obtained fromthe trap generation data predicted both the ultimate fieldstrength of silicon oxide and a field-dependent breakdownactivation energy very close to that observed for long-time,low-field breakdown measurements. The field acceleration of trapgeneration was found to be significantly different from that ofbreakdown because of the sublinear time dependence of trapgeneration.

Charge trap generation in LPCVD oxides under high field stressing

The degradation of low pressure chemical vapor deposited (LPCVD) oxides, prepared using silane and tetra ethyl ortho silicate (TEOS) as the source, has been investigated under high field stressing. The LPCVD oxides exhibit enhanced conductivity for the Fowler-Nordheim tunneling current, which is modeled as an effective lowering of potential barrier at the injecting electrode. The charge to breakdown (Q/sub bd/) of LPCVD oxides depends on both the deposition chemistry and post deposition annealing condition. The change in interface-state density (/spl Delta/D/sub it/), flatband voltage (/spl Delta/V/sub fb/), and gate voltage (/spl Delta/|V/sub g/|) during constant current stressing are studied to identify the degradation mechanism. We see a very good correlation between Q/sub bd/ and /spl Delta/|V/sub g/|, indicating that the degradation in LPCVD oxides is dominated by bulk trap generation and subsequent charge trapping. We present a detailed theoretical analysis to substantiate this.

Bipolar stressing, breakdown, and trap generation in thin silicon oxides

Thin silicon oxide films were stressed with bipolar pulses in which the magnitudes of both the positive and negative pulses were independently varied, The time-to-breakdown, the charge-to-breakdown, and the number of traps generated inside of the oxides during the stresses were measured and compared with oxides that had been stressed with unipolar pulses or stressed with constant dc voltages. For the bipolar stresses it was found that the time-to-breakdown, the charge-to-breakdown, and the number of traps generated inside of the oxide all increased as the magnitude of the opposite polarity, nonstressing pulse was increased, until the opposite polarity pulse became large enough to become the stressing pulse. The time-to-breakdown reached a maximum when the magnitude of the stressing pulse was approximately 1 V larger than the magnitude of the nonstressing pulse. The model that was used to explain these increases involved generation of traps inside of the oxide and the lack of spatial correlation between the traps generated by injection from one interface with the traps generated by injection from the other interface.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A comprehensive study of hot-carrier instability in p- and n-type poly-Si gated MOSFET's

A comprehensive comparison of hot-carrier instability between p- and n-type poly Si-gated MOSFET's is presented in this paper. The electron trapping and interface state generation in the 7 nm gate oxide of MOSFET's are investigated using uniform hot-electron injection from a buried junction injector (BJI) and channel-hot-carrier stress. From BJI experiments, electron trapping (instead of oxide trap generation) and interface state generation are shown to be the major effects of hot-electron injection. Electron trapping and interface state generation are found to be similar in both p- and n-type poly-Si gated MOSFET's. The dependences of interface state generation by hot electrons on oxide voltages and temperatures are observed to be similar between n- and p-type poly-Si gated MOSFET's. From the results of channel-hot-carrier stress on surface-channel n- and p-channel MOSFET's, it was also found that the channel-hot-carrier instabilities of p- and n-type poly-Si gated MOSFET's are comparable.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Direct and post-injection oxide and interface trap generation resulting from low-temperature hot-electron injection

We have studied direct and post-injection trap generation, induced by low-temperature (∼77 K) hot-electron injection. At these temperatures the main degradation mechanism, attributed to the release, migration, and subsequent reaction of a hydrogenic species is inoperative, not only due to the suppressed release but also to the freeze-out of the species motion. As a result, trap creation is strongly reduced as compared to room-temperature injection. Additional interface traps are created during warmup following low-temperature injection. Two post-injection generation processes have been observed: a low-temperature (120 K), bias-independent process believed to be related to the migration of neutral atomic hydrogen released during stress, and a high-temperature (250 K), negative-bias enhanced process that apparently cannot be attributed to the migration of a species, but rather resembles the negative-bias-temperature instability phenomenon.

BiMOS and SMOSC structures for MOS parameter measurement

Measurements of gate oxide stability in MOS VLSI development and manufacturing using substrate injection on two test structures are reviewed: the d.c. substrate injection via bipolar injector-MOS transistor (BiMOS) and the pulsed a.c. substrate injection via sourced-MOS capacitors (SMOSC). These techniques overcome the limitations of the MOS capacitor (MOSC) technique in measuring the fundamental dependencies of oxide trap charging and generation on the oxide electric field. They allow independent control of the oxide electric field, gate injection current, and electron energy. Application examples are described.

Interface trap generation and electron trapping in fluorinated SiO2

Electron trapping and oxide trap generation have been studied in polycrystalline-Si gate metal-oxide-semiconductor (metal-SiO2-Si) capacitors in which F was introduced into the SiO2 layer by implantation into the Si gate followed by a drive-in process. Three key findings are presented: (i) consistent with previous reports, the fluorinated SiO2/Si interface becomes more resistant to ionizing radiation or hot-electron damage; (ii) the incorporation of fluorine introduces electron traps with a small capture cross section of approximately 1×10−18 cm2; and (iii) the presence of F suppresses the generation of new oxide traps under high-field hot-electron injection. Possible explanations are discussed.

Characterization of Failure Mechanisms and Failure Rate of Oxide Wearout by Hot Electron Using D.C. and A.C. Substrate Electron Injection

ABSTRACTDetermination of the failure mechanisms and failure rate of oxide wearout by hot carrier injection in submicron metal-oxide-semiconductor field-effect-transistor (MOSFET) requires special test structures to isolate the oxide field dependence of oxide trap generation and charging. A bipolar-MOS transistor (BiMOS) structure is used which d.c. injects substrate electrons into the gate oxide of a MOS transistor by forward biasing the emitter-base n+/p junction of a vertical n+/p/n-inversion-layer bipolar junction transistor. The field and temperature dependences enable a separation of thermal and tunnel electron detrapping rates at low and high oxide field from the generation rate of new oxide traps at high fields. Pulsed a.c. substrate electron injection in a n+ sourced metal-oxide-semiconductor capacitor (SMOSC) structure is used to characterize the field dependence of oxide degradation in chlorinated oxides.

Negative charge induced degradation of PMOSFETS with BF 2 -implanted p + -poly gate

A new degradation phenomenon on thin gate oxide PMOSFETs with BF2 implanted p+-poly gate has been demonstrated and investigated. The cause of this type degradation is a combination of the boron penetration through the gate oxide and charge trap generation due to presence of fluorine in the gate oxide and some other processing-induced effects. The negative charge-induced degradation other than enhanced boron diffusion has been studied in detail here. The impact of this process-sensitive p+-poly gate structure on deep submicron CMOS process integration has been discussed.

Observation of threshold oxide electric field for trap generation in oxide films on silicon

Verwey’s bipolar/metal-oxide-silicon-field-effect-transistor structure is used to inject hot electrons into thermally grown wet oxide films on crystalline silicon by forward biasing the substrate emitter-base junction. Two components are separated from the threshold voltage shift: the electron charging of existing neutral oxide traps and the generation of new oxide traps. The density of the generated new oxide traps is found to increase rapidly and exponentially with increasing oxide electric field above 1.5 MV/cm. This threshold oxide field for oxide trap generation is consistent with the bond breaking energy of the hydrogen–silicon and hydrogen–oxygen bonds in the oxide film.

Trap generation and occupation in stressed gate oxides under spatially variable oxide electric field

The spatial variation of the oxide field in metal-oxide-silicon devices due to charge trapping under electron injection stress is included in a self-consistent trapping model. The model predicts the spatial distribution of the stress-generated trapping sites and their occupation level under different conditions of applied voltages and total injected charge. The calculated results agree quite well with the experimental results of prolonged charge injection, as expressed in shifts of the flatband voltage.