Transfer Gate Research Articles

Ion-implanted bubble circuit function design

New transfer designs for 8-μm period bubble memory devices based on ion-implanted propagation patterns are reported. Also, replication in such devices is discussed for the first time. Characterizations are given in the form of plots of bias field versus pulse parameters. These characterizations were obtained on a minicomputer controlled wafer-probe test set. All results reported here were obtained at 40°C. The transfer-in gate transfers bubbles from the high points of a "roof-topped" major line to a standard minor loop turn. The current pulse through the hairpin gates holds the bubbles for approximately one-half of a rotating field cycle, until the ends of the minor loops become attractive. With a drive field of 40 Oe and transfer current of 55 mA, a bias field range of 20 Oe has been achieved with this design. Double transfer at the read line consists of transfer-out to major line cusps followed by a second "invert" pulse to transfer the bubbles on through the unimplanted region to a second roof-topped path. The data order, on the roof-topped side after the invert pulse, is that originally present on the write line. With 40-Oe rotating field, 20 Oe of bias field operating range was obtained for transfer-out with 70 mA of current. The invert-transfer function was achieved with 18 Oe of bias field operating range, using 85 mA of current. Up to 16 Oe margin range was obtained for the invert-replication function in the same gate, but with the current increased to 100 mA. The overlap for transfer-in, transfer-out, and invert-transfer was at least 12 Oe for drive fields between 38 to 50 Oe. A bidirectional transfer gate action was achieved by pulsing a conductor to trap bubbles in 3-μm spaces between the ends of the minor loops and similar bulges incorporated into the major loop propagate path. With currents as low as 35 mA, the gate transferred bubbles in both directions over the bias range common to the minor and major loops, which was 20 Oe with a 40-Oe rotating field.

A magnetic-bubble-device simulator

An interactive field access magnetic bubble device simulator based on a continuum model is presented and described. The simulator consists of a large host computer and an on-line display terminal. An investigator seated at the keyboard display terminal interacts with one or more computer programs that calculate and display various aspects of magnetic situations which occur during the design of a magnetic bubble circuit. To accomplish this, the model calculates magnetic fields from rectangular and triangular elementary volumes of any random orientation with respect to the garnet, making it possible to model actual permalloy shapes and circuits. The model not only includes the interaction between the bubble and the permalloy elements, but also includes bubble-permalloy-bubble interactions and conductor-permalloy-bubble interactions and necessary to model a transfer gate. The mathematical foundations of the model are outlined and several design examples using this technique are presented, including comparisons with laboratory results.

MACLOS-mask checking logic simulator [for MOS LSI

A new logic simulator is described which uses the output from a mask analysis program as the input circuit data. Each circuit node is treated as the output of a multiinput transfer gate. Three logical states: 0, 1, and X, and four auxiliary states: D, S, B, and Z, are used in the simulation with a unit gate delay. The circuit node in the E/D MOS LSI is sorted into two types. The one, named TG, looks like the output of a multiinput transfer gate, and the other, named PTG, is like a transfer gate with a pulling-up transistor. MACLOS was successfully applied to a 12-bit microprocessor chip including 10K transistors and a RAM block fabricated by the E/D MOS process. It took 25 min for ACOS 700 to simulate the microprocessor for 213 clock cycles; 49K words of core memory were used in the simulation.

Charge transfer and blooming suppression of charge transfer photodiode area array

A charge-transfer photodiode array combines the advantages of diffused diodes for broad and smooth spectral response and analog registers for low-noise readout. The device structure described is that of a high-speed low-blooming 100-by-100 diode array using bucket-brigade readout registers. Two of the mechanisms which are essential to successful operation of this combination structure are studied. These mechanisms are the charge transfer from sensing diode to the analog register and blooming suppression. It is found that the charge-transfer speed degrades sharply with reducing light level due to subthreshold leakage behavior of the MOS transfer gate. This degradation is eliminated by using a background charge supplied from the analog register. Experimental data confirms the validity of the concept.

Design of Bubble Device Elements Employing Ion-Implanted Propagation Patterns

Experimental 8-μm period magnetic bubble devices have been made using 270/Ne/2E14 + 130/H <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> /2E16 patterned implants on YSm-LuCaGe-IG films previously implanted uniformly with 80/Ne/1E14. For subsequent alignments, the patterned implant was converted, in selected areas, into a relief pattern by phosphoric acid etching. A 2000 A.U. SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> prespacer was deposited next, followed by the deposition and ion beam delineation of 500 A.U. of Permalloy for detection. A subsequent 2000 A.U. spacer was then deposited and patterned with via holes for electrical connection between the Permalloy and a 5000 A.U. Al-Cu layer which was deposited and patterned with plasma etching or ion beam milling. Final passivation and opening of contact windows were standard. All designs at 8-μm period were implemented with 2-μm or larger features. Novel ion-implanted propagation patterns are shown which accomplish merge, inside turns, and double period propagation. A conventional hairpin shape was chosen for the generator, and the structure was placed in a cusp on the strong side of the major loop. Phase and current margins are presented. The minimum generator current varied with the starting anisotropy of the bubble film. The minimum current was about 100 mA in films with H <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">k</inf> around 1700 Oe, when the shallow implant was unpatterned. When the shallow implant was patterned, lower values were obtained. An N-shaped transfer gate was studied. The design provides both a strong gradient, to separate the bubble from the implant boundary, and a locally lowered bias region to trap the bubble until the correct in-plane field orientation results in normal propagation. Phase and current margins are shown for transfer-out. A hairpin linking cusps on the two sides of a horizontal loop was found to transfer both ways with good current margins. This gate can be used as an active merge or to reverse the order in a block to overcome topological difficulties in a G-type major-minor loop chip. Using the same idea, a transfer gate was designed which transferred through a write line to the bottom of the minor loops. Good phase and current margins were obtained. A combination of a 2-μm wide implanted channel, a hairpin canductor, and a symmetrically placed Permalloy serpentine has been studied in a nondestructive read-out (NDRO) mode. It appears that the serpentine has too few turns for good averaging of Permalloy domain effects, as these detectors are noisy. An alternate design used a simple Permalloy bar entirely over implanted material. The straight detector produced better signal-to-noise appearance, although at a lower signal level and higher stretch current. Two straight bars were used in conjunction with the channel design. Both detector and “dummy” sense the stripped-out bubble in this case. Low noise and the best figure of merit δV/V ∼ 0.38 percent were obtained In the destructive read-out (DRO) mode of operation. Good signals were also obtained from a straight Permalloy bar located over an unimplanted region, in the DRO mode, with a separated dummy. A valid chip organization for the DRO mode is offered. Thus, all necessary functions have been demonstrated for the design of 8-μm period maior-minor loop-organized bubble devices based on ion-implanted propagation. At least 20-Oe margins are shown for all functions at 40-Oe drive field.

A fully monolithic InSb infrared CCD array

Fully monolithic infrared CCD arrays have been fabricated in InSb, and detection and readout with the arrays have been demonstrated. The device reported is a 20-element linear array combining MOS detectors and a four-phase, overlapping-gate surface-channel CCD. The CCD's are p channel and utilize implanted planar p-n junctions for fat-zero (FZ) input and charge output. The charge transfer efficiency of the present devices is 0.995, limited by lateral surface potential variations rather than surface states, the density of which is very low. The transfer gate timing can be changed to either multiplex the twenty detector outputs or add them to achieve time-delay-and-integration; operation in both modes will be shown. The detectivity of the array has been measured in the multiplexing mode for a 5-ms integration time, operating temperature of 65 K, and background flux of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">12</sup> photons . s <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> . cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-2</sup> . These measurements yielded single-element peak D-stars above 8 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sup> cm. Hz <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1/2</sup> . W <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> with an array average of 6.4 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</sup> cm. Hz <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1/2</sup> . W <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> .

Proton-bombardment isolated GaAlAs/GaAs charge-coupled devices

Proton bombardment is used for the first time as a channel isolation technique to fabricate buried channel homojunction charge-coupled devices (c.c.d.s) of n-GaAs channel on GaAs substrate and heterojunction c.c.d.s of n-Ga1−xAlxAs on GaAs. The c.c.d. structure is a Schottky-barrier gate buried channel 3-phase device with 30 transfer gates. The channel-stop bombardment was carried out at room temperature with an energy of 200 keV and a total dose of 1015/cm2. The c.c.d.s were tested with electrical charge injection and direct readout. The charge transfer efficiency was found to be greater than 0.999 per transfer for both GaAs and GaAlAs. The proton-bombardment isolated devices were compared with similar devices using mesa isolation and were found to perform similarly.

Characteristics of a bubble generator at high temperatures

Generation current margin is found to be limited not only by minimum current but also by maximum current. The generator maximum current I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Gmax</inf> is measured for a 64 Kbit bubble memory chip with a 3 micron bubble. The chip temperature range was from 0 °C to 70 °C. A considerable loss of current margin is found at high current and high temperatures. This is considered to result from the generation of extra bubbles. I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Gmax</inf> and its decay are observed to strongly depend on the shape of the generation pulse. A properly selected pulse shape increases I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Gmax</inf> by 100 mA for a margin decay of less than -4 mA/decade and generate operation becomes possible in wide temperature range without compensation. Design combinations of generator and transfer gate or generator and replicator are proposed to give a more reliable generator port.

Bidirectionally propagating fast access bubble memory chips

Bidirectional propagation bubble memory chips have been successfully realized as 78 kb memory chips with 3μm bubbles and 14μm period symmetrical Y-Y propagation patterns. The chips are markedly characterized with the following functional patterns: (1) Transfer gate Ni-Fe patterns with complete symmetry. (2) Operation with no guard rail pattern around the memory area. (3) Collapsing type bubble annihilator. Chips are mainly fabricated in dry etching processes on an (YSmLuCa) <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> (FeGe) <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</inf> O <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">12</inf> LPE garnet film. Bias field operation margins greater than 18 Oe have been obtained for all functions, including bidirectional bubble propagation in minor loops in a 50 Oe rotating field at 300 kHz within a 0-100°C temperature range. Operation with no guard rail at all is guaranteed by the employment of a thin Ni-Fe detector, set in a major loop, and the collapsing annihilator. The detector, gives an output voltage of 14 mV/2mA at 25°C and -0.29%/°C temperature coefficient. A 64 kB memory system, capable of bidirectional accessing, has been developed using the 8 chips in four 128 kb modules. An average access time of 0.4 msec has been obtained.

Experiments on high speed bubble propagation

A high speed bubble drive circuit is proposed in which, by the application of an in-plane field, a bubble propagates at a speed higher than the saturation velocity with no in-plane field. The circuit consists of two meandering conductors. By the application of sine and cosine currents, the conductors of the optimum sizes produce a magnetic field which progresses at nearly a constant velocity. The operating bias margins of the circuit are improved by a permalloy rail which is placed along the center of the circuit. 42 mA is required to drive a bubble at 1 MHz. The current can be reduced to 10 mA, by applying a 100 Oe in-plane field. It is feasible to drive a bubble at 5 MHz with 20 mA current and a 200 Oe in-plane field. A major-minor independent chip organization in which the conductor circuit is used as a major line is described. The major line is linked to the conventional minor loops by a permalloyless transfer gate. The organization has the advantages of not only transfering bubbles at very high speed but also increasing the versatility of the memory chip function.

New input/output designs for high speed static CMOS RAM

New input and output schematics and optimum design for cell and array are proposed, and applied to a 256/spl times/4 bit CMOS static RAM. Simplified decoder circuit with effective decoder control circuit has a high speed and a wide timing margin. Simple sense amplifier and compact output circuit bring higher speed and reduction in pattern area. Using p-channel transfer gate for memory cell and array, the switching speed and operational stability are much improved. The device is fabricated by 5 /spl mu/m layout rule Si-gate CMOS technology. An 80 ns access time and 100 ns minimum cycle time are acquired at 5 V supply. Power dissipation is less than 7.5 mW at 1 MHz operation.

Free charge propagation in a resistive-gate MOS transmission line

A detailed computer analysis of the charge-transport process in an MOS transmission line (MOSTL)operating in deep depletion is presented. The mathematical model is developed taking into account time-dependent gate voltages, field-dependent surface mobility, and voltage-dependent depletion capacitance. A distributed transmission line circuit model similar to that obtained in a previous work for charge-transfer devices is derived. The charge-propagation characteristics are discussed and interpreted. The contributions of the physical transport mechanisms are investigated from the standpoint of assessing the influence of the design parameters and operating conditions on the performances of the structure. Several driving techniques which use time-varying gate voltages are proposed and simulated. Special emphasis is directed toward the possible improvements in the performances of an MOSTL used as a bit line in a continuously charge-coupled RAM or as a variable delay line for digital signals. Under some simplifying assumptions, an approximate model which yields closed-form solutions for the operational parameters of interest that compare well with the numerical calculations is developed. To a certain extent, the theory derived in this paper is also valid for charge-transfer devices, in particular for the charge-transfer process in bucket-brigade devices and under the transfer gates of two-phase CCD's.

Developments in magnetic bubble memories

Two new developments for magnetic bubble memories, a bubble propagation circuit and a bubble detector, are presented. The propagation circuit uses a channel with periodic traps coupled with asymmetrically placed bars of soft magnetic material to propagate bubbles nondirectionally with an alternating transverse magnetic field. This structure lends itself to very compact corners and transfer gates used in bubble memories with operating margins virtually identical to those of the straight line propagation circuit. A major-minor loop memory structure based on the channel-bar propagator is discussed. The structure yields independent propagation in the assembly and the storage loops using two mutually perpendicular transverse magnetic fields. The active bubble detector designed to match the excellent properties of the above circuit and to provide a means of nondestructive read-out is also discussed. The detector is based on a magneto-elastic phenomenon and does not require any electric current to operate.

A 300 kbit bubble memory chip with planar structure

A 300 kbit bubble memory chip has been designed based on 3 μm bubble technology. Nominal circuit period is 14 μm and chip size is 9.8 mm×9.6 mm. A gap-tolerant design is fully employed, such as, asymmetric half-disk propagation pattern, half-disk transfer gate, a novel asymmetric-chevron stretcher, etc. The chip is fabricated using a new planar process solving step-coverage problems to achieve good process yield. A typical bias field margin of 18 Oe is obtained at 55 Oe with a triangular wave drive.

Design and characterization of 3 μm bubble memory chips utilizing Y-Y patterns

Major-minor organized bubble memory chips have been developed utilizing 14 μm period Y-Y propagation circuits. First type is a 75 kbit memory chip consisting of four major-minor units for high performance demands. Designed access time and data rate for 300 kHz drive are 0.3 nsec and 2×600 kbits/sec, respectively. Second type is a single unit major-minor 78 kbit memory chip for medium access time use. Main chip design features are as follows: (1) 14 μm Y shaped Permalloy circuits are used throughout the chip, except for the 18 μm chevron stretcher. (2) Y-Y transfer gates have been tailored in order to adapt to Y patterns. (3) A thin film Permalloy detector is used for the sake of large output (15 mV/2 mA) amd O-π phase detection. The 3 μm bubble chips are fabricated on (YSmTmCa)3(FeGe)5O12 garnet films. Wafers are processed through 3 evaporation steps and 5 masks. Total 20 Oe operating bias margin is obtained at 300 kHz for 50 Oe drive field.

The properties of X-bar bubble memory chips

The properties of a 16-kbit bubble memory chip having a conventional major-minor loop organization are described. The chip can be operated up to a shift rate of 300 kHz which corresponds to a mean access time of 0.5 ms to blocks of 128 bits. Overall bias field margins of 13 percent were obtained, especially as the result of an appropriately selected layout of the transfer gates which is described in detail. Additional data are given concerning the influence of ambient temperature and of the number of propagation steps. The possibility of fabricating X-bar transfer gates using a single photomask step is demonstrated.

Conductor and transfer-gate performance of single-mask field-current access magnetic-bubble devices

Bubble propagation has been investigated in conductor structures on 5 μm bubble (Y,Sm,Lu,Ca)3(Fe,Ge)5O12. The conductors consist either entirely of Permalloy or of a sandwich of Permalloy on gold. A static in-plane field is used for unidirectional bubble propagation. The dependence of bubble motion on current amplitude and in-plane field magnitude has been measured at low and high frequencies. The bubble motion was observed to consist of a first slow step where the current acts against the in-plane field, and a second quick step where both act together. Attainable frequencies increase with increasing in-plane field and current intensities up to a maximum of 1.1 MHz. The sandwich conductor has a 12% operating margin at 830 kHz frequency and 30 mA current. It performs better than the all-Permalloy conductor at the same overall spacing of the Permalloy to the epifilm. An improved transfer gate from current to field-access has an 18% margin, from field to current-access 16%, at 100 kHz. The overlap with the conductor margins is 7% at in-plane fields from 30 Oe. The gates can be combined to obtain a field-current swap gate.

A Multiple-Gate CCD-Photodiode Sensor Element for Imaging Arrays

The addition of barrier and storage gates between the photodiodes and transfer gates of a CCD imaging array provides improved and versatile operating characteristics compared with present silicon scanners. An experimental scanner, made with multiple-gate photoelements, has new functional capabilities which result from the on-chip structure. These include exposure control in real-time which can compensate for temporal illumination variations during the integration cycle, linearization of the output signal with respect to light intensity, and adaptive level setting to normalize the output based on the whitest portion of the image. Complete charge transfer into the shift register is achieved at reduced shift-register voltages. The use of photodiodes and the absence of polysilicon in the photosensitive region improve spectral response and overall sensitivity. A sixteen element 4-phase, 2-level polysilicon CCD imager was designed, fabricated, and used to test the improved photoelement structure.

A multiple-gate CCD-photodiode sensor element for imaging arrays

The addition of barrier and storage gates between the photodiodes and transfer gates of a CCD imaging array provides improved and versatile operating characteristics compared with present silicon scanners. An experimental scanner, made with multiple-gate photoelements, has new functional capabilities which result from the on-chip structure. These include exposure control in real-time which can compensate for temporal illumination variations during the integration cycle, linearization of the output signal with respect to light intensity, and adaptive level setting to normalize the output based on the whitest portion of the image. Complete charge transfer into the shift register is achieved at reduced shift-register voltages. The use of photodiodes and the absence of polysilicon in the photosensitive region improve spectral response and overall sensitivity. A sixteen element 4-phase, 2-level polysilicon CCD imager was designed, fabricated, and used to test the improved photoelement structure.

Combination of field and current access magnetic bubble circuits

A high-frequency current-access output gate is applied to a field-access memory operating at lower frequencies. This takes advantage of materials whose maximum velocity is not reached at the obtainable rotating-field frequency. The access and cycle times can decrease easily by a factor of 2 to 6. A number of elements has been designed, necessary to perform a combination of field-access and current-access circuits. Conductor propagation structures and field-current transfer gates have been tested on high mobility 7μm-bubble La, Ga-YIG. These elements, though not optimised, already have overlapping margins. Single-mask conductors consisting entirely of permalloy or a sandwich of permalloy on gold both propagate bubbles up to about 1 MHz frequency.