Evaluation of the full operational cycle of a CMOS transfer-gated photodiode active pixel

Abstract

In this paper we evaluate the full operational cycle of the active-pixel circuit for CMOS image sensors in which four field-effect transistors are suitably combined with an ordinary photodiode; meaning a vertical p–n junction, as opposed to photogates, and with no custom pinned layer. Although this circuit topology itself is not novel, this evaluation intends to shine new light on the use of regular photodiodes. They became largely in disuse in four-transistor image chips under earlier process and design circumstances because the fourth transfer-gate FET did not hold a constant signal long enough and not for a fixed time. Our aim is to investigate the full underlying operational regimen of the transfer gate to propose that a regular photodiode might again be a choice to consider in the four-transistor pixel configuration, not only in conventional imaging but also in dedicated optical applications. The use of an ordinary p–n junction photodiode is advantageous as it offers full compatibility with even elementary mainstream CMOS processes. This investigation resorts to experiments and models both with fabricated integrated pixels and with a macro-pixel circuit implementation.