TFT Structure Research Articles

Characteristics of New Poly-Si Thin Film Transistor with a-Si Channel Region Near the Source/Drain

We propose the new poly-Si TFT structure which reduces the leakage current effectively employing highly resistive a-Si region in the channel. This new device has selectively crystallized active layer, where both edges of channel region adjacent to source and drain are not crystallized and remain a-Si. In the proposed device, the amorphous silicon region behaves like an offset to reduce the leakage current and also acts as the conduction channel of carriers under the ON state, so that the ON-current can be maintained. The experimental results show that the ON/OFF current ratio of proposed device is 2.71×106 while that of conventional one is 2.67×105. In the fabrication of the proposed device, there are not any additional photomasking steps and mis-align problem.

A-Si:H TFTs Made on Polyimide Foil by PE-CVD at 150°C

AbstractWe have fabricated high-performance amorphous silicon thin-film transistors (a-Si:H TFTs) on 2 mil. (51 µm) thick polyimide foil substrates. The TFT structure was deposited by r.f.-excited plasma enhanced chemical vapor deposition (PECVD). All TFT layers, including the gate silicon nitride, the undoped, and the n+ amorphous silicon were deposited at a substrate temperature of 150°C. The transistors have inverted-staggered back-channel etch structure. The TFT off-current is ∼ 10−12 A, the on-off current ratio is > 107, the threshold voltage is 3.5 V, the sub-threshold slope is ∼ 0.5V/decade, and the linear-regime mobility is ∼ 0.5 cm2V−1s−1. We compare the mechanical behavior of a thin film on a stiff and on a compliant substrate. The thin film stress can be reduced to one half by changing from a stiff to a compliant substrate. A new equation is developed for the radius of curvature of thin films on compliant substrates.

High mobility tri-layer a-Si:H thin-film transistors with ultrathin active layer

We show that hydrogenated amorphous silicon thin-film transistors (a-Si:H TFT's) with active layer thickness of 13 nm perform better for display applications than devices with thicker 50-nm active layers. A direct comparison of a-Si:H TFT's fabricated using an i-stopper TFT structure shows that ultrathin active layers significantly improve the device characteristics. For a 5-μm channel length TFT, the linear region (V/sub DS/=0.1 V) and saturation region mobilities increase from 0.4 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /V/spl middot/s and 0.7 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /V/spl middot/s for a 50-nm thick active layer a-Si:H device to 0.7 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /V/spl middot/s and 1.2 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /V/spl middot/s for a 13-nm thick active layer a-Si:H layer device fabricated with otherwise identical geometry and processing.

Photo and Thermal Stability of Chlorine Doped Amorphous Silicon TFTs

ABSTRACTThe Cl doped amorphous silicon film was deposited from SiH4, SiH2C12 and H2 gas mixture by PECVD process and their properties with various SiH2C12 flow rate is discussed. Controlling the amount of Cl doped was crucial for acquiring high stability TFT without lowering on current. Amorphous silicon and Cl doped amorphous silicon double layer TFT structure, with satisfactory on current and throughput, proved to be more stable than conventional amorphous silicon TFT in photo state and in elevated temperatures.

Electrical Characteristics of New LDD Poly-Si TFT with MIS-Alignment Tolerant Structure for AMLCDs

ABSTRACTA new LDD poly-Si TFT structure having symmetrical electrical characteristics independent of the process induced mis-alignment is described in this paper. Based on the experimental results, we have established there is no difference between the forward and reverse characteristics and a low leakage current, comparable to a conventional LDD poly-Si TFT, has been maintained for this new poly-Si TFTs. The maximum ON/OFF current ratio of about 1×108 is obtained for the LDD length of 1.0 μm. In addition, the kink effect in the output characteristics is remarkably improved in the new TFTs in comparison to the conventional non-LDD single- or dual-gate TFTs.

A Novel Device Structure for High Voltage, High Performance Amorphous Silicon Thin-Film Transistors

AbstractConventional high voltage thin-film transistors (HVTFTs) suffer from performance limitations such as low on-current, Vx, shift and large curvature in the linear region of the output characteristics. These limitations are associated with the highly resistive dead region in conventional HVTFT structures. In this paper, we present a novel TFT structure which has a high on-current, improved output characteristics in the linear region, and no Vx shift. The higher on-current and significant improvement in output characteristics allows faster switching. Elimination of the Vx shift leads to more reliable circuit operation. The new structure is based on the conventional low voltage TFT (LVTFT) structure except that it does not suffer from low-voltage breakdown. The low-voltage breakdown of the gate nitride in conventional LVTFTs is perceived to be due to spiking of the drain metallization into the underlying layers which creates regions of very high electric field. In our novel structure, a higher breakdown is achieved by locating the metal contacts away from the gate edge while keeping the necessary drain to gate overlap through a heavily doped microcrystalline layer. Therefore, the new TFT extends the same performance as LVTFTs to high voltage operation. Furthermore, this structure also enhances the yield and reliability by minimizing the common faults in TFTs such as short circuits between gate, source and drain.

A Novel Device Structure for High Voltage, High Performance Amorphous Silicon Thin-Film Transistors

AbstractConventional high voltage thin-film transistors (HVTFTs) suffer from performance limitations such as low on-current, Vx. shift and large curvature in the linear region of the output characteristics. These limitations are associated with the highly resistive dead region in conventional HVTFT structures. In this paper, we present a novel TFT structure which has a high on-current, improved output characteristics in the linear region, and no Vx, shift. The higher on-current and significant improvement in output characteristics allows faster switching. Elimination of the Vx shift leads to more reliable circuit operation. The new structure is based on the conventional low voltage TFT (LVTFT) structure except that it does not suffer from low-voltage breakdown. The low-voltage breakdown of the gate nitride in conventional LVTFTs is perceived to be due to spiking of the drain metallization into the underlying layers which creates regions of very high electric field. In our novel structure, a higher breakdown is achieved by locating the metal contacts away from the gate edge while keeping the necessary drain to gate overlap through a heavily doped microcrystalline layer. Therefore, the new TFT extends the same performance as LVTFTs to high voltage operation. Furthermore, this structure also enhances the yield and reliability by minimizing the common faults in TFTs such as short circuits between gate, source and drain.

A Self‐aligned, Trilayer, a‐Si:H Thin Film Transistor Prepared from Two Photomasks

A new self‐aligned TFT structure that requires two photomasks is described in this paper. Three process steps, i.e., the backlight lithography, the top dielectric etch, and the n+ etch, have been studied in detail. The finished TFT has transfer characteristics and curves similar to those of a TFT prepared from a more complicated conventional process. TFT structure parameters, such as the channel length, the a‐Si:H thickness, the source/drain via size, and the contact resistance, affect the field effect mobility and the ratio. These relations were examined. Including a thin layer in the gate dielectric structure changes the device characteristics. The relation between the process and the device has been studied.

Electron Cyclotron Resonance Hydrogenation of Poly-Si Thin Film Transistors on SiO2/Si Substrates

ABSTRACTWe report the results of an ECR hydrogenation time-behavior study on polycrystalline silicon thin film transistors. The device characteristics, such as mobility, subthreshold slope, threshold voltage, off current and on/off current ratio, were measured as a function of the passivation time. It was found that there is an optimal passivation time for this particular TFT structure, and overexposure to ECR hydrogen plasma may cause the degradation of some device parameters.

Effects of trap-state density reduction by plasma hydrogenation in low-temperature polysilicon TFT

The reduction of trap-state densities by plasma hydrogenation in n-channel polysilicon thin-film transistors (poly-TFTs) fabricated using a maximum temperature of 600 degrees C has been studied. Hydrogenated devices have a mobility of approximately 40 cm/sup 2//V*5, a threshold voltage of approximately 2 V, an inverse subthreshold of approximately 0.55 V/decade, and a maximum on/off current ratio of 5*10/sup 8/. The effective channel length decreases by approximately 0.85 mu m after a short hydrogenation which may be attributed to the activation of donors at trap states near the source/drain junctions. Trap-state densities decrease from 1.6*10/sup 12/ to 3.5*10/sup 11/ cm/sup -2/ after hydrogenation, concomitant with the reduction of threshold voltage. Using the gate lengths at which the trap-state densities deviate from the long-channel values as markets for the leading edge of passivation, the apparent hydrogen diffusivity is found to be 1.2*10/sup -11/ cm/sup 2//s at 350 degrees C in the TFT structure. >

The Characteristics of Amorphous Silicon TFT and its Application in Liquid Crystal Display

AbstractAn amorphous silicon TFT particularly suited for the full color liquid crystal display driver has been developed and reported here. Various fundamental factors involved in the a-Si TFT, such as the effects of structure, materials, and the method of fabrications were reviewed and investigated in terms of the field effect mobility, the threshold voltage and the reliabilities. An inverted-staggered TFT structure was employed for the purpose wherein the interface states between two layers was successfully lowered by employing the successive deposition procedures of SiNx gate insulator on the a-Si layer. Proper ohmic contacts and the blocking of hole injections were accomplished by forming a n+ layer between the a-Si layer and the source/drain metal electrodes which consists of a double layer of Al/MoSi2 in order to prevent the aluminum diffusion into the a-Si layer during the 300°C heat treatment at the succeeding fabrication processes. The degradation of display images due to the high intensity backlights was minimized by employing a light shielding layer and by making the thickness of a-Si layer 200 Å against the direct sunlight of up to 100,000 luxes. Stable actual performances of TFT for more than 4000 hours at 80 °C were confirmed. The development of a color LCD TV driven by this TFT is also reported.