Synchronous Reference Frame Phase-locked Loop Research Articles

An advanced hybrid pre-filtering/in-loop-filtering based PLL under adverse grid conditions

The amplitude, frequency and phase angle of the grid voltage are essential three components to ensure synchronization for grid interactive inverters. Synchronous reference frame-phase locked loop (SRF-PLL) is widely used to obtain these components. Although the SRF-PLL shows a perfect performance under ideal grid conditions, its performance deteriorates under unbalanced and distorted grid conditions. Therefore, researchers have been working to provide more advanced PLL methods. A dual third order generalized integrator PLL (DTOGI-PLL) and quasi-type-1 PLL (QT1-PLL) are two PLL methods that have come to the fore in grid synchronization recently. As with any method, these PLL methods have both advantages and disadvantages. The aim of this study is to integrate the advantages of the two methods, and to develop a new PLL method with better performance than these two methods. It means that the proposed PLL has the adaptive filtering capability of the DTOGI-PLL and fast transient response of the QT1-PLL. The effectiveness of the proposed PLL is confirmed by experimental results. The experimental results demonstrate that the proposed PLL is a more effective method than the DTOGI-PLL and QT1-PLL under adverse grid conditions.

A Single-Phase Globally Stable Frequency-Locked Loop Based on the Second-Order Harmonic Oscillator Model

This paper presents a novel frequency-locked-loop (FLL) scheme that provides estimates of the in-phase and square-phase fundamental components of a distorted single-phase reference signal and an estimate of its fundamental angular frequency. The main feature of the proposed scheme is that its design is fully based on the dynamical model of a single-phase signal generator, namely, the second-order harmonic oscillator (SOHO), which adds originality to the scheme. In fact, the proposed scheme owns a particular structure involving a set of orthogonal signals, which can be seen as the fixed-frame representation of three-phase balanced signals. Additionally, a plug-in block is included as a mechanism to mitigate the effect of the harmonic distortion. A proof of global stability for the proposed scheme based on nonlinear argumentation is also included, which contributes to the novelty of the work and ensures convergence disregarding the initial conditions of the to-be-estimated signal components. In addition, explicit conditions are presented for the tuning of control parameters. Experimental results corroborate the performance of the proposed scheme under angular frequency variations, phase jumps, voltage sags and harmonic distortion on the reference signal. For comparison purposes, also the state-of-the-art second-order-generalized-integrator-based FLL and the single-phase synchronous-reference frame phase-locked loop are tested.

Modelling and Performance Analysis of Synchronous Reference Frame Phase-Locked Loop for Three-phase Grid-connected PV Generation System

Due to the introduction of the feed-in tariff policy mechanism in many countries, the grid-connected Photovoltaic (PV) generation system becomes new attractions as it encourages the energy producers to generate and supplies electricity to the grid. The characteristic of the inverter’s voltage waveform, its amplitude, phase-angle and phase sequence are vital parameters for effective PV-grid synchronization. This paper presents a double stage converter, DC-DC boost conversion included to maximum power point tracking (MPPT) is achieved. Second stage DC-AC conversion is achieved using voltage source inverter (VSI). Grid connected synchronization is achieved by using synchronous reference (SRF) base phase locked loop (PLL). A details design and model for each section of the proposed system are also presented. The result shows that the implementation of synchronous reference frame (SRF) with PLL able to good achieved.

Analyses and Enhancement of Linear Kalman-Filter-Based Phase-Locked Loop

Linear Kalman-filter-based phase-locked loop (LKF-PLL) has been widely applied in grid synchronization and other power system fields. It receives considerable attention for its fast startup transient which is superior to the traditional PLL. However, when the KF reaches its steady state, the Kalman gains will converge to constant values, which makes it degrade into the traditional synchronous reference frame phase-locked loop. The main aim of this article is to analyze the steady state of LKF-PLL and make a good use of its adaptive process. Based on the analysis, a design guideline of the LKF is introduced, which can help tune the Kalman gains separately to meet the engineering requirements. Besides, to enhance the dynamic performance under phase jump condition, a dynamic tracking algorithm-based LKF is proposed in this article. Comparative tests about phase detection in power system are conducted, and the results show that the proposed algorithm can greatly improve the dynamic response under phase jump condition without degrading its steady-state performance inherited by the traditional PLL.

Phase-Locked Loop Independent Second-Order Generalized Integrator for Single-Phase Grid Synchronization

Second-order generalized integrator (SOGI) requires fast and accurate grid voltage frequency information for quadrature signal generation (QSG) in single-phase systems. Conventionally, synchronous reference frame phase-locked loop (PLL) (SRFPLL) is used in a cascade manner and provides frequency feedback to SOGI. PLL is a non-linear closed-loop control system that requires adequate gain parameter design trade-off to provide accurate grid synchronization. Additionally, it creates interdependent loops while estimating the grid frequency and phase-angle. This results in unwanted frequency disturbances during grid transients, such as voltage sag and phase-angle jumps (PAJs) which are fed back to the SOGI as well. Thus, this article proposes two PLL independent frequency-feeding approaches for SOGI: Type-A and -B. The frequency is estimated using the normalized single-phase grid voltage signal in both types. In Type-A, the normalization is done using cascaded recursive discrete-Fourier transform (RDFT) and inverse RDFT (IRDFT). On the other hand, in Type-B, SOGI outputs are used for normalization. The grid voltage amplitude is estimated using the absolute value of the in-phase and in-quadrature components of the proposed frequency-adaptive SOGI. Furthermore, the third-order polynomial approximation of the arctangent function is implemented for phase-angle estimation in both types. The performance of both the types during transients and steady-state grid voltage disturbances (dc offset and harmonics) are compared with SOGIPLL using both simulations and experiments.

Development of Frequency Fixed Sliding Discrete Fourier Transform Filter Based Single-Phase Phase-Locked Loop

The single-phase phase-locked loop (PLL) is essential for the stable operation and control of single-phase grid-connected converters. However, in practical applications, the grid voltage is usually affected by harmonics and dc offset, which will cause errors in the output of the PLL. Therefore, using sliding discrete Fourier transform filter (SDFT) as a prefilter, this paper proposes an improved single-phase synchronous reference frame PLL with a fixed sampling frequency, which can accurately and quickly obtain the grid parameters under distorted grid conditions. Most importantly, the paper theoretically analyzes phase and amplitude errors generated by SDFT for the first time and a quantitative compensation method is proposed, which is straightforward to be used by a reader. Finally, the proposed PLL is compared with other PLLs through simulation and experiments. The experimental results show the effectiveness and practicability of the proposed method.

Classical control algorithms for permanent magnet synchronous generator driven by diesel engine for power quality

SummaryPermanent magnet synchronous generator (PMSG) has received much attention in energy conversion these days because of its self‐excitation through magnets, which allows a stator output operation at a better power factor and high efficiency. Therefore, this paper dealt the power quality issues such as reactive power compensation and power factor correction including voltage control in diesel engine‐based generation system where PMSG is employed as a standalone power source. The configuration proposed in this paper consists of a battery energy storage system (BESS) at the DC bus of the distribution static compensator (DSTATCOM). The BESS enables DSTATCOM to have control over the active power and reactive power of the system. The function of BESS is connected at the DC bus to charge and discharge during light‐load period and heavy load period, respectively. Extraction of fundamental in the control scheme is done using three different types of classical algorithm based on phase locked loops (PLLs). They are double synchronous reference frame PLL (DSRF‐PLL), double‐frequency and amplitude compensation PLL (DFAC‐PLL), and adaptive filter with frequency estimation loop PLL (AFFEL‐PLL). The complete distributed generation (DG) system is simulated in MATLAB environment and has been validated in laboratory environments.

A novel phase-locked loop applied on frequency fluctuation of EAST power supply

The excellent performance of synchronous phase locked technology is the basis of improving the power quality of Experimental Advanced Superconducting Tokamak (EAST) power system. The conventional synchronous reference frame phase-locked loop (SRF-PLL) with low pass filter (LPF) has a poor filter capacity for the 2nd harmonic component as the fundamental frequency fluctuation due to the high-power, high-parameter operation of the EAST. To improve accuracy of the phase estimation, adaptive notch filter (ANF) will be introduced into the LSRF-PLL to reject the disturbance of 2nd harmonic component, which can adaptively track the fluctuation of fundamental frequency with least mean square (LMS) algorithm. A novel composite algorithm of LPF and ANF SRF-PLL (LASRF-PLL) is presented to suppress the disturbance of the frequency fluctuation and harmonic pollution. At the last, the performance of the proposed LASRF-PLL is finally validated by simulation results of MATLAB software.

A Bus Clamping PWM-Based Improved Control of Grid Tied PV Inverter with LCL Filter Under Varying Grid Frequency Condition

ABSTRACT This paper presents a modified Synchronous Reference Frame Phase locked loop (MSRFPLL) for better synchronizing the output of the inverter with the grid. The proposed PLL is able to track the changes in the grid frequency in a faster way as compared to the conventional synchronous reference frame PLL (SRF-PLL). In order to switch the inverter, an advanced bus clamping based space vector PWM is being used which is novel for photovoltaic application. This PWM gives better DC bus utilization as compared to the conventional Sine PWM technique. To keep the THD within a permissible limit of 5% in accordance with the IEEE-519 & 1547 standard LCL filter with passive damping is implemented. DSPACE-1104 DAC card has been used for better interfacing of the experimental set up with MATLAB. The overall system is also being simulated in MATLAB/Simulink environment and the simulated results have been validated with the experimental results.

Three-phase phase-locked loop algorithm and application to a static synchronous compensator

This work presents a phase-locked loop (PLL) algorithm for the detection of positive-sequence and negative-sequence grid voltages in three-phase systems. Since it employs an adaptive filter (AF), it is possible to track the fundamental component of the grid voltages accurately even in the presence of harmonics, subharmonics, and interharmonics. This aspect is of major concern for practical applications, especially because some popular algorithms present limited performance in such scenarios, e.g., the decoupled double synchronous reference frame PLL (DDSRF-PLL) and double second-order generalized integrator frequency-locked loop (DSOGI-FLL). A thorough comparison among the proposed method and other similar structures is presented in terms of steady-state and dynamic behaviors to show that the introduced PLL presents high immunity to power quality disturbances. Unfortunately, a possible drawback lies in the slow dynamic response due to the AF. In order to verify the applicability of the proposed approach, it is also incorporated to the control structure of a grid-connected power converter operating as a static synchronous compensator (STATCOM). This converter aims at regulating the ac voltage at the point of common coupling (PCC) and power factor correction. A detailed mathematical analysis is presented and experimental results are also discussed to validate the theoretical assumptions.

Design and Control of Medium-Voltage Multilevel Converter for Direct Grid Integration of Photovoltaic System

This paper deals with the design and control of a medium voltage cascaded H-bridge (CHB) multilevel converter for the direct grid integration of a large photovoltaic (PV) system. It presents the design considerations for selecting an optimum number of levels in the multilevel converter, which are to be both efficient and economical. This system is designed for medium voltage, 11 kV, and hence it can be directly interfaced with the grid without a step-up transformer. It contributes large cost savings in the installation, operation and maintenance of the large solar plant. With the increased number of levels, the converter output voltage waveform is a good approximation to the sine waveform. Therefore, the total harmonic distortions (THDs) of the output AC converter voltage and the grid current are reduced, which significantly improves the power quality of the output voltage waveform reducing the size and hence the cost of the filter. The effect of an increased number of levels on THDs is also studied. The control employed is a decoupled control with the synchronous reference frame—phase-locked loop (SRF-PLL), and a 19-level cascaded converter is operating at the low switching frequency. The separate improved perturb and observation (P&O) maximum power point tracking (MPPT) algorithm is used for tracking the maximum power from each array of the multistring solar photovoltaic (SPV) system. Both steady-state and dynamic performances of the system are simulated in MATLAB/ Simulink environment and validated in accordance with the IEEE-519 standard. A substantial reduction in THDs of the output AC converter voltage and the grid current, with increased number of levels, is observed in this system.

Prefiltered Synchronization Structure for Grid-Connected Power Converters to Reduce the Stability Impact of PLL Dynamics

Grid-connected converters under weak grid conditions could present instabilityassociated with the synchronization elements and not directly with the current control loop. The impedance-based stability criterion is an effective tool to address the problem. To solve the negative effect of the synchronous reference frame phase-locked loop (SRF-PLL) on grid current control under weak grid conditions, a synchronization structure with prefilter, based on a filtered quadrature signal generator (FQSG), is proposed in this article to improve the dynamics of the controller’s performance. The small-signal impedance model, implemente as a multiple-input multiple-output system in the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dq</i> -frame, characterizes the effect of the FQSG-PLL dynamics on the current control loop. From it, the impedance-based analysis shows the reduction of the stability issues of the converter. The analysis results were verified by time-domain simulations and by experimental tests in a full-scale 2-MW converter test bench.

Dq-Frame Impedance Modeling of Three-Phase Grid-Tied Voltage Source Converters Equipped With Advanced PLLs

With the increased prevalence of power converters in power systems, especially three-phase voltage source converters (VSCs), the stability analysis of power electronics-based power systems has received much attention recently. To this end, different impedance models, such as the dq -domain, sequence-domain, and phasor-domain impedance models among others, have been developed for three-phase VSCs in recent years. A common trend in all these impedance models, which have no noticeable practical advantage compared to each other, is considering a standard synchronous reference frame phase-locked loop (SRF-PLL) for the synchronization of the VSC with the power grid. The standard SRF-PLL, however, has a limited filtering ability and, therefore, may not be very practical in most applications. To deal with this shortcoming of the SRF-PLL, a great number of advanced three-phase PLLs have been proposed in the literature. These advanced PLLs may have different feedback/feedforward loops and filters in their structures, which make including their dynamics in the available impedance models complicated. Bridging this gap in research is the objective of this article. To this end, it is demonstrated that advanced three-phase PLLs have an alternative representation, which can be easily obtained and included in the available dq -frame impedance model. Several case studies are presented to verify this idea.

Modified non-adaptive bandpass filter based phase locked loop

In this Letter, a demodulation based pre-filtering technique is proposed for fast detection of the single-phase grid variables. The estimation of grid voltage parameters is achieved through a Type-I synchronous reference frame phase-locked loop (PLL). The modified bandpass filter in the pre-filtering stage ensure a better rejection of the DC-offset and harmonics. Thus, the grid variables are estimated rapidly with the help of a simple proportional controller. Consequently, in-loop filtering burden and the effort required to tune the PLL is minimal. However, steady errors are witnessed in the fundamental amplitude and the phase information which are mitigated by a curve fitting technique. Importantly, the proposed PLL scheme has improved the dynamic performance under off-nominal frequency conditions with immunity against grid disturbances. The robustness of the proposed algorithm is experimentally verified vis-a-vis existing literature.

Synchronous reference frame single‐phase phase‐locked loop (PLL) algorithm based on half‐cycle DFT

In single-phase power and energy applications, sliding discrete Fourier transform (SDFT) filter based quadrature signal generation is a well-known tool for designing advanced phase-locked loops (PLLs), particularly for applications where high disturbance rejection ability is demanded. The SDFT-based PLL, nevertheless, has a limited ability in achieving fast response (a response time more than one cycle of the nominal frequency). To deal with this problem, a synchronous reference frame PLL based on half-cycle DFT (HCDFT) is proposed, enabling a fast and accurate synchronisation even in distorted grid. In this study, the fundamental voltage of the PLL input signal is obtained by a HCDFT filter. Then, phase, frequency and amplitude can be detected by the improved synchronous reference frame phase-locked loop (SRF-PLL). Besides, in order to solve the phase error when the frequency changes, a phase compensator is used. The HCDFT-based SRF-PLL method proposed in this study is compared, through experimental results, with a number of conventional methods, showing that the phase can be estimated under grid voltage disturbances accurately and quickly, which verifies the effectiveness and superiority of the proposed algorithm.

A Non-Adaptive Single-Phase PLL Based on Discrete Half-Band Filtering to Suppress Severe Frequency Disturbances

The interconnection of new generating and storing devices to the power grid imposes the necessity of synchronizing, so the power flow can be manipulated and distributed. In the presence of an increasingly perturbed electric grid, many proposals of novel and modified synchronization techniques attained enough robustness to deal with known perturbations. However, such proposals exhibit drawbacks on their own, leaving open enhancement opportunities, mostly over their discrete implementation—e.g., sampling issues and not-considered inter/harmonics—and their inherent complexity—e.g., the need for frequency adaptability. In this work, three traditional synchronous reference frame (SRF) phase-locked loops (PLL) are modified to implement discrete filtering, such as the well-known proposals based on moving average filters (MAFs), to avoid the problems mentioned above, known for affecting the MAF’s performance. This proposal makes use of discrete, efficient units modularly assembled to yield a signal’s average, based on elliptic half-band filters. The proposed PLLs were tested and exhibited clear advantages—robustness against frequency disturbances—over MAF-based equivalents at standardized tests over a typical simulation environment, setting through this work an initial milestone for its verification and further incorporation in more complex synchronization topologies.

Offset error compensation algorithm for grid voltage measurement of grid-connected single-phase inverters based on SRF-PLL

This paper proposes a method for compensating the offset error in the grid voltage measurement process of grid-connected single-phase inverters. In general, the offset error in the grid voltage sampling process results in a fundamental frequency component in the synchronous reference frame phase locked loop (SRF-PLL). As a result, the dq-axis currents and phase current based on the synchronous reference frame PI current regulator include the unwanted DC component, as well as first- and second-order harmonic ripples when compared with the grid frequency due to the distorted grid angle. Therefore, in this paper, the influences of the offset error are mathematically analyzed based on the SRF-PLL. In particular, the d-axis integrator output of the SRF-PLL with a PI controller is selected to detect the offset error. Then it is compensated using a simple proportional-integral controller. Moreover, the root mean square function is easily applied to obtain the offset error. The usefulness of the proposed algorithm is verified through simulation and experimental results.

Nonlinear Analysis of PLL Damping Characteristics in Weak-Grid-Tied Inverters

Under weak grid scenarios, the widely adopted synchronous reference frame phase-locked loop (SRF-PLL) exhibits complex behavior due to the possible grid phase or frequency disturbances. In this brief, the nonlinear damping characteristics of the PLL is identified. The damping ratio of the PLL under various grid strength is explored thoroughly. The root cause of the PLL instability is unveiled. It is shown that, with the low short-circuit ratio (SCR) of very weak grid, the damping ratio will drop sharply due to the nonlinearity of the PLL phase detector. A practical parameter design method is developed accordingly to avoid instability caused by insufficient damping. Simulations and laboratory experiments verify the validity of analysis results.

To study unplanned islanding transient response of microgrid by implementing MSOG and SRF‐PLL based hierarchical control in the presence of non‐linear loads

This study considers the hierarchical control of microgrid and harmonic compensation of non-linear load specially in transition from grid-connected to unplanned islanding. The proposed controllers are based on the stationary reference frame with hierarchical control levels (inner, primary, and secondary). In the inner control loop, proportional and multi-resonant voltage and current controllers for three-phase voltage source inverters are proposed. Moreover, a droop control is used to share active and reactive power in the primary control loop. To achieve decoupled active and reactive power sharing, virtual impedance loop is implemented, too. The mentioned procedure increases the total impedance and consequently reduces the initial current and subsequently facilitates the continuous connection of DGs to the MG. To attain smoother transition, selective harmonic virtual impedance is applied by multiple second-order generalised integrator module to extract the fundamental positive sequence and harmonic components of the output current of the DGs. In secondary control level, synchronisation procedure is considered to make connection and restoration by the advanced three-phase synchronous reference frame PLL with in-loop moving average filter which significantly enhances its disturbance rejection capability. The results are shown smoother transition, robustness, and high performance of the proposed hierarchical control VSIs during variation of system configuration.

Performance evaluation of an intelligent decoupled stationary reference PLL for grid synchronization of five-phase wind power conversion system

The one of most prominent issues of wind power conversion system (WPCS) is grid synchronization. Grid connected high power wind generation is the most potent growing technology with advances in megawatt capacity wind turbine, large power generators and power converters. Large power WPCS demands multiphase induction generator possessing more advantages which prevails the three-phase generator. This paper incorporates the vital converters and controller for building a model of grid interfaced five-phase WPCS. This study is developed in Matlab. A new hybrid Decoupled stationary reference frame phase-locked loop (dαβPLL) is employed for synchronization of grid which combines the advantages of double decoupled synchronous reference frame PLL (ddsrfPLL) and stationery reference frame PLL (αβPLL). The simulation results from the developed model investigate the machine functionality and power output for varying wind velocities. The enumerated modeling aspect represents the system response for various wind speeds. The paper confirms the competence of five-phase induction generator (FPIG) with better fault tolerance and significant power output with decrease in phase current. This investigation proposes and compares the different PLLs for various grid fault conditions and suggests dominance of the proposed Decoupled stationary reference PLL (dαβPLL).