Synchronous Reference Frame Phase-locked Loop Research Articles

A Simple Approach to Reject DC Offset for Single-Phase Synchronous Reference Frame PLL in Grid-Tied Converters

Synchronous reference frame phase-locked loop (SRF-PLL) is widely used for grid voltage synchronization in single-phase grid-connected power converters. However, in the actual situation, dc offset component may be introduced in the input of the PLL, due to the transient fault of the power grid, sampling and measurement error, or A/D signal processing. A simple yet effective approach with additional all-pass filter based dc rejecter is presented for SRF-PLL, in this paper. Thereby, correct estimation and undesirable periodic ripple free can be achieved in SRF-PLL, when the input signal contains dc offset. The second order generalized integrator based PLL (SOGI-PLL) is first introduced, followed by the analysis on influence of the input dc offsets in SRF-PLL. The structure of enhanced-SOGI (ESOGI) with its analysis of dc offset rejection effects and performance have been then formulated in detail. Finally, experimental results are presented to demonstrate the effectiveness of the proposed ESOGI based PLL.

Modeling and Adaptive Design of the SRF-PLL: Nonlinear Time-Varying Framework

Synchronous reference frame phase-locked loops (SRF-PLLs) are widely used in different technologies, such as wind turbines, electric vehicles, more electric aircraft, and motor drives, to estimate system's variables. The SRF-PLL is an adaptive notch filter that is used to estimate a sinusoidal signal's amplitude, phase angle, and frequency. However, when the input signal is subjected to a considerable variation or includes a significant noise, its stability and performance become challenging. In this paper, the stability of the SRF-PLL for substantial changes in the input signal's variables are investigated. To do so, the nonlinear time-varying (NTV) model of the system is proposed and is used for the large-signal stability assessment. Then, an adaptive tuning method, based on the proposed NTV model, is designed to improve its transient performance during and after the variation. Simulation and experimental results are used to validate the proposed method.

Modeling and Stability Analysis of a Smart Transformer-Fed Grid

The interaction of the smart transformer (ST) with the grid-converter-based distributed energy resources (DERs) could trigger instability. Recent research efforts have been made to study the stability issues caused by the resonances (e.g. LC or LCL filter resonances of DERs) in ST LV side grid. This paper studies the impact of the grid synchronization of the grid-converter-based DER on the stability of the ST as well as the grid. The equivalent admittance of the grid converter considering the effect of synchronous reference frame phase-locked loop (SRF-PLL) is developed and merged with the ST voltage control. Based on the generalized Nyquist criterion, the stability analysis of a ST-fed grid is carried out, showing that the PLL bandwidth is a key factor that determines the system stability. To address the stability issue, a stabilization method based on virtual impedance is proposed and can be seamlessly integrated with the ST voltage control. Simulation and experimental results are provided to validate the effectiveness of the analysis and the proposed control strategy.

Error Compensation Algorithm for SRF-PLL in Three-Phase Grid-Connected Converters

This paper proposes an error compensation algorithm based on synchronous reference frame phase-locked loop for accurate phase estimation of the distorted three-phase voltages including asymmetrical phase voltages, harmonics, and dc offset. These errors cause undesirable periodic ripples with grid frequency in the traditional PLL and significantly degrade the overall performance of the grid-connected converters. In this paper, the effects of the errors are comprehensively analyzed in the stationary and synchronous reference frames. In particular, the errors are estimated and compensated by controlling the $\alpha $ -axis and $\beta $ -axis components in a PLL to be balanced. The proposed compensation algorithm can be implemented by some integral operations followed by simple Integral-controllers. The performance and robustness of proposed compensation technique are investigated under distorted grid conditions. The proposed technique is numerically and experimentally verified using Matlab/Simulink and Dspace1202 control board platform.

Fixed Point Implementation of Grid Tied Inverter in Digital Signal Processing Controller

Power inverters are one of the devices of great importance used in power grids to convert DC to AC, especially for grids with attached solar panels or wind turbines. The world is getting warmer due to coal- and oil-based power generation. So human existence is threatened due to the increased amount of carbon-dioxide in the air. As a result, integration of renewable energy sources (RESs) with the grid became mandatory. So, the demand of grid-connected inverters is increasing as more RESs are connecting with the grid; this necessitates developing a low-cost grid connected inverter system. This paper presents a comprehensive study and hardware implementation of a grid tied inverter. In this research, we have demonstrated a cost-efficient grid tied inverter design using low cost DSP controller applying fixed point arithmetic. The fixed-point arithmetic and Digital Signal Processing (DSP) implementation results in superior performance over conventional methods of calculation. This paper also proposes a hardware model of such a bi-directional grid tied inverter. A current controlled Voltage Source Inverter(VSI) is used in the paper and a PI controller is suggested for current error compensation. To generate gating pulse for appropriate voltage, Space Vector Pulse Width Modulation (SVPWM) technique is employed. Synchronous Reference Frame Phase Locked Loop (SRF-PLL) is chosen for performing grid synchronization. The feasibility of the hardware model is verified by performing simulations on Simulink.

Design of a High Performance Phase-Locked Loop With DC Offset Rejection Capability Under Adverse Grid Condition

In the new energy grid-connected power generation system, accurately extracting the grid synchronization signals such as the frequency, phase and amplitude of the grid voltage is the basis for effective control. Aiming at the requirements for detecting grid synchronization signals under unbalanced, harmonics and DC offset voltage mixed conditions, a dual second-order complex coefficient filter with DC offset rejection capability (DSOCCF <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dc</sub> ) is proposed, combining the approach of moving average filter (MAF), a novel hybrid filter in dq-frame is designed and on the basis of this design a new synchronous reference frame phase locked loop (SRF-PLL) design approach based on the hybrid filter is proposed. The proposed approach employs moving average filter (MAF) to block the high-frequency harmonics in the grid voltage, and uses DSOCCF <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dc</sub> to separate the fundamental frequency positive and negative sequence and reject DC offset. It can accurately extract the synchronization information of the grid fundamental frequency positive sequence. After simulation and experiment verification, it can be confirmed that the proposed PLL can quickly and accurately lock the properties of the grid voltage under adverse grid condition, and also have high detection accuracy and strong robustness to frequency fluctuations.

A Novel Repetitive Control Enhanced Phase-Locked Loop for Synchronization of Three-Phase Grid-Connected Converters

This paper proposes the enhancement of a synchronous reference frame phase-locked loop in terms of its dynamic response and disturbance rejection capability. The improvements were undertaken in order to upgrade the converter grid support capability required by modern grid codes during grid faults. The proposed repetitive control-based filter is inserted in the loop filter structure of the phase-locked loop. For the initially proposed structure, the necessity of the phase angle error correction term was derived and added at the output of the loop filter. On a set of tests that included (i) phase jump; (ii) voltage sag; (iii) voltage harmonics; (iv) DC offset; (v) random noise and; (vi) frequency change, the synchronization algorithm with the proposed modification showed two desirable characteristics: (i) a high attenuation of oscillations on specific frequencies; and (ii) the instant compensation of the portion of the phase angle jump. Along with the benefits, drawbacks of the proposed synchronization method were noted, the most important being the high dependency of the oscillation attenuation capability on the fundamental frequency drift and susceptibility to high-frequency noise. With the proposed modification, the synchronization algorithm manages to achieve a phase angle settling time not longer than one fundamental frequency period in all of the conducted tests.

Performance evaluation and benchmarking of PLL algorithms for grid‐connected RES applications

The phase-locked loop (PLL) is the main controller element for the fast and accurate synchronisation and operation of grid-connected renewable energy systems (RESs). It is used to extract the grid voltage information such as the phase angle, the frequency and amplitude. Subsequently, this information is used in the control system of the grid-side converter of the RES. The performance of the PLL is critical under abnormal grid conditions such as in the event of balanced and/or unbalanced faults, frequency and phase variations, the presence of harmonics, interharmonics and DC offset. This study sets out with a benchmarking study of the four latest state-of-the-art PLLs. The PLLs compared are the decoupled dual synchronous reference frame PLL, the decoupling network designed in αβ-frame PLL, the enhanced pre-filtering moving average filter type-2 PLL and the harmonic–interharmonic DC-offset PLL. The PLLs are analysed and compared based on their performance, their dynamic response and their computational complexity. The benchmarking concludes with a PLL selection guide depending on the application and other system constraints. Experiments and simulation results are presented to compare and analyse the performance of the selected PLLs.

Active Power Transfer Enhancement in VSC using Impedance Compensated DSRF-PLL during Weak Grid Condition

In last two decades the use of renewable sources has been increased tremendously. This has increased the number of inverters connected to grid for the integration of energy from renewable sources. The stability of grid tied inverter is very much important with increased number of inverters. Especially in weak grid, which leads to voltage fluctuation, stability of inverter needs more attention. For a stable operation of VSC it is very important to detect the phase of grid voltage at point of common coupling (PCC) with proper accuracy. In this paper a Double Synchronous Reference Frame PLL (DSRF-PLL) with grid impedance compensation is presented. It is shown that with grid impedance compensation in phase detection, a VSC can be virtually synchronized at a stronger point of common coupling (PCC) in grid and this will enhance the active power transfer capacity of VSC with stable operation in weak grid condition. MATLAB simulation results are presented to verify the findings.

Recursive Implementation of Multiple Delayed Signal Cancellation Operators and Their Applications in Prefiltered and In-Loop Filtered PLLs Under Adverse Grid Conditions

Phase-locked loops (PLLs) are widely utilized for grid synchronization and control of power electronic converters. More recently, both in-loop-filtered- and prefiltered-based PLLs have become more popular due to their prompt and accurate estimations of grid voltage quantities. In the past, an advanced filter viz., multiple delayed signal cancellation (MDSC) operators, has been successfully investigated in both $\alpha \beta$ -frame and $dq$ -frame for extracting fundamental-frequency positive-sequence grid voltage quantities by using conventional synchronous reference frame PLL. These operators can provide more flexibility to configure the delay time and undesired harmonics in comparison with the existing cascaded delayed signal cancellation operators. In this paper, the recursive-form structures of MDSC operators are analyzed, which are derived from the direct-form MDSC realizations. The recursive-form structures of MDSC operators are simple in implementation when compared to direct-form realizations. With the recursive-form MDSC implementations, both prefiltered MDSC-PLL and in-loop filtered MDSC-PLL will be investigated in detail. The design guidelines of these recursive-form-based MDSC-PLLs are presented. Comparison studies of the proposed PLLs and the validation of their dynamic performances are done by experimental verifications.

Performance analysis of SRF-PLL and DDSRF-PLL algorithms for grid interactive inverters

In grid interactive power converter applications, phase locked loop (PLL) algorithms are very important to realize grid synchronization. The performance of PLL should not be affected by adverse conditions such as voltage unbalance, harmonics, frequency and phase changes. Otherwise, synchronization errors occur between the grid interactive inverter and the grid. In this paper, two different PLL algorithms are simulated by modeling under MATLAB/Simulink. The performances of the PLLs are comparatively presented under four different grid conditions such as balanced, unbalanced, harmonics and variable frequency. In this study, synchronous reference frame-PLL (SRF-PLL) and decoupled double synchronous reference frame-PLL (DDSRF-PLL) which are mostly used, state-of-arts and effective PLL algorithms are analyzed by modeling in grid synchronization applications. It has also been demonstrated the positive and negative aspects of the PLLs based on the obtained results.

An Implementation of Improved PLL for Control of Grid-Connected Converters Under Grid Perturbations

In this article, a new method is proposed for calculating electric angle using a phase-locked loop (PLL) to perform these calculations correctly under disturbance conditions of the grid voltage. This work is based on using the decoupled double synchronous reference frame PLL (DDSRF-PLL), and this kind of PLL has been expanded to solve its problems in the presence of harmonics and high disturbance in the input voltage. In the DDSRF-PLL, only components with a frequency of double the fundamental frequency will be deleted, but in the expanded PLL all the harmonics will be eliminated. The effect of this method was tested using both simulation and practical experimentation. The simulation of this method was performed in MATLAB software. It has been shown that this method is robust, precise and fast for calculating the electric angle under grid voltage perturbations. Subsequently, the developed PLL was implemented in a FPGA-based experimental setup and its function was studied.

VCO‐less PLL control‐based voltage‐source converter for power quality improvement in distributed generation system

This paper presents the voltage-controlled oscillator (VCO) less phase-locked loop (PLL)-based control of voltage source converter. It is used in the distributed power generation system for improved power quality. This control extracts the fundamental component from the sensed load current using three phases to alpha–beta transformation without using VCO, unlike synchronous reference frame–PLL, where fundamental component extraction needs two transformations with the use of VCO. Owing to the absence of VCO in the proposed method, the computational burden of trigonometric operations is very less that results in a faster dynamic response under variable conditions. This characteristic makes it suitable for the distributed power generation system, where fast changes occur frequently. In this study, wind-based distributed generation system has been taken for study, which comprises of self-excited induction generator feeding non-linear load with varying electrical conditions. Using the proposed control, the reactive power compensation, harmonics reduction and load balancing are carried out in the system. In addition to it, neutral current compensation is also accomplished with the help of star–delta transformer connected at the load end. The system performances are investigated under steady state as well as in transient state and results are found satisfactory.

The Impact of PLL Dynamics on the Low Inertia Power Grid: A Case Study of Bonaire Island Power System

To prepare for the future high penetration level of renewable energy sources, the power grid’s technical boundaries/constraints for the correct operation of powerelectronics interfaced devices need to be further examined and defined. This paper investigates the challenge of integrating Voltage Source Converters (VSC) into low inertia power grids, where the system frequency can vary rapidly due to the low kinetic energy buffer available, which used to be provided by the rotational inertia of synchronous generators. The impact of rate of change of frequency (ROCOF) on the PLL dynamics and its subsequent influence on the VSC power stage output is explained. The Bonaire island network is presented as case study. The performance of the VSC is analyzed under a fast ROCOF event, which is triggered by a short circuit fault. A down-scaled experiment is used to validate the Bonaire island network simulation results. It shows that the phase angle error measured by the synchronous-reference frame phase-locked loop (SRF-PLL) is proportional to the slope of the ROCOF and inversely proportional to its controller integral gain constant.

Design and Control of a Grid-connected Seven Level Inverter for Photovoltaic Applications

This paper presents the design and closed-loop current control of a grid connected seven-level, 3-phase diode-clamped multilevel inverter for Photovoltaic (PV) applications. The proposed closed loop current control technique is based on the voltage-oriented proportional integral (PI) controller theory. The modulation technique used is level-shifted-carrier sinusoidal pulse width modulation (SPWM). The gain values of PI controller were selected to achieve good current quality and dynamic response. Grid synchronization was achieved by using a synchronous-reference frame phase-locked loop (SRF-PLL). Matlab/Simulink was used for the control system design and simulation. The simulation results show that a 1.34% total harmonic distortion (THD) of the output current was achieved which is within the allowable current distortion limits by international standards. The stability of the system was analyzed using pole-zero mapping and root locus.

Hedge-Algebra-Based Phase-Locked Loop for Distorted Utility Conditions

This paper presents the first application of the hedge-algebra theory in the field of grid synchronization. For this purpose, an optimized hedge-algebra controller (HAC) is developed and incorporated within the three-phase phase-locked loop (PLL) with moving average filters (MAFs) inside its feedback loop. Optimized fuzziness parameters and linguistic rule base of the HAC are obtained by a genetic algorithm using the integral of absolute error as the performance index during optimization. Calculated optimal parameter values of the HAC depend on the most frequently occurring disturbance in the electric grid. Two different PLL structures are proposed, depending on the types of disturbances occurring in the electric grid. The first structure is the conventional synchronous reference frame PLL with the nonadaptive MAF (i.e., MAF without order adjustment), but with the PI/PID controller in the phase loop replaced by the developed HAC. Such PLL structure is suitable for all analyzed disturbance types, expect for step-changes in the grid frequency. The second PLL structure introduces the adaptive MAF (i.e., MAF with order adjustment) and a new feedback signal in the output stage of the controller to achieve zero steady-state error in the case of step-changes in the grid frequency. The disturbance rejection capability of the two developed PLLs with the HAC (HAC-PLLs) is tested separately and compared experimentally with the PID- and fuzzy-controller-based PLLs.

Grid Integration of Single-Stage SPV-STATCOM System Using Symmetric Cascaded Five-Level VSC

This work proposes a dual-function single-stage solar photovoltaic (SPV) grid-tied system with STATCOM (static compensator) capabilities using a three-phase five-level cascaded VSC (voltage source converter) operating at low switching frequency with low total harmonic distortion (THD) and low switching losses. The proposed SPV-STATCOM system works in three modes: i.e. Mode-1, in which only an active power is transferred to the grid, Mode-2, in which both active and reactive power are supplied to the grid and Mode-3, in which only reactive power is supplied to the grid, thereby utilizing the full capabilities of the SPV system. An incremental conductance algorithm is used to track power from SPV array which is fed to the grid. To synchronize the VSC to the grid, a decoupled current controller with feed-forward term and double decoupled synchronous reference frame phase-locked loop (DDSRF-PLL) is used. The use of a single-stage five-level cascaded VSC offers the advantages of low switching losses and the operation at high power and high voltage which results in an improvement in quality of power of the system. The simulated results demonstrate the system design and control scheme under varying conditions.

Comparison of Synchronization Techniques Under Distorted Grid Conditions

In grid-connected power converter applications, the phase-locked loop (PLL) is probably the most widely used grid synchronization technique, owing to its simple implementation. However, in power grids some very common problems, such as voltage distortion, voltage unbalance, and frequency instability make synchronization a challenging task. The performance of the conventional synchronous reference frame PLL (SRF-PLL) is greatly reduced in the presence of distorted grid conditions. For a polluted grid some advance PLL techniques have been proposed, such as moving average filter PLL (MAF-PLL) and cascaded delayed signal cancellation PLL (CDSC-PLL). These techniques have been mostly evaluated in the presence of odd and even harmonics but the effects of interharmonics on these synchronization techniques still needs to be investigated. In this paper, a detailed performance comparison has been made between SRF-PLL, MAF-PLL, and CDSC-PLL for grid voltages contaminated with interharmonics in the presence of different grid disturbances, such as frequency jump, phase angle jump, and dc offset. The techniques are simulated using Matlab/Simulink. The CDSC-PLL shows excellent performance as compared with other techniques in terms of dynamic response as it settles to frequency step change in a half cycle but the presence of interharmonics greatly reduces its filtering capability. On the other hand, MAF-PLL gives a ripple free behavior in frequency estimation but with a much slower dynamic response as it settles to a frequency step change in more than three cycles. SRF-PLL only performs well under harmonics free grid voltages.

Adaptive SRF-PLL Based Voltage and Frequency Control of Hybrid Standalone WECS with PMSG-BESS

Abstract The variable-speed Permanent Magnet Synchronous Generator (PMSG) based Wind Energy Conversion System (WECS) attracts the maximum power from wind, but voltage-regulation and frequency-control of the system in standalone operation is a challenging task A modern-control-based-tracking of power from wind for its best utilization is proposed in this paper for standalone PMSG based hybrid-WECS comprising Battery Energy Storage System (BESS). An Adaptive Synchronous Reference Frame Phase-Locked-Loop (SRF-PLL) based control scheme for load side bi-directional voltage source converter (VSC) is presented for the system. MATLAB/Simulink model is developed for simulation study for the proposed system and the effectiveness of the controller for bi-directional-converter is discussed under different operating conditions: like variable wind-velocity, sudden load variation, and load unbalancing. Converter control scheme enhances the power smoothening, supply-load power-matching. Also it is able to regulate the active &amp; reactive power from PMSG-BESS hybrid system with control of fluctuations in voltage &amp; frequency with respect to varying operating conditions. Proposed controller successfully offers reactive-power-compensation, harmonics-reduction, and power-balancing. The proposed scheme is based on proportional &amp; integral (PI) controller. Also system is experimentally validated in the laboratory-environment and results are presented here.

Steady-State Linear Kalman Filter-Based PLLs for Power Applications: A Second Look

In three-phase power and energy applications, the synchronous reference frame phase-locked loop (SRF-PLL) is a popular tool for synchronization purposes. The SRF-PLL can be easily and effectively customized for different scenarios by changing its loop filter. Recently, some supposedly different PLLs using the steady-state linear Kalman filter have been developed. The main aim of this letter is to analyze these PLLs. It is demonstrated that they are actually equivalent to some well-known SRF-PLL structures and, therefore, provide no advantage compared to them.