Surface Mount Printed Circuit Board Research Articles

Stencil Printing Optimization using a Hybrid of Support Vector Regression and Mixed-integer Linear Programming

This research proposes an optimization approach to enhance the stencil printing process (SPP) in surface mount printed circuit board (PCB) assembly. Stencil printing behavior is affected by many variables including stencil design, solder paste composition, squeegee speed and pressure, and other environmental conditions. In this research, support vector regression (SVR) model is trained to capture the complex relationships among these variables, based on historical data. A mixed-integer linear programming (MILP) model is proposed to minimize the total absolute predicted deviation of average volume transfer from target. The optimal printing settings are retrieved for different sample problems with low computational cost.

Reliability study of surface mount printed circuit board assemblies with lead‐free solder joints

PurposeThe purpose of this paper is to evaluate the lead‐free solder joint reliability of a variety of surface mount components assembled onto printed circuit boards (PCBs) under a number of different tests.Design/methodology/approachLead‐free solder with a composition of Sn96.5‐Ag3.0‐Cu0.5 was used in a surface mount reflow process. Different types of surface mount dummy components with a daisy chain, such as CBGAs, BGAs, PLCCs, CSPs, and QFNs, were assembled onto PCBs. Both the mechanical and thermo‐mechanical reliability of the solder joints were evaluated by several tests. The experiments included package shear, package pull, three‐point bending and accelerated thermal cycling testing for 2,000 cycles. The packages were examined by X‐ray and C‐SAM before the reliability tests were carried out. The maximum load and the corresponding load‐displacement curve were recorded in the mechanical test.FindingsThe results from the mechanical tests show the major failure mode is on the copper pad. Weibull analysis shows that the characteristic lives of most packages are between 1,100 and 2,400 cycles. For the CBGA, the characteristic life of 96 cycles is relatively short, due to the serious CTE mismatch. Cross‐section inspection shows failures occur at the solder joint. Copper pad failure is also observed.Originality/valueThis paper provides both the mechanical and thermal‐mechanical reliability of lead‐free solder joints. The experimental data are very useful in the lead‐free SMT industries.

GDKAT: A goal‐driven knowledge acquisition tool for knowledge base development

While knowledge‐based systems are being used extensively to assist in making decisions, a critical factor that affects their performance and reliability is the quantity and quality of the knowledge bases. Knowledge acquisition requires the design and development of an in‐depth comprehension of knowledge modeling and of applicable domain. Many knowledge acquisition tools have been developed to support knowledge base development. However, a weakness that is revealed in these tools is the domain‐dependent and complex acquisition process. Domain dependence limits the applicable areas and the complex acquisition process makes the tool difficult to use. In this paper, we present a goal‐driven knowledge acquisition tool (GDKAT) that helps elicit and store experts’ declarative and procedural knowledge in knowledge bases for a user‐defined domain. The designed tool is implemented using the object‐oriented design methodology under C++ Windows environment. An example that is used to demonstrate the GDKAT is also delineated. While the application domain for the example presented is reflow soldering in surface mount printed circuit board assembly, the GDKAT can be used to develop knowledge bases for other domains also.

A Genetic Algorithms Enhanced Planning System for Surface Mount PCB Assembly

Printed circuit board (PCB) assembly forms the core of a vast array of contemporary manufactured products. The requirements for higher component densities on PCBs, rigid functional specifications, smaller packages and greater reliability, move the electronics manufacturing industry towards automating PCB assembly. Owing to the complexity of PCBs, it becomes impractical to plan the assembly sequence manually. This paper presents a prototype genetic algorithms (GAs) enhanced planning system for surface mount PCB assembly. The prototype system uses GAs to generate the component placement sequence and the component-feeder arrangement for a rotary disk turret, concurrent pick and place SMD machine equipped with a time-delay function. The sequencing process is formulated as a multi-objective optimisation problem under constraints. A framework of the prototype system and the derivation of the multi-objective function are described. The prototype system was validated using examples gleaned from literature. Details of the validation are reported.

DESIGN ISSUES ASSOCIATED WITH NEURAL NETWORK SYSTEMS APPLIED WITHIN THE ELECTRONICS MANUFACTURING DOMAIN

Neural networks have been applied within manufacturing domains, in particular electronics industries, to address the inherent complexity, the large number of interacting process features and the lack of robust analytical models of real industrial processes. The ability of neural systems to provide nonlinear mappings between process features and desired outputs has been the major driving force behind implementations. One of the major issues limiting the widespread industrial uptake of neural systems is the lack of detailed understanding of their design, implementation and operation. In many cases, network topologies and training parameters are systematically varied until satisfactory convergence is achieved. There is little discussion of the rationale behind the adopted training methods. A review of research into the functions that can be readily represented by neural networks are presented in this paper. The application focus is the control and monitoring of a discrete manufacturing process that is part of the manufacturing cycle of mixed technology surface mount printed circuit boards. Detailed knowledge of the process operation and functionality that can be represented by simple network topologies have been combined to develop a structured, partially interconnected neural network that provides optimised convergence performance. A comparison of the designed solution with standard approaches to neural network implementation is given. It has been demonstrated that if there is sufficient confidence in the operation of the process, input feature interaction within the network can be constrained to produce a robust control and monitoring system.

An integrated methodology for surface mount PCB configuration

An integrated methodology for surface mount printed circuit board assembly configuration is described. The methodology involves component-to-feeder assignment, feeder bay distribution among components, board family formation, and machine program generation. Applications result in significant reduction in setup times and in planning and scheduling times.

AN INTEGRATED METHODOLOGY FOR SURFACE MOUNT PCB CONFIGURATION

This paper develops an integrated methodology for surface mount printed circuit board (PCB) assembly machine configuration. The methodology involves feeder bay distribution among components, component-to-feeder assignment, and machine program generation. Benefit-cost analysis and board family grouping are used to divide the surface mount machine carrier into three distinct bays: fixed, semi-fixed, and configurable. An integer programming model is then formulated for component-to-feeder assignment. A heuristic algorithm is developed to solve the integer programming model. Application of the methodology results in significant reduction in machine setup times and improvement in operational performance for a complex surface mount system.

Industrial application of fuzzy systems: Adaptive fuzzy control of solder paste stencil printing

This paper presents an adaptive fuzzy control algorithm for the control of the solder paste stencil printing stage of surface mount printed circuit board (PCB) assembly. The proposed method of automatic solder paste stencil printing consists of four blocks: fuzzy feature extraction, defect classification of paste deposits, adaptive fuzzy rule-based model identification and subsequently an optimal control action for the stencil printing process. Experimental results are presented to illustrate the capability of the algorithm.

Nondestructive detection of delaminations in multilayer ceramic capacitors using improved digital speckle correlation method

The use of an improved digital speckle correlation method (DSCM) was demonstrated for the in situ and nondestructive detection of delaminations in layered-structure microcomponents such as multilayer ceramic capacitors (MLCs) in surface-mount printed circuit board assemblies. The delaminations in MLCs that contributed to thermal displacements on the MLC surface after electrical loading could be uniquely identified using the improved DSCM, with the help of a double-lens arrangement. The method was found to be very sensitive to the thermal displacement of the MLS surface after electrical loading. A resolution of better than 20 nm in surface deformation measurements has been achieved within 0.01 pixel resolutions. The delamination in a MLC, as obtained by this method, correlates well with destructive physical analyses performed on the respective samples. © 1997 John Wiley & Sons, Inc. Microwave Opt Technol Lett 16: 80–85, 1997.

A profile identification system for surface mount printed circuit board assembly

Reflow soldering using InfraRed (IR) and/or convection is a popular method used to attach surface mount components to the Printed Circuit Board (PCB). The quality of the solder joints produced by reflow soldering is a function of the temperature parameters set for the operation. Identifying the appropriate thermal profile for an IR radiation/convection oven for a specific PCB assembly is a complex problem in which several variables and control parameters need to be considered. The complete understanding of the interrelationships among the various domain parameters is required to obtain high yields for the processes requiring heating (reflow soldering and/or curing) in the PCB assembly process. A knowledge based approach was used to design and implement a profile identification decision support system for the surface mount PCB assembly domain. This system can help a process engineer determine the thermal profile for reflow soldering and/or for the curing of adhesive and/or conformal coats.

Development and validation of a lead-free alloy for solder paste applications

A lead-free solder alloy has been developed and, in form of a solder paste, validated for use in the assembly of surface mount printed circuit boards (PCB). Liquidus and solidus temperatures have been measured by thermal analysis and an optimum composition selected. Wetting balance tests have been done comparing the performance of the alloy with that of 60/40 tin/lead (SnPb), 99/1 tin/copper (SnCu) and 96.5/3.5 tin/silver (SnAg) alloys on bare copper (Cu) coupons. The tests showed faster wetting for the alloy than for the SnAg and SnCu alloys, with results under some conditions comparable to those achieved with 60/40 SnPb. A no-clean rosin base solder paste was made up with the alloy and used to assemble 20 standard mobile phone PCBs. The boards were successfully soldered by nominally raising the reflow temperature, but only by 10/spl deg/C as compared with eutectic SnPb pastes. Solder joint reliability was tested by temperature cycling Pb-free and 63/37 soldered boards between -25/spl deg/C and +125/spl deg/C for 1000 cycles. Results as assessed by metallographic analysis were better for the Pb-free alloy than for the reference SnPb alloy.

REWORK OF BGA COMPONENTS

Area array packages are being increasingly used in the surface mount printed circuit board assembly domain due to their unique characteristics and high process yields. Several researchers have indicated that the process defects associated with the ball grid array components on printed circuit board assemblies are dramatically lower than those experienced with traditional leaded components. However, there are a number of other reasons to remove and replace components including package defects, engineering changes that are required after a number of components have been assembled, device or system upgrades, misregistration, wrong component orientation, etc.The rework of ball grid array components is a challenging task since the solder joints are hidden from view and cannot be readily accessed. Traditional approaches to rework that are applied to peripheral leaded or leadless components might not be applicable to ball grid array components. This paper provides a detailed discussion of the rework process for ball grid arrays. Topics that are addressed include the characterization of the rework system, nozzle design, the component removal process, the need for site redressing and the technique to be used, solder and flux application, and the component replacement process. A comprehensive set of process-related recommendations is provided for the rework of ball grid arrays.

Experimental design with fuzzy levels

A novel technique is introduced for planning experimental design employing fuzzy rule-based systems. The significant aspect of the proposed experimental design with fuzzy levels (EDFL) is assigning a membership function for each level of variable factors. Consequently, the design matrix and observed responses can be represented in a set of fuzzy rules. Several examples are presented to clarify the proposed idea and the results are compared with the conventional Taguchi methodology. We have specifically planned an L18 orthogonal array EDFL for the solder paste printing stage of surface mount printed circuit board assembly to provide a model for the process and to optimize the selection of variable factors.

A STUDY OF SOLDERABILITY AND SOLDER SPREADING FOR SMT OPEN JOINTS

In the on-going drive for miniaturization, the overall design objective in electronics manufacturing is to achieve the best compromise between product performance, production cost (including rework), size, weight, quality and reliability. This has posed a major challenge to surface mount printed circuit board assembly processes. This paper focuses on the control of component solderability by the wettability of the lead’s geometrical design and its thermal demand with respect to flux kinetics, i.e. the movement of the contact line,1 in order to reduce the number of open joints created during the manufacturing process.

Expert system based placement sequence identification for surface mount PCB assembly

Component placement is a critical and time consuming task in the assembly of surface mount printed circuit boards (PCBs). The past decade has witnessed the need for high speed, accurate, and repeatable placement procedures in the PCB assembly domain. At the same time, manufacturing engineers are faced with demands to reduce flow-time and increase throughput rates in order to increase productivity. A consequence of these trends has been the need to identify acceptable (possibly optimal) placement sequences during surface mount PCB assembly.

Distributed artificial intelligence in process control

A distributed artificial intelligence based system for process planning in surface mount printed circuit board assembly was designed and developed. Multiple intelligent agents work together to read a CAD drawing of an assembly and subsequently deduce the process instructions needed. The system can also review a board from a 'design for manufacturing' perspective and identify the cost of assembly. It uses fuzzy logic to deal with domain related uncertainty. Object oriented programming concepts have been used in system implementation.

A knowledge-based thermal profile identification advisor for surface mount PCB assembly

Reflow soldering of solder paste is a critical process in the surface mount assembly of printed circuit boards (PCBs). Infrared (IR) radiation and/or forced convection are often used in an oven to heat the PCB assembly and the deposited solder paste to cause the solder to reflow and subsequently form the interconnection between the component terminations and the attachment pads. Control of the reflow soldering process requires the understanding and regulation of several complex variables. Understanding the interrelationships among process control parameters is important in achieving a low defect rate and high yields in reflow soldering. When a variety of components are soldered onto a printed circuit board (PCB) simultaneously in an IR/convection oven through reflow soldering, the process control variables that need to be considered include the characteristics of solder paste used, the size, type, and quantity of components placed on the PCB, the substrate used, the mass and the thermal area of the workpiece, and the conveyor speed.

Placement sequence identification using artificial neural networks in surface mount PCB assembly

The widespread use of automation in the printed circuit board (PCB) assembly domain has been dictated by the increasing density of components on PCBs coupled with the continual decrease in component lead pitch, greater product mix, smaller volumes, quality considerations, and the increased cost of labour. However, these advances in technology have also resulted in automated systems that are complex, and solving problems related to these systems requires the efficient use of extensive specialised knowledge.

THE SOLDERABILITY EVALUATION OF SURFACE MOUNT COMPONENTS THROUGH THE USE OF WETTING BALANCE ANALYSIS

Solderability is an important concern in the surface mount assembly of Printed Circuit Boards (PCBs). It impacts assembly reliability and yield. The solderability requirement of the components and boards used in surface mount PCB assembly is critical since the solder joint needs to provide both the electrical and the mechanical connections. The advent of ultrafine pitch components has only helped to increase the importance of solderability in surface mount assembly. Solderability evaluation for surface mount components and the identification and study of factors that influence it are of primary importance in the surface mount assembly of PCBs. The wetting balance can provide a quantitative investigation of solderability through measurement of wetting speed and the wetting force. It has been used for the solderability testing of through hole components. The use of the wetting balance apparatus for the testing of surface mount components raised several concerns. Some modifications were made to simplify the testing operations, to enhance the precision of the wetting balance apparatus and to enable the collection of more accurate data. The preliminary experiments explored the nature of the wetting balance test and helped identify a standardized process that could provide valid conclusions. A set of validated test parameters and a standardized set of test procedures that could be used to perform the incoming solderability testing of surface mount components were established. While the test procedures used in this research were a derivative of the IPC ANSI J-STD-002 standard, changes were made based upon the experience gained through the test schedule and the results and inferences obtained through preliminary experiments. Various types of mass reflow surface mount components were measured by their relative solderability. The solderability of tape automated bonding components with various plating metallurgy and coating thicknesses was also tested. The specific testing parameters used, the test procedures adopted, the data collected and the inferences made are presented in this paper.

A knowledge-based object oriented DFM advisor for surface mount PCB assembly

The volume and complexity of printed circuit boards (PCBs) that use surface mount technology has increased tremendously over the past decade. The intricacy of the design and manufacturing functions associated with this domain is continuously increasing. Several researchers have documented the significance of the design functions on product life cycle costs. In the surface mount PCB assembly area, the integration of the design and manufacturing activity is hampered by the lack of sufficient, in-depth manufacturing knowledge among the PCB designers. Also, the heuristic nature of manufacturing knowledge coupled with the frequent advances in the state-of-the-art has resulted in the lack of widespread in-depth process knowledge.