Abstract

Component placement is a critical and time consuming task in the assembly of surface mount printed circuit boards (PCBs). The past decade has witnessed the need for high speed, accurate, and repeatable placement procedures in the PCB assembly domain. At the same time, manufacturing engineers are faced with demands to reduce flow-time and increase throughput rates in order to increase productivity. A consequence of these trends has been the need to identify acceptable (possibly optimal) placement sequences during surface mount PCB assembly.

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