In this paper, a novel high throughput software polarization-adjusted convolutional (PAC) decoder based on the fast successive cancellation (FSC) decoding algorithm is first proposed. The FSC decoding algorithm is obtained by expanding the fast list decoding algorithm to suit parallel designs. To improve the parallel processing capabilities of the proposed decoder, we use SIMD and multiple cores techniques to decode multiple codewords in parallel, thus effectively parallel mapping the FSC decoding algorithm to processors. The proposed decoder is sufficiently general to be implemented on X86 and embedded processors (NEON, SSE, AVX256, and AVX512 instructions). Experimentations show that the proposed software PAC decoder can achieve 370 Mbps under the multithreading mode.
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