Submicrometer Channel Research Articles

Length and temperature dependent 1/f noise in vertical single-walled carbon nanotube arrays

We report measurements of temperature- and length-dependent 1/f noise in vertical single-walled carbon nanotube (SWCNT) arrays. Carbon nanotubes are synthesized in a porous anodic alumina template with sub-micrometer channel lengths ranging from 100 to 700 nm. A significant difference is observed in the 1/f noise magnitude of quasi-ballistic and diffusive SWCNT devices, with quasi-ballistic devices exhibiting 1/f noise levels that are one to two orders of magnitude less than diffusively conducting devices. Furthermore, 1/f noise was measured from 90 to 400 K, and the noise prefactor decreased significantly at temperatures below 250 K.

Lift-Off Photolithographic Top-Contact OTFTs Using a Bilayer of PVA and SU8

A lift-off process for direct photolithographic top-contact organic thin-film transistors (TFTs) has been developed using a bilayer of polyvinyl alcohol and SU8. Top-contact pentacene TFTs fabricated by this method, with a fixed channel width of 300 μm but different channel lengths varying from 10 to 80 μm, exhibited mobility values in the range of 0.01-0.03 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /V·s with the average of 0.021 ± 0.007 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /V·s. It is expected that the adoption of SU8 with a high aspect ratio enables the easy fabrication of submicrometer channel devices, giving rise to improved carrier transport characteristics.

High Current, Low Voltage Carbon Nanotube Enabled Vertical Organic Field Effect Transistors

State-of-the-art performance is demonstrated from a carbon nanotube enabled vertical field effect transistor using an organic channel material. The device exhibits an on/off current ratio >10(5) for a gate voltage range of 4 V with a current density output exceeding 50 mA/cm(2). The architecture enables submicrometer channel lengths while avoiding high-resolution patterning. The ability to drive high currents and inexpensive fabrication may provide the solution for the so-called OLED backplane problem.

Geometrical effect in submicrometer channel organic field effect transistors

The electrical behaviors of submicrometer bottom-gate bottom-contact organic field effect transistors (OFETs) with submicrometer channel lengths and channel widths were investigated. Short-channel effects (SCEs) were observed for devices with shorter channel lengths and wider channel widths. The SCEs were effectively suppressed by reducing the channel width to 50 nm. The relationship between the drain current density and the drain voltage normalized by their respective channel lengths revealed that the drain current characteristics of shorter length channels fall into two types: parasitic contact resistances at lower drain voltage and SCEs caused by the space charge limiting current at higher drain voltages. The carrier mobility was also investigated, and found to be enhanced in the narrower channel width.

High-Frequency Performance of Submicrometer Transistors That Use Aligned Arrays of Single-Walled Carbon Nanotubes

The unique electronic properties of single-walled carbon nanotubes (SWNTs) make them promising candidates for next generation electronics, particularly in systems that demand high frequency (e.g., radio frequency, RF) operation. Transistors that incorporate perfectly aligned, parallel arrays of SWNTs avoid the practical limitations of devices that use individual tubes, and they also enable comprehensive experimental and theoretical evaluation of the intrinsic properties. Thus, devices consisting of arrays represent a practical route to use of SWNTs for RF devices and circuits. The results presented here reveal many aspects of device operation in such array layouts, including full compatibility with conventional small signal models of RF response. Submicrometer channel length devices show unity current gain (f(t)) and unity power gain frequencies (f(max)) as high as approximately 5 and approximately 9 GHz, respectively, with measured scattering parameters (S-parameters) that agree quantitatively with calculation. The small signal models of the devices provide the essential intrinsic parameters: saturation velocities of 1.2 x 10(7) cm/s and intrinsic values of f(t) of approximately 30 GHz for a gate length of 700 nm, increasing with decreasing length. The results provide clear insights into the challenges and opportunities of SWNT arrays for applications in RF electronics.

Sub-micrometer Organic Field Effect Transistors

Pentacene organic field effect transistors with a series of sub-micrometer channel have been fabricated and characterized. Source and drain metal electrodes was made by electron-beam lithography and lift-off process. Image reversal photo resist was used to make integrated mask to pattern the organic semiconductor film to reduce the off-state current. And thiol treatment was applied on gold electrodes to modify their surface energy and improve the charge carrier injection. All the devices can behavior as typical p-type transistor, and have obvious saturation. Using electrode and dielectric surface treatment, device performances have significant improvement. All of the performances, including mobility, threshold voltage and on/off current ratio will change with the channel length decreasing because of the low quality interface between the OSC and dielectrics.

Submicrometer polymer transistors fabricated by a mask-free photolithographic self-alignment process

A simple method for patterning down to 400nm gaps between two thin-film electrodes is presented. The edge of the first electrode defines the gap via a photolithographic step using off-normal through-substrate exposure. It is demonstrated that the gap width can be controlled simply by adjusting the exposure angle and/or photoresist thickness. Using this process, poly(3-hexylthiophene) field-effect transistors with a submicrometer channel and a large channel width to length ratio of up to 5000 have been fabricated. Since the process is mask free, contactless, highly parallel, and offers high resolution, it is potentially suited for the high-throughput, low-cost fabrication of electronic circuits.

Parametrical studies of electroosmotic transport characteristics in submicrometer channels

Spatially two-dimensional nonequilibrium mathematical model describing electroosmotic flow through a submicrometer channel with an electric charge fixed on the channel walls is presented. This system is governed by the hydrodynamic, electrostatic, and mass transport phenomena. The model is based on the coupled mass balances, Poisson, Navier–Stokes, and Nernst–Planck equations. Nonslip boundary conditions are employed. The effect of an imposed electric field on the system behavior is studied by means of a numerical analysis of the model equations. We have obtained the following findings. If the channel width is comparable to the thickness of the electric double layer, the system behaves as an ion-exchange membrane and the dependence of the electric current passing through the channel on the applied voltage is strongly nonlinear. In the case of negatively (positively) charged walls, a narrow region of very low conductivity (so-called ionic gate) is formed in the free electrolyte near the channel entry facing the anode (cathode) side. For a wide channel, the electric current is proportional to the applied voltage and the velocity of electrokinetic flow is linearly proportional to the electric field strength. Complex hydrodynamics (eddy formation and existence of ionic gates) is the most interesting characteristics of the studied system. Hence, current–voltage and velocity–voltage curves and the corresponding spatial distributions of the model variables at selected points are studied and described in detail.

Self-aligned inkjet printing of highly conducting gold electrodes with submicron resolution

Self-aligned printing is a recently developed bottom-up printing technique which utilizes the unique droplet motion on heterogeneous surfaces to define sub-100-nm critical features and surpasses the resolution which can commonly be achieved by direct printing by two orders of magnitude. Here we extend this method, which was originally implemented with conductive polymer inks, to fabrication of functional conductive nanostructures with gold nanoparticle ink. We also designed a configuration where the ink was printed between two lithographically defined patterns to facilitate the study of the channel formation. Channel lengths from 4μm down to 60nm were achieved by controlling the surface tension and drying time of the ink. A fluid dynamical model is presented to explain the mechanism by which the channel forms in the self-aligned printing technique. Field-effect transistors fabricated using gold self-aligned printed source-drain electrodes exhibit significantly improved output currents than those using conducting polymers. Unambiguous evidence for the submicrometer channel dimension is obtained by imaging the potential drop along the channel using scanning Kelvin probe microscopy.

Suppression of short-channel effects in organic thin-film transistors

To improve the speed of organic thin-film transistor (TFT) circuits device architectures with submicrometer channel length are of interest. However, in conventional, submicrometer TFT structures the performance is degraded as a result of short-channel effects. Here we present an architecture for short-channel organic TFTs which is based on incorporating an insulating mesa structure in between source and drain electrodes. For submicrometer organic TFTs the mesa structure results in a significant enhancement of the on-off ratio and saturation characteristics. Device modeling shows that the mesa improves the ability of the gate electrode to modulate the carrier concentration in a submicrometer channel.

Organic thin-film transistors with submicrometer channel length fabricated by atomic force microscopy lithography

Using atomic force microscopy (AFM) lithography provides a simple and easy technique for fabricating bottom-contact pentacene organic thin-film transistors (OTFTs) with a submicrometer channel length. The channel length formed by the AFM lithography was around 0.9 μm and the variation of channel length remained small over the channel width. The output characteristics of OTFTs showed a typical p-type behavior with a lack of current saturation due to the short channel length of OTFTs. The field-effect carrier mobility, inverse subthreshold swing and I ON/ I OFF of the OTFTs were 0.23 cm 2/V s, 1.2 V/dec and 7 × 10 5, respectively.

Device operation of p-i-p type diamond metal–insulator–semiconductor field effect transistors with sub-micrometer channel

Sub-micrometer p-i-p type diamond metal–insulator–semiconductor field effect transistors (FETs), which are composed by p + layers by B ion implantation and intrinsic channels deposited by a selective epitaxy, are fabricated. The current flow in the FET with a sub-micrometer channel are investigated by repeating measurements under a same bias sweep, and the current drift and the degradation of the device characteristics between the repeated measurements are observed. Distribution of the current density in the fabricated FET is analyzed by using a device simulator. The conduction mechanism and the carrier paths in the devices are discussed.

Junction leakage current degradation under high temperature reverse-bias stress induced by band-defect-band tunnelling in power VDMOS

A deep analysis of the intrinsic junction and surface currents in power vertically diffused MOS devices with sub-micrometer channel length and thin gate oxide has been carried on after a typical reliability high temperature reverse bias (HTRB) stress. A reference set of gated diodes has also been examined in order to better understand the onset and evolution of post-stress leakage degradation. A comparison among complete MOSs, single body diodes and enriched diodes allows to highlight the role played by the point defectivity both at gate interface and in the bulk silicon close to the junction surface. We found that the typical interface defects involved in the leakage degradation are shallow traps and can be de-populated simply by a thermally activated mechanism. More specifically, the main degradation mechanism relies to band-defect-band tunneling localized at the surface drain/body junction where an intrinsic n-i-p region evolves due to a bird’s beak lateral profile of the body diffusion. We have demonstrated that the most important contribution to the activation of the precursor defect sites is given by the transverse electrical field that develops just below the SiO 2/Si interface within the n-i-p region during the stress.

Organic field-effect transistors with nonlithographically defined submicrometer channel length

We developed an underetching technique to define submicrometer channel length polymer field-effect transistors. Short-channel effects are avoided by using thin silicon dioxide as gate insulator. The transistors with 1 and 0.74 μm channel length operate at a voltage as low as 5 V with a low inverse subthreshold slope of 0.4–0.5 V/dec, on–off ratio of 104, and without short-channel effects. The poly(3-alcylthiophene)’s still suffer from a low mobility and hysteresis does occur, but it is negligible for the drain voltage variation. With our underetching technique also device structures with self-aligned buried gate and channel length below 0.4 μm are fabricated on polymer substrates.

Ambipolar injection in a submicron channel light-emitting tetracene transistor with distinct source and drain contacts

ABSTRACTOver the last decade, organic semiconductor thin film transistors have been the focus of many research groups because of their potential application in low-cost integrated circuits. Recently, an organic light-emitting field-effect transistor (OLEFET) was reported. In an OLEFET structure, optimal injection of both holes and electrons into the light-emitting layer are required for maximum quantum efficiency, whereas the gate serves as a controlling electrode. In this work, we achieved an OLFET structure with interdigitated hole-injecting Au and electron-injecting Ca contacts within a submicrometer channel length. Both contacts are bottom contacts to the upper-lying tetracene organic semiconductor. The study of IV-characteristics and light emission from these devices shined light on the underlying physics of the OLEFETs.

Channel length extraction for DMOS transistors using capacitance-voltage measurements

This paper presents a new measurement method for extraction of submicrometer channel lengths in double diffused MOS (DMOS) transistors. The method is based on capacitance-voltage (CV) measurements of the gate to p-base and the gate to drain capacitance. A channel length of 0.3 /spl mu/m has been measured on DMOS transistors. Numerical device simulations and small-signal capacitance simulations support the result and the measurement principle along with scanning capacitance microscopy (SCM) measurements.

Optical filters consisting of metallic waveguide arrays

We demonstrate high-pass optical filters with cutoffs in the 0.3-10-micron spectral region. These filters consist of uniform arrays of hollow metallic waveguides, obtained by coating wafers of the previously developed channel-glass (CG) materials with a thin metal film. In these filters the channel diameter controls the cutoff frequency, the channel length controls the sharpness of the cutoff, and the channel density determines the transmission efficiency at cutoff. All of these parameters can be controlled in the CG starting material. The properties of the metal coatings that influence the filter properties are also discussed. Cutoff wavelengths near 300 nm have been achieved to date by using CG materials with submicrometer channel diameters. At all channel diameters, the transmission spectra include a peak just above the cutoff wavelength, where the transmission value can exceed that expected on the basis of the geometrical open area of the CG structure.

Design aspects of MOS-controlled thyristor elements: technology, simulation, and experimental results

2.5-kV thyristor devices have been fabricated with integrated MOS controlled n/sup +/-emitter shorts and a bipolar turn-on gate using a p-channel DMOS technology. Square-cell geometries with pitch variations ranging from 15 to 30 mu m were implemented in one- and two-dimensional arrays with up to 20000 units. The impact of the cell pitch on the turn-off performance and the on-state voltage was studied for arrays with constant cathode area as well as for single-cell structures. By realizing MOS components with submicrometer channel lengths, scaled single cells are shown to turn off with current densities of several kiloamperes per square centimeter at a gate bias of 5 V. In the case of multi-cell ensembles, turn-off performance is limited due to inhomogeneous current distribution. Critical process parameters as well as the device behavior were optimized through multidimensional numerical simulation. >

Polysilicon thin-film transistors with channel length and width comparable to or smaller than the grain size of the thin film

Poly-Si thin-film transistors (TFTs) with channel dimensions (width W, and length L) comparable to or smaller than the grain size of the poly-Si film were fabricated and characterized. The grain size of the poly-Si film was enhanced by Si ion implantation followed by a low-temperature anneal and was typically 1 to 3 mu m in diameter. A remarkable improvement was observed in the device characteristics as the channel dimensions decreased to W=L=2 mu m. On the other hand, TFTs with submicrometer channel dimensions were characterized by an extremely abrupt switching in their I/sub D/ versus V/sub GS/ characteristics. The improvement was attributed to a reduction in the effect of the grain boundaries and to the effect of the device's floating body. >

Ensemble Monte Carlo simulation of an AlGaAs/GaAs heterostructure MIS-like FET

An ensemble Monte Carlo simulation of a heterostructure MIS-like FET is presented in which the quasi-two-dimensionality of electron gas in the heterostructure is taken into account by the lowest three subbands. An AlGaAs/GaAs heterostructure MIS-like FET with a 1- mu m-long gate has been investigated. The electron transport is discussed, as well as the dependence of device performance on the gate length and on the thickness of the AlGaAs semi-insulating layers. The electronic potential in the channel of the FET is substantially affected by the equipotential of the gate metal, showing a nonuniform high electric field present in the submicrometer channel. The electronic transport in the FET reflects this nonuniform high electric field, resulting in nonstationary and hot-electron transport in the submicrometer channel. >