Step-bunched Surface Research Articles

Nanoscale Mapping of Sub‐Gap Electroluminescence from Step‐Bunched, Oxidized 4H‐SiC Surfaces

Scanning tunneling luminescence microscopy (STLM) along with scanning tunneling spectroscopy (STS) is applied to a step-bunched, oxidized 4H-SiC surface prepared on the silicon face of a commercial, n-type SiC wafer using a silicon melt process. The step-bunched surface consists of atomically smooth terraces parallel to the [0001] crystal planes, and rougher risers consisting of nanoscale steps formed by the termination of these planes. The rather striking topography of this surface is well resolved with large tip biases of the order of -8 V and set currents of magnitude less than 1 nA. Hysteresis in the STS spectra is preferentially observed on the risers suggesting that they contain a higher density of surface charge traps than the terraces where hysteresis is more frequently absent. Similarly, at 50 K intense sub-gap light emission centered around 2.4 eV is observed mainly on the risers albeit only with larger tunneling currents of magnitude equal to or greater than 10 nA. These results demonstrate that STLM holds great promise for the observation of impurities and defects responsible for sub-gap light emission with spatial resolutions approaching the length scale of the defects themselves.

Bottom-Up Generated Height Gauges for Silicon-Based Nanometrology.

Steady progress in integrated circuit design has forced basic metrology to adopt silicon lattice parameter as a secondary realization of the SI meter that lacks convenient physical gauges for precise surface measurements at a nanoscale. To employ this fundamental shift in nanoscience and nanotechnology, we propose a set of self-organized silicon surface morphologies as a gauge for height measurements within the whole nanoscale (0.3-100 nm) range. Using 2 nm sharp atomic force microscopy (AFM) probes, we have measured the roughness of wide (up to 230 μm in diameter) singular terraces and the height of monatomic steps on the step-bunched and amphitheater-like Si(111) surfaces. For both types of self-organized surface morphology, the root-mean-square terrace roughness exceeds 70 pm but has a little effect on step height measurements having 10 pm accuracy for AFM technique in air. We implement a step-free 230-μm-wide singular terrace as a reference mirror in an optical interferometer to reduce the systematic error of height measurements from >5 nm to about 0.12 nm, which allows visualizing 136-pm-high monatomic steps on the Si(001) surface. Then, using a "pit-patterned" extremely wide terrace with dense but counted monatomic steps in a pit wall, we have optically measured mean Si(111) interplanar spacing (313.8 ± 0.4 pm) that agrees well with the most precise metrological data (313.56 pm). This opens up avenues for the creation of silicon-based height gauges using bottom-up approaches and advances optical interferometry among techniques for metrology-grade nanoscale height measurements.

Tuning the p-type doping of GaN over three orders of magnitude via efficient Mg doping during halide vapor phase epitaxy

The precise control of Mg concentration ([Mg]) in p-type GaN layers from 2.3 × 1016 to 2.0 × 1019 cm−3 was demonstrated by halide vapor phase epitaxy (HVPE) on n-type GaN (0001) freestanding substrates. [Mg] in GaN layers could be controlled well by varying the input partial pressure of MgCl2 formed by a chemical reaction between MgO solid and HCl gas under the thermodynamic equilibrium condition. In the sample with [Mg] of 2.0 × 1019 cm−3, a step-bunched surface was observed because the surface migration of Ga adatoms was enhanced by the surfactant effect of Mg atoms. The samples show high structural qualities determined from x-ray rocking curve measurements. The acceptor concentration was in good agreement with [Mg], indicating that almost all Mg atoms act as acceptors. The compensating donor concentrations in the samples were higher than the concentrations of Si, O, and C impurities. We also obtained the Mg acceptor level at a sufficiently low net acceptor concentration of 245 ± 2 meV. These results show that the HVPE method is promising for fabricating GaN vertical power devices, such as n-channel metal–oxide–semiconductor field-effect transistors.

Macrosteps formation on 4H-SiC surfaces via Si melting within a sandwich configuration

With a view to designing a homogeneous and controlled step-bunched morphology on large monocrystalline 4H-SiC(0001) surfaces, a sandwich configuration was investigated. A piece of silicon was melted between two 4H-SiC 4° off wafers, allowing a better spreading of the liquid than with a Si drop approach. Using as low liquid Si thickness as 30 µm, homogeneously highly step-bunched surfaces were obtained, though with irregular step shapes. This was found to be the result of time dependent dissolution of the SiC-bottom wafer under the natural vertical thermal gradient of the setup. The most parallel step and terrace structures were generated using 400 µm thick liquid Si though this led to long range inhomogeneities associated with complex mass transport. The proposed mechanism includes the combined effects of H2 etching at the edges acting as C pump and electromagnetic convection rolls for long range transport of these dissolved C atoms.

Liquid Si-Induced 4H-SiC Surface Structuring Using a Sandwich Configuration

In view of obtaining a step bunched morphology on large 4H-SiC surfaces, a sandwich configuration is investigated. A piece of silicon is melted between two 4H-SiC 4° off wafers, allowing a better spreading of the liquid than a Si drop approach. This successfully leads to highly step-bunched surfaces, though with irregular steps. The most regular step and terrace stuctures were found to be the result of epitaxial growth via a dissolution-precipitation process occuring from the edges to the center of the wafers. This is probably caused by radio-frequency induced electromagnetic convection within liquid Si. This process is quenched when using smaller liquid thickness.

Demonstration of AlGaN/GaN HEMTs on vicinal sapphire substrates with large misoriented angles

In this work, the electrical characteristics of AlGaN/GaN high-electron-mobility transistors (HEMTs) on vicinal c-plane sapphire substrates with different misoriented angles are investigated. As the angle increases from 0.2°, 1.0° to 4.0°, an enlarged width and height of surface step bunching as well as significantly enhanced electron mobility from 957, 1123 to 1246 cm2/V s were measured. As a result, a large boost in the maximum output current (IDmax) from ∼300 mA/mm (on a 0.2° substrate) to ∼650 mA/mm (on a 4.0° substrate) can be observed. Importantly, HEMTs on 1.0° and 4.0° substrates exhibit an obvious anisotropic electrical behavior: the IDmax along the [11-20] orientation is larger than that along the [10-10] orientation. Such a difference becomes more distinct as the misoriented angle increases, attributing to the lifted step height that would introduce a potential barrier for the electron transport along the [10-10] orientation. In short, this work demonstrates an effective approach toward the realization of high-performance HEMTs with anisotropic electrical behavior on a single device platform.

Direct demonstration of carrier distribution and recombination within step-bunched UV-LEDs

AlGaN-based solid state UV emitters have many advantages over conventional UV sources. However, UV-LEDs still suffer from numerous challenges, including low quantum efficiency compared to their blue LED counterparts. One of the inherent reasons is a lack of carrier localization effect inside fully miscible AlGaN alloys. In the pursuit of phase separation and carrier localization inside the active region of AlGaN UV-LED, utilization of highly misoriented substrates proves to be useful, yet the carrier distribution and recombination mechanism in such structures has seldom been reported. In this paper, a UV-LED with step-bunched surface morphology was designed and fabricated, and the internal mechanism of high internal quantum efficiency was studied in detail. The correlation between microscale current distribution and surface morphology was provided, directly demonstrating that current prefers to flow through the step edges of the epitaxial layers. Experimental results were further supported by numerical simulation. It was found that efficient radiative recombination centers were formed in the inclined quantum well regions. A schematic three-dimensional energy band structure of the multiple quantum wells (MQWs) across the step was proposed and helps in further understanding the luminescence behavior of LEDs grown on misoriented substrates. Finally, a general principle to achieve carrier localization was proposed, which is valid for most ternary III-V semiconductors exhibiting phase separation.

Structural and morphological instabilities of the Si(1 1 1)-7 × 7 surface during silicon growth and etching by oxygen and selenium

Using in situ reflection electron microscopy and ex situ atomic force microscopy, we have studied the morphological stability of large-scale (~10–100 μm) Si(111)-7 × 7 terraces during silicon growth and etching by oxygen and selenium. On the large-scale terraces, silicon growth at substrate temperatures T = 600–770 °C and Si deposition rates R = 0.002–0.2 BL/s proceeds in multilayer mode. Based on RMS surface roughness scaling W ∝ Θβ, we have discerned three modes of morphological instability caused by (I) effective adatom diffusion along step edges at low T and R (β ≈ 0.33), (II) effective diffusion and fast step motion along disordered “1 × 1” regions in 7 × 7 domain boundaries at intermediate T and R (β ≈ 0.2), and (III) accumulation of Si adatoms in high-atom-density “1 × 1” regions on the uppermost terraces at high T and R (β ≈ 0.5). The etching of the singular Si(111)-7 × 7 surface by oxygen leads to the slow development of multilayer morphology, while selenium-induced etching preserves flat surface morphology with periodic 2D vacancy island nucleation, growth, and coalesce, which is attributed to Se adatom diffusion. On the step-bunched surface, the Si or Se adatom diffusion to the step bunches leads to the self-organization of pyramidlike or valley-like morphology during Si growth or Se-induced etching, respectively.

Reduction of surface roughness by modification of step-bunched aluminum nitride layers towards step-flow morphology

Conventional aluminum nitride (AlN) template fabrication techniques, like hydride vapour phase epitaxy or AlN growth on patterned sapphire substrates, usually lead to step-bunched template surfaces. The resulting macrosteps cause emission broadening or even multiple-peak characteristics of ultraviolet light-emitting diodes (UV LEDs) fabricated on such AlN templates. In order to reduce these macrosteps and to provide a smoother surface, even without the need of a thick AlN deposition, a two-layer growth procedure is reported here. A three-dimensional (3D) – twodimensional (2D) sequential growth initiates a significant modification of the previous AlN surface morphology and simultaneously limits the evolving tensile strain. A primarily step-bunched surface with a surface roughness root mean square of 1.8 nm is successfully reduced by the two-layer growth procedure down to 0.8 nm, without any film cracking. This distinct roughness reduction of more than 50% is achieved within an AlN thickness of only 1.3 µm. With a smoother surface, the electroluminescence characteristic of a UV LED structure is substantially improved. Instead of a double-peak emission, typical for LEDs grown on step-bunched templates, a single-peak emission and lower spectral width were achieved, indicating the high potential of the suggested two-layer technique for improving performance.

Crystal structure and magnetic properties of wafer-size Co nanostrip arrays self-organized on a step-bunched surface of Si(111)-5.55 × 5.55-Cu/(Cu, Cu2Si, W-O) buffers

Structure and magnetization reversal of Co nanostrips self-organized on a Si(111)-5.55 × 5.55-Cu step-bunched surface covered by Cu, Cu2Si and W-O buffer layers are systematically investigated and characterized in details. Optimal conditions for growth of well-ordered arrays of mm-long straight nanostrips with hexagonal close-packed and face-centered cubic crystal phases are defined. We find that the Co nanostrips with epitaxial and multiepitaxial structure grows on monocrystalline buffer layers of Cu and Cu2Si, respectively. The amorphous W-O buffer promotes the growth of polycrystalline Co nanostrips. We reveal the origin and compute the magnitude of magnetic anisotropy in Co nanostrips with different crystal phases. Structure-dependent magnetization reversal modes of nanostrip arrays are determined analytically using angular dependences of the coercive force. Our analysis of distributions of the switching and interaction fields by the first-order reversal curve diagram method specifies contributions of global and local interaction fields. Micromagnetic simulations considering the magnetostatic interaction between nanostrips demonstrate the crystal structure-dependent magnetization reversal mechanisms based on propagation of domain walls, whose type (symmetric or asymmetric transverse domain wall, vortex domain wall) and velocity are determined by the magnetic parameters, interaction fields and driving magnetic fields.

Etching of step-bunched Si(1 1 1) surface by Se molecular beam observed by in situ REM

Using in situ ultrahigh vacuum reflection electron microscopy, we have first visualized the evolution of step-bunched Si(1 1 1) surface during Se beam etching depending on substrate temperature T and terrace size required for survival of etching-induced vacancies. Below T ~ 630 °C, the etching proceeds in layer-by-layer mode via periodic nucleation of small 2D vacancy islands without noticeable motion of steps. However, in 630–830 °C interval, the etching of the 7 × 7 reconstructed Si(1 1 1) step-bunched surface is realized by both step flow and continuous nucleation and growth of 2D vacancy islands on wide terraces, which leads to the excavation of initially flat surface between step bunches. At T > 830 °C, the etching proceeds by step flow with preservation of initial surface morphology. We have found that the Si(1 1 1) surface etching by Se beam is characterized by 2.65 eV activation energy that limits etching kinetics in low-temperature range when the whole Si(1 1 1) surface is converted to disordered impurity-induced Si(1 1 1)“1 × 1”-Se phase.

Surface Morphology of 4H-SiC after Thermal Oxidation

Step-controlled growth of 4H-SiC epitaxial layers leads to the formation of a step-bunched morphology along the surface with larger macrosteps, composed of smaller microsteps of several Si-C bilayer heights. As thermal oxidation is an orientation-dependent process, a multi-faceted surface is expected to exhibit a different oxidation behavior compared to a perfectly planar surface. In this work, step-bunched surfaces after oxidation are investigated by high-resolution atomic force microscopy (HR-AFM) and transmission electron microscopy (TEM) indicating a morphological change in the early stages of thermal oxidation. An orientation-dependent oxidation model is used to correctly describe variations of the oxide thicknesses at isolated macrosteps.

Growth temperature dependence of cubic GaN step structures and cubic InN dot arrays grown on MgO (001) vicinal substrates

In this paper, we report on the detailed structural features of step-bunched surface formed on cubic (c-) GaN and self-assembled c-InN dot arrays grown on the c-GaN surface, particularly focusing on the growth temperature dependence. Samples were fabricated on MgO (001) vicinal substrates with off-cut angles of 2.0° and 3.5° toward [110] by RF-MBE. Multisteps and terraces with a certain periodicity in the vicinal direction were observed on c-GaN layers. The average terrace width narrowed with lowering the growth temperature and increasing the substrate off-cut angle. The formation of c-InN dots proceeded in the Stranski–Krastanov growth mode with critical thickness of 0.54–0.66 nm. The c-InN dot exhibited a variety of structural features depending on the growth conditions. Positional dot alignment along the multistep edges of the underlayer was observed under some conditions. The degree of alignment was found to be affected by the terrace width on the c-GaN underlayer.

Growth of Ordered Graphene Ribbons by Sublimation Epitaxy

Ordered graphene ribbons were grown on the surface of 4° off-axis 4H-SiC wafers by sublimation epitaxy, and characterized by using scanning electron microscopy (SEM), atomic force microscopy (AFM) and micro-Raman spectroscopy (μ-Raman). SEM showed that there were gray and dark ribbons on the substrate surface, and AFM further revealed that these ordered graphene ribbons had clear stepped morphologies due to surface step-bunching. It was shown by μ-Raman that the numbers of graphene layers of these two types of regions were different. The gray region was composed of mono- or bilayer ordered graphene ribbon, while the dark region was of tri- or few-layer ribbon. Meanwhile, ribbons were all homogeneous and had a width up to 40 μm and a length up to 1000 μm, without micro defects such as grain boundaries, ridges, or mono- and few-layer graphene mixtures. The results of this study are useful for optimized growth of high-quality graphene film on silicon carbide crystal.

Reduction of morphological defects in 4H-SiC epitaxial layers

Correlation between morphological defects and device yield in the 4H-SiC epitaxial layers were investigated with overlapped morphological defect mapping and device yield mapping figures. The results show the harmful level of various morphological defects for device yield should be triangular > downfall > carrot > particle. Origins of the triangular defects were traced by a multiple cycle of polishing and molten KOH etching process, revealing that the triangular defects are mainly formed at initially epitaxial stage and caused by threading screw dislocations (TSDs) in substrates or spontaneous nucleation. Etching temperature and time of the hydrogen surface etching process and C/Si ratio in buffer layer growth process were also systematically optimized. The density of triangular defects can be reduced to 0.1 cm−2. Meanwhile, an additional buffer layer with a step-bunching surface was applied and can effectively restrain the extending of triangular defect along 〈1 −1 0 0〉 direction.

What Drives Metal-Surface Step Bunching in Graphene Chemical Vapor Deposition?

Compressive strain relaxation of a chemical vapor deposition (CVD) grown graphene overlayer has been considered to be the main driving force behind metal surface step bunching (SB) in CVD graphene growth. Here, by combining theoretical studies with experimental observations, we prove that the SB can occur even in the absence of a compressive strain, is enabled by the rapid diffusion of metal adatoms beneath the graphene and is driven by the release of the bending energy of the graphene overlayer in the vicinity of steps. Based on this new understanding, we explain a number of experimental observations such as the temperature dependence of SB, and how SB depends on the thickness of the graphene film. This study also shows that SB is a general phenomenon that can occur in all substrates covered by films of two-dimensional (2D) materials.

Self-organization and FORC-based magnetic characterization of ultra-high aspect ratio epitaxial Co nanostrips produced by oblique deposition on an ordered step-bunched silicon surface

Further development of microelectronics requires novel or improved technological approaches for device nanofabrication and functional properties characterization. In this paper, we studied the crystal structure and magnetic properties of epitaxial Co nanostrips with the average width of 32.6, 45.3, and 62.6 nm grown on a step-bunched Si(111)5.55 × 5.55-Cu/Cu surface. Technological conditions, under which the ultra-high aspect ratio (∼104) structurally solid, straight nanostrips of hcp-Co with crystallographic axis [0001] oriented along their long side can be grown, were determined. The dependence of the coercive force on the width of the nanostrips was demonstrated. Magnetization reversal through the transverse domain-wall nucleation and propagation in a Co nanostrip was defined with an analytical approach based on the Stoner–Wohlfarth model. Using the first-order reversal curve method, we analyzed the effect of nanostrip uniformity degree on magnetic behavior and the influence of the magnetostatic interactions on the coercive force of individual nanostrips.

Low specific contact resistance on epitaxial p-type 4H-SiC with a step-bunching surface**Project supported by the Key Specific Projects of Ministry of Education of China (Grant No. 625010101), the National Natural Science Foundation of China (Grant No. 61234006), the Natural Science Foundation of ShaanXi Province, China (Grant No. 2013JQ8012), the Doctoral Fund of Ministry of Education of China (Grant No. 20130203120017),

This paper reports the performances of Ti/Al based ohmic contacts fabricated on highly doped p-type 4H-SiC epitaxial layer which has a severe step-bunching surface. Different contact schemes are investigated based on the Al:Ti composition with no more than 50 at.% Al. The specific contact resistance (SCR) is obtained to be as low as 2.6 × 10−6 Ω·cm2 for the bilayered Ti(100 nm)/Al(100 nm) contact treated with 3 min rapid thermal annealing (RTA) at 1000 °C. The microstructure analyses examined by physical and chemical characterization techniques reveal an alloy-assisted ohmic contact formation mechanism, i.e., a high degree of alloying plays a decisive role in forming the interfacial ternary Ti3SiC2 dominating the ohmic behavior of the Ti/Al based contact. Furthermore, a globally covered Ti3SiC2 layer with (0001)-oriented texture can be formed, regardless of the surface step bunching as well as its structural evolution during the metallization annealing.

Effect of Growth Pressure on Epitaxial Graphene Grown on 4H-SiC Substrates by Using Ethene Chemical Vapor Deposition.

The Si(0001) face and C(000-1) face dependences on growth pressure of epitaxial graphene (EG) grown on 4H-SiC substrates by ethene chemical vapor deposition (CVD) was studied using atomic force microscopy (AFM) and micro-Raman spectroscopy (μ-Raman). AFM revealed that EGs on Si-faced substrates had clear stepped morphologies due to surface step bunching. However, This EG formation did not occur on C-faced substrates. It was shown by μ-Raman that the properties of EG on both polar faces were different. EGs on Si-faced substrates were relatively thinner and more uniform than on C-faced substrates at low growth pressure. On the other hand, D band related defects always appeared in EGs on Si-faced substrates, but they did not appear in EG on C-faced substrate at an appropriate growth pressure. This was due to the μ-Raman covering the step edges when measurements were performed on Si-faced substrates. The results of this study are useful for optimized growth of EG on polar surfaces of SiC substrates.

Evaluation of F-N Tunneling Emission Current in MOS Capacitor Fabricated on Step Bunching

This work reports about influence of step bunching of SiC epitaxial-wafer surface on Fowler-Nordheim (F-N) tunneling emission current of SiC-MOS capacitor. We have measured the effective barrier height (ΦB) of SiO2/SiC interface, and estimated the deterioration factor of the effective ΦB on step bunching surface by calculating the local tunneling emission currents. Step bunching fluctuates the gate oxide thickness. The effective ΦB value can be successively derived using our proposed partitioned model in which constant ΦB value of flat surface is used. The fluctuation of the oxide film thickness results in the convergence of F-N tunneling emission currents at the thinner oxide in the MOS capacitor.